Meeting notes, March 1
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Stefan Wallentowitz
Mar 1, 2017, 11:54:14 AM3/1/17
to RISC-V Debug Group
Megan: No changes to the flow, git + pdf
Megan: First topic is serial ports, question from Po Wei.
Megan: Alex and Megan wondering about the access to it from the
processor. Defined or config string.
Richard: Should be up to implementer. Suggest using standard register.
Richard: It should have the interface of a UART 16550
Stefan: Seconding that, but the problem may be focused to a platform then
All: Discussion around the interface
Megan: Question is if the core side of the serial is needed to be specified.
Gaj: Not sure if we don't it at all.
Richard: A basic one is needed if your system is very broken.
Po Wei: Don't understand how to do the full duplex?
Stefan: The "full" is the problem here maybe. It could raise the
expecatation that the developer can concurrently read and write
characters. If that is not the case, than just "duplex".
Megan: Should there be a transmit and receive register.
Gaj: Me too
Megan: Lets move on to triggers
(Richard, time: 25 min)
Megan: Question if triggers are virtual or physical addresses
Megan: Proposal by Tim was to have another bit
Gaj: If it is a virtual address, how do you handle physical addresses of
memory mapped I/O?
Richard: It should be virtual addresses.
Stefan: It also allows transparent re-use for self-hosted debug
All: Discussion around virtualization and aliasing
Stefan: I would second Alex' mail proposal to have a look at other
architectures
Megan: Agree, should be continued on the mailing list. Spec needs
clarification of this.
Megan: Alex asked if there is gdb support. There is with the current
HiFive1. I am not sure if data triggers work, will try out.
Megan: Question about chaining.
Stefan: Can you clarify?
Megan clarifies the chaining.
(Richard, time: 40 min)
Megan explains Vyacheslav's proposal of hart arrays
Megan: Is that something very useful to have the hart array from a
software perspective?
Gaj: Yes, it makes sense, but need to read the proposal again.
Stefan: I too think it would be very useful for debugging
parallelization problems.
Megan: Will write something up, iterate soon, because we should get the
basics done.
Megan: Second point is interrupts. If they should come back.
Gaj: Agree it would be useful.
Stefan: We should have such basic "triggers" for other platform
infrastructure. But it should be limited carefully.
Megan: Config string is a topic for next week. Together with enumeration
and probing. Some config string discussion going on for the privileged
spec, should sync with them.
Megan: Next week hart array and enumeration and probing
Megan: First topic is serial ports, question from Po Wei.
Megan: Alex and Megan wondering about the access to it from the
processor. Defined or config string.
Richard: Should be up to implementer. Suggest using standard register.
Richard: It should have the interface of a UART 16550
Stefan: Seconding that, but the problem may be focused to a platform then
All: Discussion around the interface
Megan: Question is if the core side of the serial is needed to be specified.
Gaj: Not sure if we don't it at all.
Richard: A basic one is needed if your system is very broken.
Po Wei: Don't understand how to do the full duplex?
Stefan: The "full" is the problem here maybe. It could raise the
expecatation that the developer can concurrently read and write
characters. If that is not the case, than just "duplex".
Megan: Should there be a transmit and receive register.
Gaj: Me too
Megan: Lets move on to triggers
(Richard, time: 25 min)
Megan: Question if triggers are virtual or physical addresses
Megan: Proposal by Tim was to have another bit
Gaj: If it is a virtual address, how do you handle physical addresses of
memory mapped I/O?
Richard: It should be virtual addresses.
Stefan: It also allows transparent re-use for self-hosted debug
All: Discussion around virtualization and aliasing
Stefan: I would second Alex' mail proposal to have a look at other
architectures
Megan: Agree, should be continued on the mailing list. Spec needs
clarification of this.
Megan: Alex asked if there is gdb support. There is with the current
HiFive1. I am not sure if data triggers work, will try out.
Megan: Question about chaining.
Stefan: Can you clarify?
Megan clarifies the chaining.
(Richard, time: 40 min)
Megan explains Vyacheslav's proposal of hart arrays
Megan: Is that something very useful to have the hart array from a
software perspective?
Gaj: Yes, it makes sense, but need to read the proposal again.
Stefan: I too think it would be very useful for debugging
parallelization problems.
Megan: Will write something up, iterate soon, because we should get the
basics done.
Megan: Second point is interrupts. If they should come back.
Gaj: Agree it would be useful.
Stefan: We should have such basic "triggers" for other platform
infrastructure. But it should be limited carefully.
Megan: Config string is a topic for next week. Together with enumeration
and probing. Some config string discussion going on for the privileged
spec, should sync with them.
Megan: Next week hart array and enumeration and probing
Megan Wachs
Mar 1, 2017, 1:39:52 PM3/1/17
to Stefan Wallentowitz, RISC-V Debug Group
Thanks Stefan!
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Megan A. Wachs
Engineer | SiFive, Inc
300 Brannan St, Suite 403
San Francisco, CA 94107
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