Multicore enumeration with OpenOCD

[Julius Baxter]

I've got a multicore rocket system and am attaching to it for
debugging with OpenOCD.

I was using a version of OpenOCD from December 2017 (commit
20236ca8170e2e833f4fe5b0219d64c8562d9ffe) and decided to update to a
newer version, built from the top of the RISC-V OpenOCD tree a few
days ago.

My previous OpenOCD build would attach and enumerate all of the harts
I have, however the new version enumerates only 1 hart.

It seems that now the enumeration loop in examine() in riscv-013.c does this:

if (!riscv_rtos_enabled(target) && i != target->coreid)
continue;

... so I guess targets with RTOS enabled or where the loop counter ==
coreid will get enumerated.

I *think* just need a new config file for this newer OpenOCD to
enumerate a SMP setup. Can anyone point me to an example?

If I do this:

set _TARGETNAME1 $_CHIPNAME.cpu0
target create $_TARGETNAME1 riscv -chain-position $_CHIPNAME.cpu -coreid 0
set _TARGETNAME2 $_CHIPNAME.cpu1
target create $_TARGETNAME2 riscv -chain-position $_CHIPNAME.cpu -coreid 1
target smp $_TARGETNAME1 $_TARGETNAME2

.. then it appears to enumerate 2 cores. Am I on the right track?

Cheers,

Julius

[Tommy Murphy]

Have you tried "target create ... -rtos riscv"?

That's the normal hack to see all harts.

[Tim Newsome]

There are 2 ways to do multicore:

1. Use `-rtos riscv` as Tommy mentioned. OpenOCD will enumerate all harts itself, and expose each one to gdb as a thread. This only works if the harts are homogeneous. (Example configuration: https://github.com/riscv/riscv-tests/blob/master/debug/targets/RISC-V/spike-rtos.cfg)

2. Explicitly list each hart in your configuration file, as you described. In this case OpenOCD sees each hart as a distinct core, and you have to have one gdb session per hart. (Example configuration: https://github.com/riscv/riscv-tests/blob/master/debug/targets/RISC-V/spike-2.cfg)

Tim

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[Tommy Murphy]

On Tuesday, 23 October 2018 19:23:31 UTC+1, Tim Newsome wrote:

1. Use `-rtos riscv` as Tommy mentioned. OpenOCD will enumerate all harts itself, and expose each one to gdb as a thread. This only works if the harts are homogeneous.

Hi Tim - what do you mean by homogeneous here?

Last time I tried it -rtos riscv worked fine with the HiFive nleashed board which has 1 x E51 rv64imac and 4 x U54 rv64gc - i.e.what I would call heterogeneous cores/harts...

[Tim Newsome]

gdb will assume the harts are identical. So eg. if one of them is RV32 and another RV64 then you're going to have a bad time. Differences that are more subtle might not cause any problems.

Tim 

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[Tommy Murphy]

On Tuesday, 23 October 2018 20:08:23 UTC+1, Tim Newsome wrote:

On Tue, Oct 23, 2018 at 11:54 AM Tommy Murphy <tommy_...@hotmail.com> wrote:

On Tuesday, 23 October 2018 19:23:31 UTC+1, Tim Newsome wrote:

1. Use `-rtos riscv` as Tommy mentioned. OpenOCD will enumerate all harts itself, and expose each one to gdb as a thread. This only works if the harts are homogeneous.

Hi Tim - what do you mean by homogeneous here?

Last time I tried it -rtos riscv worked fine with the HiFive nleashed board which has 1 x E51 rv64imac and 4 x U54 rv64gc - i.e.what I would call heterogeneous cores/harts...

gdb will assume the harts are identical. So eg. if one of them is RV32 and another RV64 then you're going to have a bad time. Differences that are more subtle might not cause any problems

Thanks Tim

I can understand that there might be problems if the XLEN is different.

But what about same XLEN and different extensions?

E.g. the HiFive Unleashed board with 1 x rv64imac and 4 x rv64gc?

In that specific case would you anticipate problems using -rtos riscv?

If so what?

With -rtos riscv what does openocd/gdb assume the harts to be?

rv64i? rv64imac? rv64gc?

The only obvious issue I can think of is what registers the debugger will try to fetch - e.g. trying to fetch FPU regs for the rv64imac will presumably fail (gracefully I hope)?

[Julius Baxter]

On Wed, 24 Oct 2018 at 05:23, Tim Newsome <t...@sifive.com> wrote:
>
> There are 2 ways to do multicore:
> 1. Use `-rtos riscv` as Tommy mentioned. OpenOCD will enumerate all harts itself, and expose each one to gdb as a thread. This only works if the harts are homogeneous. (Example configuration: https://github.com/riscv/riscv-tests/blob/master/debug/targets/RISC-V/spike-rtos.cfg)
> 2. Explicitly list each hart in your configuration file, as you described. In this case OpenOCD sees each hart as a distinct core, and you have to have one gdb session per hart. (Example configuration: https://github.com/riscv/riscv-tests/blob/master/debug/targets/RISC-V/spike-2.cfg)
>
> Tim

Brilliant, thanks very much for the details.

Cheers,
Julius

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