How to add a new Register type on liftoff compiler ?

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luy...@qq.com

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Jan 13, 2021, 7:53:00 AM1/13/21
to v8-dev
I am a developer on V8-RISCV(https://github.com/v8-riscv/v8).
I am working on porting RVV to V8.
On liftoff compiler, there are four Reg types :
  •   kGpReg
  •   kFpReg
  •   kGpRegPair   
  •   kFpRegPair
On ARM64/X64 simd register be aliased Fp.
But on riscv-v , vector register  has 32 independent VLEN bit registers. 
I want to know how i add a Vector register type?

I try to add a new type on liftoff-register.h:
```
  1. enum RegClass : uint8_t {  
  2.   kGpReg,  
  3.   kFpReg,  
  4.   kGpRegPair = kFpReg + 1 + (kNeedS128RegPair && !kNeedI64RegPair) +  
  5.                (kNeedVpReg && !kNeedI64RegPair),  
  6.   kFpRegPair = kFpReg + 1 + kNeedI64RegPair + (kNeedVpReg && !kNeedS128RegPair),  
  7.   kVpReg = kFpReg + 1 + kNeedI64RegPair + kNeedS128RegPair,  
  8.   kNoReg = kVpReg + kNeedVpReg,  
  9. }  
```
And set kSimpleFPAliasing  false.

Some test case errors appear, like:

```
Warning: unknown flag --enable-slow-asserts.
Try --help for options
/home/yahan/v8/v8.snapshot-20200531/v8-cr/v8/test/mjsunit/asm/embenchen/box2d.js
:20212: Assertion failed: area > 1.19209290e-07F, at: Box2D/Collision/Shapes/b2P
olygonShape.cpp,352,ComputeMass at Error
at stackTrace (/home/yahan/v8/v8.snapshot-20200531/v8-cr/v8/test/mjsunit/asm
/embenchen/box2d.js:1053:15)
at ___assert_fail (/home/yahan/v8/v8.snapshot-20200531/v8-cr/v8/test/mjsunit
/asm/embenchen/box2d.js:1520:210)
at __ZNK14b2PolygonShape11ComputeMassEP10b2MassDataf [b2PolygonShape::Comput
eMass(float*)] (/home/yahan/v8/v8.snapshot-20200531/v8-cr/v8/test/mjsunit/asm/em
benchen/box2d.js:16785:3)
at __ZN6b2Body13ResetMassDataEv [b2Body::ResetMassData()] (/home/yahan/v8/v8
.snapshot-20200531/v8-cr/v8/test/mjsunit/asm/embenchen/box2d.js:15268:71)
at __ZN6b2Body13CreateFixtureEPK12b2FixtureDef [b2Body::CreateFixture(b2Fixt
ureDef?*)] (/home/yahan/v8/v8.snapshot-20200531/v8-cr/v8/test/mjsunit/asm/embenc
hen/box2d.js:17783:2)
at __ZN6b2Body13CreateFixtureEPK7b2Shapef [b2Body::CreateFixture(float*)] (/
home/yahan/v8/v8.snapshot-20200531/v8-cr/v8/test/mjsunit/asm/embenchen/box2d.js:
19192:7)
at _main (/home/yahan/v8/v8.snapshot-20200531/v8-cr/v8/test/mjsunit/asm/embe
nchen/box2d.js:14031:4)
at Object.callMain (/home/yahan/v8/v8.snapshot-20200531/v8-cr/v8/test/mjsuni
t/asm/embenchen/box2d.js:20193:30)
at doRun (/home/yahan/v8/v8.snapshot-20200531/v8-cr/v8/test/mjsunit/asm/embe
nchen/box2d.js:20250:25)
at run (/home/yahan/v8/v8.snapshot-20200531/v8-cr/v8/test/mjsunit/asm/embenc
hen/box2d.js:20265:5)
throw e;
^
Command: out/riscv64.no.sim/d8 --test test/mjsunit/mjsunit.js test/mjsunit/asm/e
mbenchen/box2d.js --random-seed=-1764491966 --nohard-abort --enable-slow-asserts
--verify-heap --testing-d8-test-runner
````

```
yahan@2b971f1ad76e:~/v8-riscv64 $ ./out/riscv64.no.sim/d8 ./test/mjsunit/mjsunit
.js ./test/mjsunit/regress/wasm/regress-1029642.js


# Fatal error in ../../src/wasm/baseline/liftoff-register.h, line 223
# Debug check failed: 0 == code % 2 (0 vs. 1).



#FailureMessage Object: 0x7f7cc2f9c560
==== C stack trace ===============================

./out/riscv64.no.sim/d8(v8::base::debug::StackTrace::StackTrace()+0x1e) [0x5
5ab26e1ad0e]
./out/riscv64.no.sim/d8(+0x48991bd) [0x55ab26e121bd]
./out/riscv64.no.sim/d8(V8_Fatal(char const*, int, char const*, ...)+0x231)
[0x55ab26dfcfa1]
./out/riscv64.no.sim/d8(+0x488396c) [0x55ab26dfc96c]
./out/riscv64.no.sim/d8(V8_Dcheck(char const*, int, char const*)+0x27) [0x55
ab26dfd047]
./out/riscv64.no.sim/d8(v8::internal::wasm::LiftoffRegister::from_external_c
ode(v8::internal::wasm::RegClass, v8::internal::wasm::ValueType, int)+0x90) [0x5
5ab2584e150]
./out/riscv64.no.sim/d8(+0x32e51c2) [0x55ab2585e1c2]
./out/riscv64.no.sim/d8(+0x32e47a7) [0x55ab2585d7a7]
./out/riscv64.no.sim/d8(+0x32e214d) [0x55ab2585b14d]
./out/riscv64.no.sim/d8(+0x32e17ad) [0x55ab2585a7ad]
./out/riscv64.no.sim/d8(+0x32dd23f) [0x55ab2585623f]
./out/riscv64.no.sim/d8(v8::internal::wasm::ExecuteLiftoffCompilation(v8::in
ternal::AccountingAllocator*, v8::internal::wasm::CompilationEnv*, v8::internal:
:wasm::FunctionBody const&, int, v8::internal::wasm::ForDebugging, v8::internal:
:Counters*, v8::internal::wasm::WasmFeatures*, v8::internal::Vector, std::_
_1::unique_ptrinternal::wasm::DebugSideTable> >*, int)+0x49f) [0x55ab2585534f]
./out/riscv64.no.sim/d8(v8::internal::wasm::WasmCompilationUnit::ExecuteFunc
tionCompilation(v8::internal::wasm::WasmEngine*, v8::internal::wasm::Compilation
Env*, std::__1::shared_ptr const&, v8::int
ernal::Counters*, v8::internal::wasm::WasmFeatures*)+0x46b) [0x55ab259140db]
./out/riscv64.no.sim/d8(v8::internal::wasm::WasmCompilationUnit::ExecuteComp
ilation(v8::internal::wasm::WasmEngine*, v8::internal::wasm::CompilationEnv*, st
d::__1::shared_ptr const&, v8::internal::C
ounters*, v8::internal::wasm::WasmFeatures*)+0xe8) [0x55ab25913aa8]
./out/riscv64.no.sim/d8(+0x33e1a8f) [0x55ab2595aa8f]
./out/riscv64.no.sim/d8(+0x33ea6c2) [0x55ab259636c2]
./out/riscv64.no.sim/d8(v8::platform::DefaultJobWorker::Run()+0xd5) [0x55ab2
6e1db95]
./out/riscv64.no.sim/d8(v8::platform::DefaultWorkerThreadsTaskRunner::Worker
Thread::Run()+0x5f) [0x55ab26e2782f]
./out/riscv64.no.sim/d8(v8::base::Thread::NotifyStartedAndRun()+0x36) [0x55a
b26e0f7f6]
./out/riscv64.no.sim/d8(+0x489602d) [0x55ab26e0f02d]
/lib/x86_64-linux-gnu/libpthread.so.0(+0x9609) [0x7f7cc3d00609]
/lib/x86_64-linux-gnu/libc.so.6(clone+0x43) [0x7f7cc3ab2103]
Received signal 4 ILL_ILLOPN 55ab26e0dcf1
Illegal instruction (core dumped)
```


Clemens Backes

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Jan 13, 2021, 11:06:13 AM1/13/21
to v8-dev
Hi Lu,

as you are probably aware, LiftoffRegister needs to be able to store any register that should be used inside of Liftoff. If you want to add another register class, you first need to decide how to encode it as a Liftoff register. For the existing register classes, there is this nice description and illustration in liftoff-register.h.
If you change the encoding, you should make sure that all the existing accessors are still working correctly (is_gp(), is_gp(), gp(), fp(), ...). And you need to implement new accessors for the new register class.
Next, you need to actually use your new register class wherever that's needed.

The second failure points to problems with registers used for passing parameters. See the comments in LiftoffRegister::from_external_code for details.

Hope that helps. It's easy to mess up unfortunately, and hard to debug.

-Clemens


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luy...@qq.com

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Jan 14, 2021, 4:06:00 AM1/14/21
to v8-dev
Thank you~
I will try it

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