Hi,
I'm planning a homebrew computer as a hobby project. These are the tentative features:
- All parts available new for sale, i.e. no salvaged parts
- Through-hole parts
- Z180 CPU with 2x on-chip UARTs
- 512K static RAM
- 512K flash ROM with RomWBW installed
- PS/2 keyboard using 1 integrated UART
- RS232 using the other integrated UART and MAX232 for level shifting
- TMS9918 compatible video display controller with HDMI output
The main differentiating feature would be that the TMS9918 would actually be emulated using an FPGA. I don't think there are any 5V FPGAs. I found some 5V CPLDs but they do not have
enough macrocells to implement a TMS9918. So to avoid voltage level shifting complications with the FPGA, I plan to use a single 3.3V supply for the whole computer. That means using a 3.3V CPU, which motivates a Z180 CPU rather than a Z80 CPU, since Z180 is available in 3.3V, while Z80 is not.
The FPGA would emulate not only the TMS9918 but also all the connected video DRAM, a scanline doubler and an HDMI video encoder, allowing connection to a modern TV. I would start with the TMS9918 VHDL source files from the MISTer project and adapt them. I've been looking at FPGA dev boards ranging in capability from the Pluto-IIx to the Mercury 2.
Maybe I'll ask, do you know of any other projects combining a real CPU with FPGA emulated TMS9918? If you wanted to design a computer incorporating both a Z80 and an FPGA, how would you address the incompatible supply voltages?
I am not sure the Z180 UART can be persuaded to talk to a PS/2 keyboard. It isn't a standard serial protocol but a rather strange synchronous clocked interface. As you are using an FPGA there are tons of FPGA PS/2 keyboard interface designs you could use instead.
I thought about going 3.3v for the board I'm working on at the moment but stayed at 5v with voltage shifting on some I/O. I'll be interested to see how a pure 3v3 setup works.
The TMS9918A is very very limited both graphically (byte wide tiles) and visually (256 x 192). It might be worth also supporting some kind of 80 column or dumb hires mode assuming there is no VDP9938/58 that is viable ?
Maybe I'll ask, do you know of any other projects combining a real CPU with FPGA emulated TMS9918? If you wanted to design a computer incorporating both a Z80 and an FPGA, how would you address the incompatible supply voltages?The most famous example I can think of is the ZX Evolution which occupies the same kind of space in Russian ZX spectrum history as the ZX Spectrum Next does here except they did it a lot earlier. Unlike the Next which uses a Z80 FPGA clone (T80) the Evolution uses a combination of FPGA, Z80 CPU and a microcontroller.
One issue I haven't found a satisfying solution for is Z180 driven GPIOs. The Z80 PIO chip is not available in 3.3V variety. I wonder if I could make the Z180 talk I2C or SPI, I would use a modern bus expander IC instead
I am not sure the Z180 UART can be persuaded to talk to a PS/2 keyboard. It isn't a standard serial protocol but a rather strange synchronous clocked interface. As you are using an FPGA there are tons of FPGA PS/2 keyboard interface designs you could use instead.I have three ideas. 1) It's generally the PS/2 device rather than the host that pulses the PS/2 clock. I think I might be able to feed one of the UARTs the PS/2 keyboard clock as its asynchronous clock, probably inverted since PS/2 is negative edge triggered. Then configure it for 1 start bit, 1 odd parity bit and 1 stop bit and see what happens.
2) The UARTs also have modem control inputs and outputs that can be used as general purpose IOs if not needed for modem control. So it should be possible for Z180 code to read the PS/2 clock and data lines directly though a UART register, aka "bit banging". So I wouldn't actually be using the UARTs receive line or using it as a UART at all. In fact, I think both UARTs could probably still be used for RS232 while also providing the general IOs needed by the PS/2 interface. For flow control, the host could instruct the PS/2 device to stop transmitting by pulling the PS/2 clock low, e.g. with an open drain modem control output.
3) I think a simple PS/2 receiver circuit could be made out of GAL22V10 (as a state machine and to interface with the CPU bus) and an 8-bit shift register and a few other parts.
I thought about going 3.3v for the board I'm working on at the moment but stayed at 5v with voltage shifting on some I/O. I'll be interested to see how a pure 3v3 setup works.My broad plan is for the Z180 bus to be all 3.3V. For that reason, I plan to make my bus expansion interface mechanically incompatible with existing 5V ones, such as RC2014, to avoid unfortunate accidents. I'll use 74AHC family for 3.3V logic and 74HCT or 74LS families for 5V logic. Then I ought to be able to feed 3.3V output to 5V inputs and vice versa; 74AHC is 5V tolerant even at 3.3V supply. I hope to keep 5V logic to a minimum; hopefully just external interfaces like PS/2 keyboard.One issue I haven't found a satisfying solution for is Z180 driven GPIOs. The Z80 PIO chip is not available in 3.3V variety. I wonder if I could make the Z180 talk I2C or SPI, I would use a modern bus expander IC instead
I am not sure the Z180 UART can be persuaded to talk to a PS/2 keyboard. It isn't a standard serial protocol but a rather strange synchronous clocked interface. As you are using an FPGA there are tons of FPGA PS/2 keyboard interface designs you could use instead.I have three ideas. 1) It's generally the PS/2 device rather than the host that pulses the PS/2 clock. I think I might be able to feed one of the UARTs the PS/2 keyboard clock as its asynchronous clock, probably inverted since PS/2 is negative edge triggered. Then configure it for 1 start bit, 1 odd parity bit and 1 stop bit and see what happens. PS/2 devices stop pulsing the clock when they have no data to transmit. That might be a problem if the UART is not happy with an intermittent clock. If it uses a phased locked loop based on the asynchronous clock then it might very well be a problem. It would be awesome if this could work though since then the keyboard driver could be byte oriented and interrupt driven.
At 18.432MHz, it should be fast enough to stress test my graphics card's bus interface. What I'm not sure about is what will happen if I drop in a slower CPU oscillator. Based on the schematic for SC503, I see the integrated UART clock is based on the CPU clock. Ideally, I want the UART to continue working when I use a slower oscillator, ideally with minimum reconfiguration. I've gleaned from this forum that RomWBW automatically figures out the CPU clock rate if a real-time clock is available and I can install a RTC module if it helps. Alternatively, I could reprogram the ROM whenever I change the oscillator, though that's inconvenient.
One thought I had is, if I replace the SC503 oscillator with one that's exactly half (9.216MHz) or quarter (4.608MHz) the original 18.432MHz, and no RTC is installed and without reprogramming the ROM, will the integrated UART simply operate at half or quarter baud rate? I.e. if I had it set up to use 115,200 baud at 18.432MHZ, if I then swap in a 9.216MHz oscillator, will Z180 UART baud rate simply halve to 57,600, even though it still "believes" the baud rate to be 115,200? That would be quite convenient for prototyping.
Another possible solution might be to add a separate UART module, e.g. SC520, having a dedicated UART oscillator, which would then be unaffected when I replaced the CPU oscillator?
--
You received this message because you are subscribed to a topic in the Google Groups "retro-comp" group.
To unsubscribe from this topic, visit https://groups.google.com/d/topic/retro-comp/n5j9NgVbNE8/unsubscribe.
To unsubscribe from this group and all its topics, send an email to retro-comp+...@googlegroups.com.
To view this discussion on the web visit https://groups.google.com/d/msgid/retro-comp/a8f36a10-05b1-4614-8158-64977f391b35n%40googlegroups.com.
The HBIOS driver provides 64x24 text mode. I've implemented all the VDA entry points and tested all but COPY and FILL. Does anyone know how to exercise the COPY and FILL entry points?
I found which ANSI sequences trigger COPY and FILL by reading the ANSI terminal code. WordStar gives them a workout.
I'm happy to submit a patch and I'll put it in the right branch. Let's see if there's any demand first. No reason to complicate the main repository if only one instance of this graphics card exists! I don't plan to make a kit or anything so that's pretty likely what will happen.