PiDP11 CONS PHY address lights

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Michael Katzmann

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May 22, 2026, 7:00:19 PM (12 days ago) May 22
to [PiDP-11]
Below is a small PDP11 assembler program that just loops.
It starts at 0100 with a nop and branches back.
The Address display on the PiDP11 shows toggling between 0102 and 0104 while running.
(possibly 0106 and 0100 also)

000100 000240 loop:    nop
000102 000776          br loop

Is this correct? It seems a little odd to me..  I would expect to see it flicker between 0100 and 0102 (without the B2 light showing at all (since address 0104 is never reached).

When I single step the code (HALT, CONT, CONT, CONT etc) it does show what I expect 0100, 0102, 0100, 0102 etc)

Michael


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Anton Lavrentiev

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May 22, 2026, 7:12:08 PM (12 days ago) May 22
to Michael Katzmann, [PiDP-11]
Well, 104 is reached since at the time when BR starts executing, PC has a value of 104, actually (it always has an address of the next instruction).
But I suppose the Address lamps reflect the bus address (rather than the internal CPU program counter), and 104 should never appear on the bus for your program, indeed.  Maybe the simulator pulls the address from the PC value, and that would explain the 104 flicker. However, 106 would be rather weird to observe at all.

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Michael Katzmann

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May 22, 2026, 7:57:57 PM (12 days ago) May 22
to Anton Lavrentiev, [PiDP-11]
This might be mimicking the prefetch action.

Johnny Billquist

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May 23, 2026, 12:48:03 AM (12 days ago) May 23
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At first, it sounds like a bug in the PiDP front panel handling.
But with that said, depending on how things are implemented, at
execution, the PC would become 104 after fetching the branch, before
executing it.
106 can really be just an effect of 102 and 104 showing up from time to
time, and causing it to look like 106, since that's just a visual "OR"
of the two.

As you can't single step individual microcode steps in simh, you'll of
course not see anything but 100 and 102 while single stepping.

Johnny
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John D. Bruner

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May 23, 2026, 10:51:29 AM (11 days ago) May 23
to Johnny Billquist, pid...@googlegroups.com
It looks like a bug in the REALCONS deltas to simh. The value it displays in the address LEDs after each instruction is executed is a copy of the PC that it saves after the first word of the instruction is fetched. This doesn't account for changes to the PC when the instruction is executed, such as fetching additional words for operand address calculation - or changes of control flow.

Thus, if you do a

reset
d -m 100 jmp .
go 100

it will display 102 in the address LEDs (even though the next sequential instruction would be at 104 and the jump changes the PC to 100).

This seems wrong, but ... what does the real hardware do?

--John
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Dwain Sims

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May 23, 2026, 11:01:38 AM (11 days ago) May 23
to John D. Bruner, Johnny Billquist, pid...@googlegroups.com
That was my first question.  What does an actual PDP-11 do!  

My other guess is that this has something to do with the speed of the underlying Raspberry Pi.  It is so fast compared to the original hardware.

Dwain


Steven A. Falco

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May 23, 2026, 2:26:11 PM (11 days ago) May 23
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Also, the LED driver code does averaging to make the LEDs change more slowly and smoothly. I have two PiDP-11 machines - one uses an RPi, and the lights are smoothed out so much that they look more like incandescent bulbs than LEDs. My other machine uses a PDP2011 FPGA, and the LEDs in that one are much more responsive. But I don't know which is correct behavior compared to a real 11/70.

Running 211bsd on my FPGA version the address LEDs flicker a lot even when the OS is mostly idle, while the RPi version smooths out the address so much that unless I look very closely I just see a single value when the OS is idle.

I know that Oscar did a lot of work to make the LEDs look just like the real "Miss Piggy" machine, but I don't know why they needed so much smoothing.

Steve

On 5/23/26 11:01 AM, Dwain Sims wrote:
> That was my first question.  What does an actual PDP-11 do!
>
> My other guess is that this has something to do with the speed of the underlying Raspberry Pi.  It is so fast compared to the original hardware.
>
> Dwain
>
>
> On Sat, May 23, 2026 at 10:51 AM 'John D. Bruner' via [PiDP-11] <pid...@googlegroups.com <mailto:pid...@googlegroups.com>> wrote:
>
> It looks like a bug in the REALCONS deltas to simh. The value it displays in the address LEDs after each instruction is executed is a copy of the PC that it saves after the first word of the instruction is fetched. This doesn't account for changes to the PC when the instruction is executed, such as fetching additional words for operand address calculation - or changes of control flow.
>
> Thus, if you do a
>
> reset
> d -m 100 jmp .
> go 100
>
> it will display 102 in the address LEDs (even though the next sequential instruction would be at 104 and the jump changes the PC to 100).
>
> This seems wrong, but ... what does the real hardware do?
>
> --John
>
> > > an email to pidp-11+u...@googlegroups.com <mailto:pidp-11%2Bunsu...@googlegroups.com>
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> > > utm_medium=email&utm_source=footer>.
> >
> > --
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Craig Altenburg

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May 23, 2026, 3:39:53 PM (11 days ago) May 23
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As I recall the actual PDP-11's lights were rather smooth.  The
incandescent lamps were never actually turned off.  When not glowing
they were connected to a "keep alive" voltage to keep the filament warm
but not glowing.  This kept the bulbs from burning out quickly with all
the on-and-offing.

Steven A. Falco

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May 23, 2026, 5:26:52 PM (11 days ago) May 23
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Is that true of the 11/70? From what I've read, the older 11/45 had incandescent lamps but I thought the 11/70 used LEDs. I'll have to try to dig up some old schematics.

John D. Bruner

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May 23, 2026, 5:28:12 PM (11 days ago) May 23
to Craig Altenburg, pid...@googlegroups.com
As I recall, the 11/70 front panel had LEDs (unlike earlier models that did use incandescent bulbs). So, perhaps it would be more faithful to the original hardware for server11 not to do the averaging.

--John
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Michael Katzmann

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May 23, 2026, 5:29:22 PM (11 days ago) May 23
to Steven A. Falco, pid...@googlegroups.com

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Steven A. Falco

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May 23, 2026, 5:52:37 PM (11 days ago) May 23
to Michael Katzmann, pid...@googlegroups.com
I looked at http://bitsavers.informatik.uni-stuttgart.de/pdf/dec/pdp11/1170/MP0KB11-C0_1170engDrw_Nov75.pdf page 51ff. and that shows LEDs too.

On 5/23/26 05:29 PM, Michael Katzmann wrote:
> The schematics say LEDs ... https://www.bitsavers.org/pdf/dec/pdp11/1170/1170_ctlPanelSchem.pdf <https://www.bitsavers.org/pdf/dec/pdp11/1170/1170_ctlPanelSchem.pdf>
>
>
> On Sat, May 23, 2026 at 5:26 PM Steven A. Falco <steve...@gmail.com <mailto:steve...@gmail.com>> wrote:
>
> Is that true of the 11/70?  From what I've read, the older 11/45 had incandescent lamps but I thought the 11/70 used LEDs.  I'll have to try to dig up some old schematics.
>
> On 5/23/26 03:39 PM, Craig Altenburg wrote:
> > As I recall the actual PDP-11's lights were rather smooth.  The incandescent lamps were never actually turned off.  When not glowing they were connected to a "keep alive" voltage to keep the filament warm but not glowing.  This kept the bulbs from burning out quickly with all the on-and-offing.
> >
> > On 23/05/2026 2:26 pm, Steven A. Falco wrote:
> >> Also, the LED driver code does averaging to make the LEDs change more slowly and smoothly.  I have two PiDP-11 machines - one uses an RPi, and the lights are smoothed out so much that they look more like incandescent bulbs than LEDs.  My other machine uses a PDP2011 FPGA, and the LEDs in that one are much more responsive. But I don't know which is correct behavior compared to a real 11/70.
> >
>
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Johnny Billquist

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May 23, 2026, 8:25:52 PM (11 days ago) May 23
to Dwain Sims, John D. Bruner, pid...@googlegroups.com
It's really hard to tell what the real hardware does, as it is running,
and you can't just look at the front panel and tell this detail easily.

Although, that example program would be a very interesting thing to try.
I would *guess* that address shows 100 the whole time. But all drawings,
and also flowcharts of the microcode is at bitsavers, so it might be
possible to find a proper answer there.

And no, this definitely have nothing to do with speed.

Johnny

On 2026-05-23 17:01, Dwain Sims wrote:
> That was my first question.  What does an actual PDP-11 do!
>
> My other guess is that this has something to do with the speed of the
> underlying Raspberry Pi.  It is so fast compared to the original hardware.
>
> Dwain
>
>
> On Sat, May 23, 2026 at 10:51 AM 'John D. Bruner' via [PiDP-11]
> <pid...@googlegroups.com <mailto:pid...@googlegroups.com>> wrote:
>
> It looks like a bug in the REALCONS deltas to simh. The value it
> displays in the address LEDs after each instruction is executed is a
> copy of the PC that it saves after the first word of the instruction
> is fetched. This doesn't account for changes to the PC when the
> instruction is executed, such as fetching additional words for
> operand address calculation - or changes of control flow.
>
> Thus, if you do a
>
> reset
> d -m 100 jmp .
> go 100
>
> it will display 102 in the address LEDs (even though the next
> sequential instruction would be at 104 and the jump changes the PC
> to 100).
>
> This seems wrong, but ... what does the real hardware do?
>
> --John
>
> On Friday, May 22nd, 2026 at 21:48, Johnny Billquist <b...@softjar.se
> <mailto:pidp-11%2Bunsu...@googlegroups.com>
> > > <mailto:pidp-11+u...@googlegroups.com
> <mailto:pidp-11%2Bunsu...@googlegroups.com>>.
> > > To view this discussion visit https://groups.google.com/d/
> msgid/pidp-11/ <https://groups.google.com/d/msgid/pidp-11/>
> > > CAMyt5OT%2B_NA5CfC-
> > > utm_medium=email&utm_source=footer>.
> >
> > --
> > Johnny Billquist                 || "I'm on a bus
> >                                    ||  on apsychedelic trip
> > email: b...@softjar.se <mailto:b...@softjar.se>            ||
> Reading murder books
> > pdp is alive!                     ||  tryin' to stay hip" - B. Idol
> >
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Johnny Billquist

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May 23, 2026, 8:32:21 PM (11 days ago) May 23
to pid...@googlegroups.com
The smoothing is there to solve the problem that the LEDs are updated
much less often than on real hardware, and at the updating frequency on
real hardware, you get into physical effects that is sortof smoothing as
well.

But with that said - it certainly do not look the same as on real
hardware, but at least on my machine it looks like an acceptable
approximation. But this is all very sensitive to multiple things. For
me, for example, it works very bad if I have any throttling on simh, but
I know that others have the complete opposite experience.

But if it looks like a single value on the address at idle, that seems
pretty reasonable. The machine will for an absolute majority of the time
just sit at one address.

Johnny

On 2026-05-23 20:26, Steven A. Falco wrote:
> Also, the LED driver code does averaging to make the LEDs change more
> slowly and smoothly.  I have two PiDP-11 machines - one uses an RPi, and
> the lights are smoothed out so much that they look more like
> incandescent bulbs than LEDs.  My other machine uses a PDP2011 FPGA, and
> the LEDs in that one are much more responsive.  But I don't know which
> is correct behavior compared to a real 11/70.
>
> Running 211bsd on my FPGA version the address LEDs flicker a lot even
> when the OS is mostly idle, while the RPi version smooths out the
> address so much that unless I look very closely I just see a single
> value when the OS is idle.
>
> I know that Oscar did a lot of work to make the LEDs look just like the
> real "Miss Piggy" machine, but I don't know why they needed so much
> smoothing.
>
>     Steve
>
> On 5/23/26 11:01 AM, Dwain Sims wrote:
>> That was my first question.  What does an actual PDP-11 do!
>>
>> My other guess is that this has something to do with the speed of the
>> underlying Raspberry Pi.  It is so fast compared to the original
>> hardware.
>>
>> Dwain
>>
>>
>> On Sat, May 23, 2026 at 10:51 AM 'John D. Bruner' via [PiDP-11]
>> <pid...@googlegroups.com <mailto:pid...@googlegroups.com>> wrote:
>>
>>     It looks like a bug in the REALCONS deltas to simh.The value it
>> displays in the address LEDs after each instruction is executed is a
>> copy of the PC that it saves after the first word of the instruction
>> is fetched. This doesn't account for changes to the PC when the
>> instruction is executed, such as fetching additional words for operand
>> address calculation - or changes of control flow.
>>
>>     Thus, if you do a
>>
>>     reset
>>     d -m 100 jmp .
>>     go 100
>>
>>     it will display 102 in the address LEDs (even though the next
>> sequential instruction would be at 104 and the jump changes the PC to
>> 100).
>>
>>     This seems wrong, but ... what does the real hardware do?
>>
>>     --John
>>
>>     On Friday, May 22nd, 2026 at 21:48, Johnny Billquist
>> <b...@softjar.se <mailto:b...@softjar.se>> wrote:
>>
>>      > At first, it sounds like a bug in the PiDP front panel handling.
>>      > But with that said, depending on how thingsare implemented, at
>>      > execution, the PC would become 104 after fetching the branch,
>> before
>>      > executing it.
>>      > 106 can really be just an effect of 102 and104 showing up from
>> time to
>>      > time, and causing it to look like 106, since that's just a
>> visual "OR"
>>      > of the two.
>>      >
>>      > As you can't single step individual microcode steps in simh,
>> you'll of
>>      > course not see anything but 100 and 102 while single stepping.
>>      >
>>      >    Johnny
>>      >
>>      > On 2026-05-23 01:00, Michael Katzmann wrote:
>>      > > Below is a small PDP11 assembler program that just loops.
>>      > > It starts at 0100 with a nop and branchesback.
>>      > > The Address display on the PiDP11 shows toggling between 0102
>> and 0104
>>      > > while running.
>>      > > (possibly 0106 and 0100 also)
>>      > >
>>      > > 000100 000240 loop:    nop
>>      > > 000102 000776          br loop
>>      > >
>>      > > Is this correct? It seems a little odd tome..  I would
>> expect to see it
>>      > > flicker between 0100 and 0102 (without the B2 light showing
>> at all
>>      > > (since address 0104 is never reached).
>>      > >
>>      > > When I single step the code (HALT, CONT, CONT, CONT etc) it
>> does show
>>      > > what I expect 0100, 0102, 0100, 0102 etc)
>>      > >
>>      > > Michael
>>      > >
>>      > >
>>      > > --
>>      > >     |\     _,,,---,,_             Michael Katzmann
>>      > >     /,`.-'`'    -.  ;-;;,_        NV3Z / VK2BEA / G4NYV
>>      > >    |,4-  ) )-,_. ,\ ( `'-'
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>>      > >
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Johnny Billquist

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May 23, 2026, 8:32:59 PM (11 days ago) May 23
to pid...@googlegroups.com
You are correct. The 11/70 have LEDs.

Johnny
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Johnny Billquist

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May 23, 2026, 8:34:17 PM (11 days ago) May 23
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Feel free to try it. It will not get anywhere close to matching the
actual hardware though.

It's a big difference running this all by software compared to actual
hardwire wired LEDs to signals... You will not be able to update the
LEDs at every instruction.

Johnny
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Michael Katzmann

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May 24, 2026, 12:27:48 AM (11 days ago) May 24
to [PiDP-11]
There is definitely something odd going on with blinkinlights.

If I do the same experiment ... 0240, & 0776 into address 0106 and 0110,
The address LEDs B6 (0100) and B3 (0010) are on without flicker and B1 (0002) flickering (~50 %).
In this case, at least some of the time LED B2 (0004) should be flickering (as the a bit in address of the first instruction (0106)) but it is totally off.

John D. Bruner

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May 24, 2026, 10:09:54 AM (10 days ago) May 24
to Michael Katzmann, pid...@googlegroups.com
That's because REALCONS it is only capturing and displaying the PC after the first word of each instruction is fetched. With that design the address LEDs will never show 106 in run mode. (They will work as expected when halted/stepped.) 

I think it's a bug, for which the fix is fairly simple - assuming (as seems likely) this is not what the real hardware does. 

John





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Michael Katzmann

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May 24, 2026, 11:04:24 AM (10 days ago) May 24
to John D. Bruner, pid...@googlegroups.com
The bad addresses are obtained here.

                unsigned val = SIGNAL_GET(cpusignal_memory_address_virt_register) & 0xffff;

When running my test val alternates between 0110 and 0112 (rather than 0106 and 0110). It's the correct value + 2.
I can add a kludge and just subtract 2 from the address obtained ... 
                unsigned val = (SIGNAL_GET(cpusignal_memory_address_virt_register) + 2) & 0xffff;
but that is not a great solution I think;

Johnny Billquist

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May 24, 2026, 11:22:19 AM (10 days ago) May 24
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I would completely agree. However, the possibly complicated thing is to
figure out exactly what the real hardware is showing.
It might be showing the address of the last read memory location, but
it's not completely obvious...

Johnny
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isy...@gmail.com

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May 24, 2026, 12:30:59 PM (10 days ago) May 24
to [PiDP-11]
Hi,
Determining the dynamic state of the LEDS is really hard for the 11/70, just about possible for the 11/20 and well defined for the PDP8.
The problem is that simh does not really implement a micro state machine for the pdp11 such that the internal data from simh is not a true
 reflection of the actual hardware except when the simulation is halted. I think Joerg mentions this point on his site. I would conclude
 that the running light patterns are only give an impression of activity rather than a true view. I would not suggest that this is a bug in the
 software but suggest that the display is the best that can be achieved using the multiplexed PiDP11 panel hardware. The best I have managed
 is near 100kHz for the PiDP8I which is still way too slow and I doubt if the PiDP11 panel can be driven at anywhere near this speed. In regard of
 alternatives, I have not examined Sytse's PDP2011 FPGA build to know if he has implemented  a micro state machine such that the activity
 on the internal buses (eg datapaths) is a closer reflection of the original.

Regards, Ian.

Johnny Billquist

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May 24, 2026, 12:40:37 PM (10 days ago) May 24
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There are two different things here.

1 is about the accuracy in terms of the frequency of updates, which
relates to how to represent what can be observed on the real frontpanel
by something like the PiDP-11, which drives the front panel in software.
As you observe, the update frequency will be nowhere near what hardware
does. And so you can do tricks like doing averaging on different LEDs to
sortof simulate the effect of LEDs going on and off at high frequencies.
This will never be 100% accurate, but can be approximated to some
(acceptable) degree.

2 is about what values to actually use for the front panel LEDs in the
first case. If we were to just take random numbers, it would obviously
be very incorrect. But the address display, for example, is showing some
address information. But what? As people have observed, it appears the
PiDP-11 is currently taking the updated PC after an instruction fetch
when running. Which would appear to be incorrect, as that is a value
that might not be anything the would be shown on real hardware ever. The
simple example of a loop that just branches to itself is the exellent
example. Someone should verify this, but I believe a real 11/70 will
show the address of the instruction in the address display. The PiDP-11
apparently will show PC+2. That's something that can be done correctly.

Johnny
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Michael Katzmann

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May 24, 2026, 2:57:41 PM (10 days ago) May 24
to John D. Bruner, pid...@googlegroups.com
Yes, there is the question of what a real 11/70 shows and also what the pidp11 / realcons can display.
This brings me to another problem that my little example brings to light.

If I have the two instructions (nop and jump), this executes many times in a sample period for the LED scanning.
It seems that the frequency of LED scanning is an even division to the instruction frequency. So with two instructions, the LED san for the address led only captures one of the addresses. (the samping aliases).

To get around this I added some randomness to the setting of the variable that the LED scanning process uses and now I see both addresses.

   1039                 unsigned val = SIGNAL_GET(cpusignal_memory_address_virt_register) & 0xffff;
   1040                 if( rand() & 1 ) {
   1041                     _this->leds_ADDRESS->value = val - 2;        
   1043                 }


I might have a line on someone who can check what a real 11/70 shows.

Sytse van Slooten

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May 24, 2026, 3:23:10 PM (10 days ago) May 24
to Johnny Billquist, pid...@googlegroups.com
It is even slightly more complicated.

1) A real PDP11 directly interfaces each led, and as such can drive those
leds at microcode cycle speed. The PiDP panel can not do that, because:
- it uses a matrix for the leds and switches, and it needs at least 10 or
12 cycles to address all of the led and switch banks;
- it uses a fairly antiquated darlington array, and if you drive that any
faster than (from mind) 10kHz, you'll get ghosting on leds that were not
addressed; I've always assumed this is caused by residual charge in the
array. It can be improved a bit by bypassing the array (it's not really
needed) but then you get into a similar issue at somewhat higher speeds,
that are still glacial compared to microcode cycles.

The PiDP software is further hampered by the client-server design,
although I'm not sure this still matters much with the latest Pi versions.
The PDP2011 has no such limitations, but it still has to deal with the
matrix and with the driver array, so the maximum practical update
frequency is very limited. I don't have the actual number for the update
frequency in my mind, but it is 'just' a couple of kHz.

To overcome that, both PiDP and PDP2011 use averaging, and of course that
will cause results that are different from the 'real' PDP11s; the more
'edge' a case is, the more likely it is that the patterns will be
different. Oscar spent a great deal of time investigating how to get as
close as reasonably possible - including travelling to Seattle together
with Joerg Hoppe and videotaping dozens of blinkenlight scenarios.

I have a couple of gigabytes of blinkenlights movie somewhere, thanks to
Oscar and Joerg, and was able to piggyback on that work - I don't have
access to PDP hardware, nor have I actually ever seen one working... but
my focus was on getting all known wait loop and XXDP blinkenlights
correct, not so much the timing since I knew that differences would be
inevitable anyway. Nevertheless, for the adventurous, there are two input
parameters to the paneldriver component in PDP2011: sample_cycles, which
allows you to influence the update frequency; and minon_cycle, which lets
you control at which average a led should turn on for that sample period.

As Steve noted, the PDP2011 blinkies are somewhat more 'nervous' than the
PiDP11 ones; I would expect you can tune that with the above two values.
I've never gotten around to doing a side by side comparison - I usually
have five or more setups of some kind of PDP2011 on my desk already, so it
takes a lot of effort to do that kind of thing, and it never got to the
top of my priority list to do that work.

Also, I honestly don't know what PDP2011 does in the scenario that started
this thread.

Which brings me to 2); the exact behaviour of all the leds is described in
excruciating detail in the data flow diagrams. So we should be able to
just derive how a 'real' 11/70 does this. Might be a lot of work, but
there should be no magic or mystery involved at all. The only thing that
complicates things is the cache.


As every time when this kind of question pops up, I'm away from my lab...
but back in a day or so. Looking forward to some hacking!

Cheers,
Sytse
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Michael Katzmann

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May 24, 2026, 3:33:44 PM (10 days ago) May 24
to Sytse van Slooten, Johnny Billquist, pid...@googlegroups.com
Yes, with the LEDs directly driven by the bus things are likely to be much different.
I forgot to mention the microcode. As far as I know simh does not simulate the microcode or the cache.
I understand that the address LEDs (when CONS PHY is selected) show the address accesses on the Unibus (not the PC).
This implies that the cache prefetch will also show up on a real machine but not in the simulated one. (Does the VHDL version implement the cache?)

Michael

Sytse van Slooten

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May 24, 2026, 3:56:24 PM (10 days ago) May 24
to Michael Katzmann, Johnny Billquist, pid...@googlegroups.com
No, simh does not simulate cache or microcode, and neither does PDP2011.
The vhdl model is actually slower than what current memories can do, so a
cache makes no sense - it just complicates things.

I don't think a cache fetch would show on a real machine for cons phy. But
I might be wrong there, I don't have any of the materials available at the
moment. That's the kind of detail that is somewhat difficult to derive
from the data flow diagrams.
>> https://groups.google.com/d/msgid/pidp-11/3b3711f6be3bcdc24b79312f963f0f9c.squirrel%40wortel.sytse.net
>> .
>>
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isy...@gmail.com

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May 24, 2026, 5:16:13 PM (10 days ago) May 24
to [PiDP-11]
Hi Johnny,

 I would entirely agree with your points above:
 1. This can be done if the relevant registers are sampled at a frequency corresponding to the smallest timestep of the hardware.
 This is about 4 MHz (250ns) for the PDP8 corresponding to 6 microstates per cycle. See page 4-25 in DEC-8I-HR1A-D_8Imaint_Mar70.pdf.
 This creates a PWM bitstream that can be averaged to estimate the LED luminance. (79 bitstreams).
 This becomes more difficult for the PDP11 in that the number of microstates per cycle varies with different instructions but might achievable
  and requires a sampling clock at least 10 MHz and I haven't counted the number of PWM bits required ... a lot! This being predicated upon
 the simulation software running the relevant microstates. I suspect that is possible for a bare metal Pi5.
2. I accept the PC issue might be a bug in that what is displayed is probably R7 + MMU bits rather than the actual bus address. For the 8I this is also the
case in that the PC is incremented at TP1 and updated via a direct JMP instruction at TP3. So you may see a partial PC+1 display for an indirect JMP
as there will be a DEFER cycle to obtain the actual target address. (This is not what is seen with the current PiDP8I build).
Going back to the PDP11, this should not be the case so far as I can tell from the
engineering drawings. However, the text in realcons_pdp11_70.txt suggests that the address should be correct. I can confirm that the address
display is in error when running this simple loop programme but it is correct in simh single step mode. 
I would note that this debate is paralleled in the 8I group:Incandescent Lamp Simulation Question with latest build.
As a final point, I do think it is worth trying to get the simulation right but this may require a substantial rebuild of the current software.

Regards, Ian.

isy...@gmail.com

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May 24, 2026, 5:26:29 PM (10 days ago) May 24
to [PiDP-11]
Hi Sytse,

 Many thanks for your note, I hoped you would reply, and as a result my note above is a bit out of sync. As per the detail, I think we can leave the cache out
 at the moment despite the fact that adding a cache module (KK11A) to my old 11/34 really did make a difference!!!!
 Any suggestions as to how to proceed? I would note that my efforts in this regard with the PiDP8I (Isysxp/PiDP8I: A cycle accurate build for the PiDP8/I)
 don't seem to have generated much interest.

Regards, Ian.

Johnny Billquist

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May 24, 2026, 6:10:32 PM (10 days ago) May 24
to pid...@googlegroups.com
On a real machine, I would expect to see some sort of a combination of
the two addresses, if you have a NOP and a JMP/BR. Some of the lights
would be less intense, but in a sense, a sort of OR of the two addresses.

And yeah, if the sampling is done in a bad way, it could lead to bad
behavior as well. I sortof was hoping that the sampling would be done at
every instruction executed. There is no real reason not to. It would not
cost crazy much, and will allow for a proper understanding of how bright
each lamp should be. Or at least that's my current thinking. But I
haven't looked at the code.

Johnny
> realcons_console_pdp11_70.c#L1039 <https://github.com/obsolescence/
> pidp11/blob/26d20beda0c6b5a1d3a5cb3d7a4dd494e02bff75/
> src/02.3_simh/4.x%2Brealcons/src/REALCONS/
> realcons_console_pdp11_70.c#L1039>
>
> When running my test val alternates between 0110 and 0112 (rather
> than 0106 and 0110). It's the correct value + 2.
> I can add a kludge and just subtract 2 from the address obtained ...
>                 unsigned val =
> (SIGNAL_GET(cpusignal_memory_address_virt_register) + 2) & 0xffff;
> but that is not a great solution I think;
>
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Johnny Billquist

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May 24, 2026, 6:15:39 PM (10 days ago) May 24
to Sytse van Slooten, Michael Katzmann, pid...@googlegroups.com
As far as the CPU is concerned, a fetch from memory is a fetch from
memory. The fact that it might be supplied by the cache don't make a
difference. Or at least that is my recollection.
So yes, a fetch that hits the cache shows up just like any other fetch.
The cache sits in front of the memory bus, and not somewhere magical in
the rest of the CPU.

Johnny

On 2026-05-24 21:56, Sytse van Slooten wrote:
> No, simh does not simulate cache or microcode, and neither does PDP2011.
> The vhdl model is actually slower than what current memories can do, soa
> cache makes no sense - it just complicates things.
>
> I don't think a cache fetch would show on a real machine for cons phy. But
> I might be wrong there, I don't have any of the materials available at the
> moment. That's the kind of detail that is somewhat difficult to derive
> from the data flow diagrams.
>
>
>> Yes, with the LEDs directly driven by the bus things are likely to be much
>> different.
>> I forgot to mention the microcode. As far as I know simh does not simulate
>> the microcode or the cache.
>> I understand that the address LEDs (when CONS PHY is selected) show the
>> address accesses on the Unibus (not the PC).
>> This implies that the cache prefetch will also show up on a real machine
>> but not in the simulated one. (Does the VHDL version implement the cache?)
>>
>> Michael
>>
>> On Sun, May 24, 2026 at 3:23 PM Sytse van Slooten <sy...@sytse.net>
>>>>> > On Fri, May 22, 2026 at 7:00 PM MichaelKatzmann

Manfred Koethe

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May 24, 2026, 9:52:29 PM (10 days ago) May 24
to [PiDP-11]
Don't underestimate the slowness of the human eye, you may not what is there.
Here is a little story:
In 1986/87 at DEC CSS Munich, I created the BTR01, a gateway to connect
Digital Numeric Controlled (DNC) manufacturing equipment. It was a BA11 box
containing a PDP-11/23, Memory, DEQNA, and the M7505 "Signal Conditioning
Module", which provided a highly configurable, optical isolated 8-bit bidirectional
interface. I needed an XXDP diagnostic for that, therefore we created a test
connector that could plug into the external connector of the BTR. That test
connector had 8 LEDs.... My diagnostic exercised a very large number of
test patterns, branching out of the loop on error, recording the conditions,
then resuming the loop. Being bored by the silent test, I programmed a
"light worm" of 6 illuminated LEDs coming out of the left edge, moving slowly
left to right, then disappearing right, then repeat. I figured out that 1024 test
pattern can be run until the light pattern needed to be restored for 2ms.
The observer saw only the slow moving light worm, the large number of
intermediate pattern were too fast for the eye to recognize, not even as a
glow. Funny enough, the branch out of the loop to record error conditions
caused severe distortion of the light pattern. That was an unintended
surprise which secured me the love of our field service colleagues.

Manfred

Johnny Billquist

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May 24, 2026, 10:06:23 PM (10 days ago) May 24
to pid...@googlegroups.com
Um. While both funny, interesting and true, I'm not sure what your point
was. I've more or less said the whole time that doing some averaging of
each bit and output dimmed LEDs based on averaing does a pretty good job
at approximating what the front panel LEDs look like on real hardware.
And the reason for that is exactly because the human eye cannot see fast
blinking lamps as blinks, but sees it as some dimmed value.

Same theory behind PWM for driving intensity in lamps and LEDs when you
only have on and off as alternatives.

Johnny
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Michael Katzmann

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May 24, 2026, 10:49:43 PM (10 days ago) May 24
to [PiDP-11]
One thing I noticed is that 'blinky' uses the address LEDs.

On a real machine it works as it does on the PiDP11.
The listing (BLINKY_LIST) in the zip on that page has the following ....
; -- ADDR LED patterns
000122 100000
000124 040002
000126 020006
000130 010016
000132 004036
000134 002076
000136 001176
000140 000376
000142 001176
000144 002076
000146 004036
000150 010016
000152 020006
000154 040002
000156 000000
000160 000000
000162 000160
Blinky (see video) has two illuminated LEDs approaching from the left and right.
If the PDP11/70 does act like the PiPD11, in as much as the address shown on the display is +2 of the instruction executed, then the numbers above make sense. They are two less than the expected pattern.

Michael Katzmann

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May 24, 2026, 11:41:56 PM (10 days ago) May 24
to [PiDP-11]
Well here is the proof that it does indeed display address+2...
The branch to itself 0777 is executed at 0700 and the display shows 0702 when running.
The PiDP11 does not show any activity on the DATA PATHS, but this might be because the real 11/70 is executing microcode.


On Fri, May 22, 2026 at 7:00 PM Michael Katzmann <vk2...@gmail.com> wrote:
Below is a small PDP11 assembler program that just loops.
It starts at 0100 with a nop and branches back.
The Address display on the PiDP11 shows toggling between 0102 and 0104 while running.
(possibly 0106 and 0100 also)

000100 000240 loop:    nop
000102 000776          br loop

Is this correct? It seems a little odd to me..  I would expect to see it flicker between 0100 and 0102 (without the B2 light showing at all (since address 0104 is never reached).

When I single step the code (HALT, CONT, CONT, CONT etc) it does show what I expect 0100, 0102, 0100, 0102 etc)

Michael


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Edward Tottenham

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May 25, 2026, 6:39:23 AM (9 days ago) May 25
to pid...@googlegroups.com

I think that what you are seeing there is the OR of 000070 and 000072 (not 700 and 702).

While the Microcode is in the Instruction Decode cycle (micro-Instruction 343 - IRD.00) it tentatively starts a DATI cycle to read the next location. If the instruction being decoded is a BR (or a Conditional Branch where the branch is taken), the next micro-instruction (320, 325, 326, 330, 335 or 336, depending on the type of branch) will do a BusEnd transaction on the bus, fix the value in the PC and the microcode will go back to the Instruction Fetch micro-instruction (micro-instruction 217 - FET.00). The address 72 will be on the bus from the 1st cycle of the Instructon Decode, to the 1st cycle of the Instruction Fetch which is 50% of the time since the entire Instruction fetch to Branch takes 4 microinstructions.

At least that's how my interpretation of the microcode works. But I could well be wrong.

Ed

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Jonathan Harston

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May 25, 2026, 10:28:13 AM (9 days ago) May 25
to [PiDP-11]
Coming into this discussion late, but my first thought is:
Do the LEDs display the state of the PC register?
Or do the LEDs display what is on the address bus when a READ+OPFETCH signal state is present?

Ed Tottenham

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May 25, 2026, 10:38:11 AM (9 days ago) May 25
to Jonathan Harston, [PiDP-11]
As I recall they show the address which is on the bus, read or write. 

Ed


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Ed Tottenham

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May 25, 2026, 10:50:29 AM (9 days ago) May 25
to Jonathan Harston, [PiDP-11]
As I recall they show the address which is on the bus, read or write. 

Ed


On May 25, 2026, at 15:28, Jonathan Harston <j...@mdfs.net> wrote:


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isy...@gmail.com

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May 25, 2026, 10:53:33 AM (9 days ago) May 25
to [PiDP-11]
Hi Ed,

 I very much doubt that the PDP11 does a speculative prefetch of the next location unlike modern CPUs. But this is a good suggestion.
 What does need sorting out is that when the PiDP11 runs this simple br loop, the light pattern is probably wrong but equally the lights flicker.
 The flickering is due to the sampling process in the panel software. I have resolved this on the PiDP8I by sampling the CPU state using a prime number
 divisor of the cpu cycle rate. This means that only a loop whose length is an integer multiple of  the prime will result in invalid sampling. The the sampled data
 is averaged (to simulate an incandescent bulb) and displayed. However, in the PI2350 version, the data is sampled at FETCH/DEFER and EXECUTE in the same way but used to light the LEDS
 without any averaging. As noted above, if the display rate is high enough the eye does the averaging. You might think that you should get away with a very
 low presentation rate eg 100Hz but surprisingly you don't. The eye still sees some flicker. I really had to push things up to 2KHz to get rid of this effect.
 This due to the fact that if the LEDS are going between full on and full off with nothing in between, flicker can be perceived up to
 about 160Hz. And, this assumes a 50-50 on/off ratio. If, say, the on/off ratio is 1 in 10 which gives a just perceptible glow, the flicker frequency is actually
 the display rate /10. In my case, 200 Hz. So, for a PWM system, the clock should be at least 160*10 Hz if not higher. For the WS2812 LED strip
 the PWM rate is said to be 2Khz, this is where the above figure comes from. To conclude, what is required is a reliable sampling algorithm and a display
 system which runs at around 2KHz. Challenge time....

Regards, Ian

Ed Tottenham

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May 25, 2026, 11:14:51 AM (9 days ago) May 25
to isy...@gmail.com, [PiDP-11]
If you read page II-1-7 if the processor manual, in the section "Instruction Decoding" It describes exactly that mechanism. IRD.00 begins a new transfer that fetches the word following the instruction word. Further down it explains how "in other cases, this data transfer operation is aborted by a Bus End (BEND) operation in the machine state following IRD.00"

This is also borne out in Flows 1 of the KB-11C Flow diagrams. 

I've been spending my spare time over the last couple of years implementing an FPGA version of the PDP 11/70 based on the microcode listings, processor manual and Engineering diagrams. 

Ed Tottenham

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May 25, 2026, 11:21:47 AM (9 days ago) May 25
to isy...@gmail.com, [PiDP-11]
The LEDs showing 1006 would, to my eyes be correct. Fetch of NOP at 1000, fetch of BR at 1002, aborted fetch of next word at 1004. OR'd together give an illusion of 1006.
On May 25, 2026, at 15:53, isy...@gmail.com <isy...@gmail.com> wrote:


isy...@gmail.com

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May 25, 2026, 11:22:36 AM (9 days ago) May 25
to [PiDP-11]
Well, you learn something new every day! Do we conclude that the address LEDS are correct and that simh actually does this prefetch?
I will have a look at the simh code but if anyone already knows the answer, do inform this group.

Michael Katzmann

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May 25, 2026, 11:25:46 AM (9 days ago) May 25
to Edward Tottenham, pid...@googlegroups.com
Yes you are probably right that both addresses are present.
The LED brightness of the B1 LED is on par with the B3-B5 LEDs (but that may be an artefact of the video).
If the fetch of the actual address and the following address is indicated on the LEDs, then it is curious in the 'blinky program you only ever see one LED on at a time. 

Michael Katzmann

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May 25, 2026, 11:31:33 AM (9 days ago) May 25
to Ed Tottenham, isy...@gmail.com, [PiDP-11]
The PiDP11 actually displays the address+2, so 1002 & 1004 which to the eye look like 1006. The actual address 1000 is never shown on the LEDs.
Maybe, what should be displayed is the address ored with address+2 to simulate the prefetch (although then the blinky wouldn't look right)

On Mon, May 25, 2026 at 11:21 AM Ed Tottenham <edw...@tottenham.name> wrote:
The LEDs showing 1006 would, to my eyes be correct. Fetch of NOP at 1000, fetch of BR at 1002, aborted fetch of next word at 1004. OR'd together give an illusion of 1006.


Johnny Billquist

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May 25, 2026, 11:34:08 AM (9 days ago) May 25
to pid...@googlegroups.com
Does the aborted fetch really show up on the address lights?

Johnny

On 2026-05-25 17:21, Ed Tottenham wrote:
> The LEDs showing 1006 would, to my eyes be correct. Fetch of NOP at
> 1000, fetch of BR at 1002, aborted fetch of next word at 1004. OR'd
> together give an illusion of 1006.
>
> Ed
>
> Get BlueMail for Mobile <https://bluemail.me/download/>
>
> On May 25, 2026, at 15:53, isy...@gmail.com <isy...@gmail.com
>> __
>>> https://groups.google.com/d/msgid/pidp-11/CAMyt5OT7OPeYZsQnifo2K%2Bhu1xSQjGi%2B%3DfSyr0Eop1wVPL2u0w%40mail.gmail.com <https://groups.google.com/d/msgid/pidp-11/CAMyt5OT7OPeYZsQnifo2K%2Bhu1xSQjGi%2B%3DfSyr0Eop1wVPL2u0w%40mail.gmail.com?utm_medium=email&utm_source=footer>.
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Ed Tottenham

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May 25, 2026, 1:06:18 PM (9 days ago) May 25
to Johnny Billquist, pid...@googlegroups.com
I would hope so. If you have a sequence of MOV Rn, Rx the each instruction would be fetched in the decode cycle of the preceding instruction. None would actually be read via the normal fetch mechanism. 


isy...@gmail.com

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May 25, 2026, 1:37:19 PM (9 days ago) May 25
to [PiDP-11]
Just had a look through the PDP11 realcons code and there is no obvious reference to an instruction prefetch state.
I would note that the PC is incremented prior to the instruction decode cycle at line 1120 in pdp11_cpu.c in the realcons repo
and that this incremented value seem to be used for the panel.
    PC = (PC + 2) & 0177777;                            /* incr PC, mod 65k */
#ifdef USE_REALCONS
    saved_PC = PC ; // saved_PC used in panel
#endif
However, the realcons interface seems to sample the actual PC value in:
    IR = ReadE (PC | isenable);                         /* fetch instruction */
at line 1092 which then calls
RETURN_REALCONS_CPU_PDP11_MEMACCESS_VA_PA_READ(cpu_realcons, va, pa, RdMemW (pa));
at line 2828. This data is then sent to the front panel server.
I think we may have to ask Joerg Hoppe what happens next and in particular, if the display is meaningful when the PDP11 is running.

Ed Tottenham

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May 25, 2026, 1:58:59 PM (9 days ago) May 25
to isy...@gmail.com, [PiDP-11]
I wasn't trying to imply that the Realcons implementation would do that. I was talking of the real thing. 

BTW, I keep saying an instruction prefetch, but all it is doing is to start reading the next word because it will either be one of the data words for the instruction being decoded, or it will be the next instruction. 

Ed Tottenham

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May 25, 2026, 2:04:06 PM (9 days ago) May 25
to Michael Katzmann, isy...@gmail.com, [PiDP-11]
Trying to get it to do exactly what the real thing does is not easy. 
As I just pointed out in another response, it isn't really an instruction prefetch, it's a fetch of the next word from memory which will hopefully be either one of the data words for the current instruction, or the next instruction. 

I think I see why Blinky shows the correct addresses, but I'll have to check it tomorrow. 

Ed Tottenham

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May 25, 2026, 2:11:23 PM (9 days ago) May 25
to isy...@gmail.com, [PiDP-11]
Does anyone have access to a real 11/70? 

It would be really instructional to load the following program at 1000.

Start:
        MOV  #20000, R0
        MOV  #40000, R1
        MOV  #1000, R2
1$:   MOV  (R0)+, (R1)+
        SOB     R2, 1$
         BR       Start

It would then be interesting to see if bits 13 and 14 of the address ever light up. 

That would tell us if the address lights indicate purely the address on the bus, be it read, write or only the instruction fetches. 

Johnny Billquist

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May 25, 2026, 2:14:42 PM (9 days ago) May 25
to Ed Tottenham, pid...@googlegroups.com
But none of them would have been aborted either. Anyway, I guess we
either try to dig through all kind of documentation, or someone with an
11/70 can do a small test. :-)

Johnny

On 2026-05-25 19:06, Ed Tottenham wrote:
> I would hope so. If you have a sequence of MOV Rn, Rx the each
> instruction would be fetched in the decode cycle of the preceding
> instruction. None would actually be read via the normal fetch mechanism.
>
> Get BlueMail for Mobile <https://bluemail.me/download/>
>
> On May 25, 2026, at 16:34, Johnny Billquist <b...@softjar.se
>>>     FET.00). The address 72 will be on the bus from the 1stcycle of
>>>     the Instructon Decode, to the 1st cycle of the Instruction Fetch
>>>     which is 50% of the time since the entire Instruction fetch to
>>>     Branch takes 4 microinstructions.
>>>
>>>     At least that's how my interpretation of the microcode works. But
>>>     I could well be wrong.
>>>
>>>     Ed
>>>
>>>
>>>     On 25/05/2026 04:41, Michael Katzmann wrote:
>>>     Well here is the proof that it does indeed display address+2...
>>>     https://www.youtube.com/watch?v=j3suW-WD5b4
>>>     <https://www.youtube.com/watch?v=j3suW-WD5b4>
>>>     The branch to itself 0777 is executed at 0700 and the display
>>>     shows 0702 when running.
>>>     The PiDP11 does not show any activity on the DATA PATHS, but this
>>>     might be because the real 11/70 is executing microcode.
>>>
>>>
>>>     On Fri, May 22, 2026 at 7:00 PM Michael Katzmann
>>>     <vk2...@gmail.com> wrote:
>>>
>>>         Below is a small PDP11 assembler program that just loops.
>>>         It starts at 0100 with a nop and branchesback.
>>>         The Address display on the PiDP11 shows toggling between 0102
>>>         and 0104 while running.
>>>         (possibly 0106 and 0100 also)
>>>
>>>         000100 000240 loop:    nop
>>>         000102 000776          br loop
>>>
>>>         Is this correct? It seems a little odd tome..  I would
>>>         expect to see it flicker between 0100 and0102 (without the
>>>         B2 light showing at all (since address 0104 is never reached).
>>>
>>>         When I single step the code (HALT, CONT, CONT, CONT etc) it
>>>         does show what I expect 0100, 0102, 0100,0102 etc)
>>> pidp-11/19f5fb950ff3a2.fd5b556229d7%40tottenham.name <https://
>>> groups.google.com/d/msgid/
>>> pidp-11/19f5fb950ff3a2.fd5b556229d7%40tottenham.name?

Johnny Billquist

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May 25, 2026, 2:28:11 PM (9 days ago) May 25
to pid...@googlegroups.com
That the PC is incremented right away is very reasonable.
That the saved PC is used for the front panel is in a sense not. I would
really expect it to be what's on the address bus, which would be the
address the instruction was read from.

It's a bit similar to if you go and single step on a cycle basis, and
not on an instruction basis. You'll see the address of whatever is on
the address bus at each cycle. Which at instruction fetch is the address
of the instruction, but after that you'll see addresses of arguments to
the instruction pass by.

Johnny

On 2026-05-25 19:37, isy...@gmail.com wrote:
> Just had a look through the PDP11 realcons code and there is no obvious
> reference to an instruction prefetch state.
> I would note that the PC is incremented prior to the instruction decode
> cycle at line 1120 in pdp11_cpu.c in the realcons repo
> and that this incremented value seem to be used for the panel.
>     PC = (PC + 2) & 0177777;                            /* incrPC, mod
> 65k */
> #ifdef USE_REALCONS
>     saved_PC = PC ; // saved_PC used in panel
> #endif
> However, the realcons interface seems to sample the actual PC value in:
>     IR = ReadE (PC | isenable);                        /* fetch
> instruction */
> at line 1092 which then calls
> RETURN_REALCONS_CPU_PDP11_MEMACCESS_VA_PA_READ(cpu_realcons, va, pa,
> RdMemW (pa));
> at line 2828. This data is then sent to the front panel server.
> I think we may have to ask Joerg Hoppe what happens next and in
> particular, if the display is meaningful when the PDP11 is running.
>
>
>
>
>
>
> On Monday, May 25, 2026 at 4:34:08 PM UTC+1 b...@softjar.se wrote:
>
> Does the aborted fetch really show up on the address lights?
>
> Johnny
>
> On 2026-05-25 17:21, Ed Tottenham wrote:
> > The LEDs showing 1006 would, to my eyes be correct. Fetch of NOPat
> > 1000, fetch of BR at 1002, aborted fetch of next word at 1004. OR'd
> > together give an illusion of 1006.
> >
> > Ed
> >
> > Get BlueMail for Mobile <https://bluemail.me/download/ <https://
> >>> <https://www.youtube.com/watch?v=j3suW-WD5b4 <https://
> CAMyt5OT7OPeYZsQnifo2K%2Bhu1xSQjGi%2B%3DfSyr0Eop1wVPL2u0w%40mail.gmail.com <https://groups.google.com/d/msgid/pidp-11/CAMyt5OT7OPeYZsQnifo2K%2Bhu1xSQjGi%2B%3DfSyr0Eop1wVPL2u0w%40mail.gmail.com> <https://groups.google.com/d/msgid/pidp-11/CAMyt5OT7OPeYZsQnifo2K%2Bhu1xSQjGi%2B%3DfSyr0Eop1wVPL2u0w%40mail.gmail.com?utm_medium=email&utm_source=footer <https://groups.google.com/d/msgid/pidp-11/CAMyt5OT7OPeYZsQnifo2K%2Bhu1xSQjGi%2B%3DfSyr0Eop1wVPL2u0w%40mail.gmail.com?utm_medium=email&utm_source=footer>>.
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> || on a psychedelic trip
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isy...@gmail.com

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May 25, 2026, 4:28:33 PM (9 days ago) May 25
to [PiDP-11]
I agree. Here is a video of my toy town 11/20 which is use for all sorts of nasty tests!
This is what I would expect to see. The address and data lights are from what is happening on the unibus.
This is the trivial nop/br loop running under RT11. For those with very sharp eyes, the data lights do actually ripple slightly.
This is due to the RT11 monitor which does interrupt the app from time to time. Anyway, what can be seen is an OR of the addresses
Johnny; You make a relevant point here. The PDP8/e in exam mode shows the current instruction in the MB lights but PC+1 in the PC lights.
This confused me no end when I was a callow youth!!!! The 8/I at least shows the actual address as well as the PC.

Ed Tottenham

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May 25, 2026, 4:43:39 PM (9 days ago) May 25
to isy...@gmail.com, [PiDP-11]
I see what looks like Windows wallpaper in the background, so I'm not sure whether we're looking at a real 11/20 or a simulation. 

Johnny Billquist

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May 25, 2026, 5:00:32 PM (9 days ago) May 25
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It looks impressively nice, but it certainly also looks like a
simulation. But I think we need Ian to clarify that one.

Johnny

On 2026-05-25 22:43, Ed Tottenham wrote:
> I see what looks like Windows wallpaper in the background, so I'm not
> sure whether we're looking at a real 11/20 or a simulation.
>
> Ed
>
> Get BlueMail for Mobile <https://bluemail.me/download/>
>
> On May 25, 2026, at 21:28, isy...@gmail.com <isy...@gmail.com
>> <https://bluemail.me/download/> <https://
>> > bluemail.me/download/ <http://bluemail.me/download/>>>
>> > >>  This due to the fact that if the LEDS are going betweenfull on
>> > www.youtube.com/watch?v=j3suW-WD5b4 <http://www.youtube.com/
>> watch?v=j3suW-WD5b4>>
>> > >>> <https://www.youtube.com/watch?v=j3suW-WD5b4 <https://
>> www.youtube.com/watch?v=j3suW-WD5b4> <https://
>> > www.youtube.com/watch?v=j3suW-WD5b4 <http://www.youtube.com/
>> > >>> https://groups.google.com/d/msgid/pidp-11/ <https://
>> groups.google.com/d/msgid/pidp-11/>
>> >
>> CAMyt5OT7OPeYZsQnifo2K%2Bhu1xSQjGi%2B%3DfSyr0Eop1wVPL2u0w%40mail.gmail.com <http://40mail.gmail.com> <https://groups.google.com/d/msgid/pidp-11/CAMyt5OT7OPeYZsQnifo2K%2Bhu1xSQjGi%2B%3DfSyr0Eop1wVPL2u0w%40mail.gmail.com <https://groups.google.com/d/msgid/pidp-11/CAMyt5OT7OPeYZsQnifo2K%2Bhu1xSQjGi%2B%3DfSyr0Eop1wVPL2u0w%40mail.gmail.com>> <https://groups.google.com/d/msgid/pidp-11/CAMyt5OT7OPeYZsQnifo2K%2Bhu1xSQjGi%2B%3DfSyr0Eop1wVPL2u0w%40mail.gmail.com?utm_medium=email&utm_source=footer <https://groups.google.com/d/msgid/pidp-11/CAMyt5OT7OPeYZsQnifo2K%2Bhu1xSQjGi%2B%3DfSyr0Eop1wVPL2u0w%40mail.gmail.com?utm_medium=email&utm_source=footer> <https://groups.google.com/d/msgid/pidp-11/CAMyt5OT7OPeYZsQnifo2K%2Bhu1xSQjGi%2B%3DfSyr0Eop1wVPL2u0w%40mail.gmail.com?utm_medium=email&utm_source=footer <https://groups.google.com/d/msgid/pidp-11/CAMyt5OT7OPeYZsQnifo2K%2Bhu1xSQjGi%2B%3DfSyr0Eop1wVPL2u0w%40mail.gmail.com?utm_medium=email&utm_source=footer>>>.
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>> <http://40googlegroups.com>>
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>> <http://40googlegroups.com>?
>> > utm_medium=email&utm_source=footer <https://groups.google.com/d/
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>> d/msgid/>
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>> > email: b...@softjar.se || Reading murder books
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>> --
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>> || on a psychedelic trip
>> email: b...@softjar.se || Reading murder books
>> pdp is alive! || tryin' to stay hip" - B. Idol
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isy...@gmail.com

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May 26, 2026, 4:31:14 AM (9 days ago) May 26
to [PiDP-11]
Hi all,

 Yes, this is a simulation with artwork courtesy of Joerg Hoppe. You can try the original from here.  Releases · j-hoppe/BlinkenBone
 For a comparison, try 11/20 paper tape basic and see what you think.

Johnny Billquist

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May 26, 2026, 11:26:04 AM (8 days ago) May 26
to pid...@googlegroups.com
Jacob Ritorto have a real 11/70, and did a small test.

Basically just at address 1000, a branch to self. Address lights are
constantly showing 1002.

Johnny

On 5/25/26 20:11, Ed Tottenham wrote:
> Does anyone have access to a real 11/70?
>
> It would be really instructional to load the following program at 1000.
>
> Start:
>         MOV  #20000, R0
>         MOV  #40000, R1
>         MOV  #1000, R2
> 1$:   MOV  (R0)+, (R1)+
>         SOB     R2, 1$
>          BR       Start
>
> It would then be interesting to see if bits 13 and 14 of the address
> ever light up.
>
> That would tell us if the address lights indicate purely the address on
> the bus, be it read, write or only the instruction fetches.
>
> Ed
>
> Get BlueMail for Mobile <https://bluemail.me/download/>
>
> On May 25, 2026, at 18:58, Ed Tottenham <edw...@tottenham.name
> <mailto:edw...@tottenham.name>> wrote:
>
>
>> I wasn't trying to imply that the Realcons implementation would do
>> that. I was talking of the real thing.
>>
>> BTW, I keep saying an instruction prefetch, but all it is doing is to
>> start reading the next word because it will either be one of the data
>> words for the instruction being decoded, or it will be the next
>> instruction.
>>
>> Ed
>>
>> Get BlueMail for Mobile <https://bluemail.me/download/>
>>
>> On May 25, 2026, at 18:37, isy...@gmail.com <isy...@gmail.com
>>> >>> https://www.youtube.com/watch?v=j3suW-WD5b4 <https://
>>> >>> https://groups.google.com/d/msgid/pidp-11/
>>> CAMyt5OT7OPeYZsQnifo2K%2Bhu1xSQjGi%2B%3DfSyr0Eop1wVPL2u0w%40mail.gmail.com <https://groups.google.com/d/msgid/pidp-11/CAMyt5OT7OPeYZsQnifo2K%2Bhu1xSQjGi%2B%3DfSyr0Eop1wVPL2u0w%40mail.gmail.com> <https://groups.google.com/d/msgid/pidp-11/CAMyt5OT7OPeYZsQnifo2K%2Bhu1xSQjGi%2B%3DfSyr0Eop1wVPL2u0w%40mail.gmail.com?utm_medium=email&utm_source=footer <https://groups.google.com/d/msgid/pidp-11/CAMyt5OT7OPeYZsQnifo2K%2Bhu1xSQjGi%2B%3DfSyr0Eop1wVPL2u0w%40mail.gmail.com?utm_medium=email&utm_source=footer>>.
>>> >>
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>>> utm_medium=email&utm_source=footer <https://groups.google.com/d/
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>>> pidp-11/46e2e17d-6134-4abc-8e27-29c435750862n%40googlegroups.com?
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>>> pidp-11/19f5fb950ff3a2.fd5b556229d7%40tottenham.name <https://
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>>> pidp-11/19f5fb950ff3a2.fd5b556229d7%40tottenham.name> <https://
>>> groups.google.com/d/msgid/
>>> pidp-11/19f5fb950ff3a2.fd5b556229d7%40tottenham.name?
>>> utm_medium=email&utm_source=footer <https://groups.google.com/d/
>>> msgid/pidp-11/19f5fb950ff3a2.fd5b556229d7%40tottenham.name?
>>> utm_medium=email&utm_source=footer>>.
>>>
>>> --
>>> Johnny Billquist || "I'm on a bus
>>> || on a psychedelic trip
>>> email: b...@softjar.se || Reading murder books
>>> pdp is alive! || tryin' to stay hip" - B. Idol
>>>
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>>> f0e88f0ea256n%40googlegroups.com?utm_medium=email&utm_source=footer>.
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isy...@gmail.com

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May 26, 2026, 11:32:24 AM (8 days ago) May 26
to [PiDP-11]
Hi Johnny,

 This is really useful info. Did you happen to ask Jacob if the bit 1 led is as bright as the bit 9?
 Theoretically, it should be dimmer....

Regards, Ian.

Edward Tottenham

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May 26, 2026, 11:40:50 AM (8 days ago) May 26
to pid...@googlegroups.com
That's interesting, but doesn't tell us all we need to know.

My opinion is that it is showing 1000 (The fetch of the Branch) and 1002
(the aborted fetch of the next word). The processor does actually get
bus mastership, puts the address 1002 on the bus and asserts MSYN, so it
is a genuine Bus Access. The only thing it doesn't do is to wait for the
SSYN from the slave.

It was why I proposed the little program below, it would give us a lot
more information.

For example Bits 13 and 14 would tell us whether all accesses show,
rather than just the PC.

Ed

On 26/05/2026 16:25, Johnny Billquist wrote:
> Jacob Ritorto have a real 11/70, and did a small test.
>
> Basically just at address 1000, a branch to self. Address lights are
> constantly showing 1002.
>
>   Johnny
>
> On 5/25/26 20:11, Ed Tottenham wrote:
>> Does anyone have access to a real 11/70?
>>
>> It would be really instructional to load the following program at 1000.
>>
>> 001000 012700  020000     Start:             MOV  #20000, R0
>> 001004 012701  040000                           MOV  #40000, R1
>> 001010 012702  001000                           MOV  #1000, R2
>> 001014 012021                   1$:                 MOV  (R0)+, (R1)+
>> 001016 077202                                          SOB  R2, 1$
>> 001020 000767                                         BR  Start1

Johnny Billquist

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May 26, 2026, 11:48:18 AM (8 days ago) May 26
to pid...@googlegroups.com
Jacobs comment:

"checked just now. stays on steady reading 1002"

I'm reading that as the both LEDs are as bright, but I'll ask.

Johnny
>>>>>     >>  I very much doubt that the PDP11 does aspeculative prefetch
>>>>>     of the
>>>>>     >> next location unlike modern CPUs. But this isa good
>>>>> suggestion.
>>>>>     >>  What does need sorting out is that whenthe PiDP11 runs this
>>>>>     >> still sees some flicker. I really had to pushthings up to
>>>>>     2KHz to get
>>>>>     >> rid of this effect.
>>>>>     >>  This due to the fact that if the LEDS are going between full
>>>>>     on and
>>>>>     >> full off with nothing in between, flicker canbe perceived
>>>>> up to
>>>>>     >>  about 160Hz. And, this assumes a 50-50 on/off ratio. If,say,
>>>>>     the
>>>>>     >> on/off ratio is 1 in 10 which gives a just perceptible glow,
>>>>> the
>>>>>     >> flicker frequency is actually
>>>>>     >>  the display rate /10. In my case, 200 Hz. So, for a PWM
>>>>>     system, the
>>>>>     >> clock should be at least 160*10 Hz if not higher. For the
>>>>>     WS2812 LED strip
>>>>>     >>  the PWM rate is said to be 2Khz, this is where the above
>>>>>     figure comes
>>>>>     >> from. To conclude, what is required is a reliable sampling
>>>>>     algorithm
>>>>>     >> and a display
>>>>>     >>  system which runs at around 2KHz. Challenge time....
>>>>>     >>
>>>>>     >> Regards, Ian
>>>>>     >> On Monday, May 25, 2026 at 11:39:23 AM UTC+1
>>>>>     edw...@tottenham.name wrote:
>>>>>     >>
>>>>>     >> __
>>>>>     >>
>>>>>     >> I think that what you are seeing there is theOR of 000070 and
>>>>>     >>> The PiDP11 does not show any activity on theDATA PATHS, but

Edward Tottenham

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May 26, 2026, 11:48:44 AM (8 days ago) May 26
to Michael Katzmann, pid...@googlegroups.com

I've been looking at the whole thing of how Blinky works. It throws in some new questions.

As far as I can see, with the switch set to CONS PHY, the Address Lights show the last address set on the Switch Register, or if the processor is running, the last value written to 1777570. This is how Blink writes its rotating pattern into the Address lights. Otherwise, how could it execute at an address for a second or so, then jump somewhere else for a second or so.

When the switch is set to PROG PHY then the Address lights show the address put onto the bus by the MMU.

This doesn't seem to be the case with the PiDP 11/70.


Ed

isy...@gmail.com

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May 26, 2026, 11:57:02 AM (8 days ago) May 26
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Hi Johnny,

 Ummm. I think I got this wrong. Jacob's programme is just BR 1000 and not NOP, BR 1000. Is this correct?
 If so, I am puzzled as to why bit 1 should light at all as the PC should only be 1002 transiently before being set to 1000 again.....???

Regards, Ian.

Jacob Ritorto

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May 26, 2026, 11:57:29 AM (8 days ago) May 26
to Johnny Billquist, pid...@googlegroups.com
Hi everybody, sorry to arrive late to the scene, travel over the weekend.

So for Johnny's 777 test, I can't see a difference in brightness of bit 9 vs bit 1.  Both seem to be 'on solid.'  I imagine a scope could reveal more :)

Johnny Billquist

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May 26, 2026, 12:01:50 PM (8 days ago) May 26
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On 5/26/26 17:57, isy...@gmail.com wrote:
> Hi Johnny,
>
>  Ummm. I think I got this wrong. Jacob's programme is just BR 1000 and
> not NOP, BR 1000. Is this correct?

Corect. Because I asked for that, as I considered that the most basic
test, which would tell a lot.

>  If so, I am puzzled as to why bit 1 should light at all as the PC
> should only be 1002 transiently before being set to 1000 again.....???

So it would appear it's showing the PC. After each instruction fetch the
PC is first of all incremented, so it would be 1002 after the fetch of
the instruction in this simple test.

Johnny

>
> Regards, Ian.
>
>
> On Tuesday, May 26, 2026 at 4:48:44 PM UTC+1 edw...@tottenham.name wrote:
>
> __
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Edward Tottenham

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May 26, 2026, 12:01:59 PM (8 days ago) May 26
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Hi Ian,

It's not really that Transient. The Processor launches a DATI cycle to read the next word of memory, but in the cycle where it would normally take the data off the bus, or pause the microcode clocks if the data is not ready, it chooses to ignore the data and restart the DATI cycle at the correct address. If you had a logic analyzer, it is quite likely that you would see the contents of the next word placed on the bus by the memory of cache controller.

Ed

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Edward Tottenham

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May 26, 2026, 12:03:24 PM (8 days ago) May 26
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As I say, I don't think it shows the PC, I think it shows whatever
address is placed onto the bus by the MMU.

Ed

Johnny Billquist

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May 26, 2026, 12:04:11 PM (8 days ago) May 26
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Well, the cache controller don't initiate any memory reads on its own,
ever. So it's based on a read by the CPU.

Besides, the cache controller, along with the memory bus, is actually
working on 32-bit data all the time at reads.

Johnny
>> To view this discussion visit https://groups.google.com/d/msgid/
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Johnny Billquist

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May 26, 2026, 12:06:03 PM (8 days ago) May 26
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That's definitely a possibility. But if so, that is an address placed
there because of the start of a fetch based on the PC.

Johnny

On 5/26/26 18:02, Edward Tottenham wrote:
> As I say, I don't think it shows the PC, I think it shows whatever
> address is placed onto the bus by the MMU.
>
> Ed
>
>
> On 26/05/2026 17:01, Johnny Billquist wrote:
>> On 5/26/26 17:57, isy...@gmail.com wrote:
>>> Hi Johnny,
>>>
>>>   Ummm. I think I got this wrong. Jacob's programme is justBR 1000
>>> and not NOP, BR 1000. Is this correct?
>>
>> Corect. Because I asked for that, as I considered that the most basic
>> test, which would tell a lot.
>>
>>>   If so, I am puzzled as to why bit 1 should light at all as the PC
>>> should only be 1002 transiently before being set to 1000 again.....???
>>
>> So it would appear it's showing the PC. After each instruction fetch
>> the PC is first of all incremented, so it would be 1002 after the
>> fetch of the instruction in this simple test.
>>
>>   Johnny
>>
>>>
>>> Regards, Ian.
>>>
>>>
>>> On Tuesday, May 26, 2026 at 4:48:44 PM UTC+1 edw...@tottenham.name
>>> wrote:
>>>
>>>     __
>>>
>>>     I've been looking at the whole thing of how Blinkyworks. It throws
>>>     in some new questions.
>>>
>>>     As far as I can see, with the switch set to CONS PHY, the Address
>>>     Lights show the last address set on the Switch Register, or if the
>>>     processor is running, the last value written to 1777570. This is how
>>>     Blink writes its rotating pattern into the Addresslights.
>>>     Otherwise, how could it execute at an address for a second or so,
>>>     then jump somewhere else for a second or so.
>>>
>>>     When the switch is set to PROG PHY then the Address lights show the
>>>     address put onto the bus by the MMU.
>>>
>>>     This doesn't seem to be the case with the PiDP 11/70.
>>>
>>>
>>>     Ed
>>>
>>>
>>>     On 25/05/2026 16:25, Michael Katzmann wrote:
>>>>     Yes you are probably right that both addresses are present.
>>>>     The LED brightness of the B1 LED is on par with the B3-B5 LEDs
>>>>     (but that may be an artefact of the video).
>>>>     If the fetch of the actual address and the following address is
>>>>     indicated on the LEDs, then it is curious in the 'blinky program
>>>>     you only ever see one LED on at a time.
>>>>
>>>>     On Mon, May 25, 2026 at 6:39 AM Edward Tottenham
>>>>     <edw...@tottenham.name> wrote:
>>>>
>>>>         I think that what you areseeing there is the OR of 000070 and
>>>>         000072 (not 700 and 702).
>>>>
>>>>         While the Microcode is inthe Instruction Decode cycle (micro-
>>>>         Instruction 343 - IRD.00)it tentatively starts a DATI cycle
>>>>         to read the next location. If the instruction being decoded is
>>>>         a BR (or a Conditional Branch where the branch is taken), the
>>>>         next micro-instruction (320, 325, 326, 330, 335 or 336,
>>>>         depending on the type of branch) will do a BusEnd transaction
>>>>         on the bus, fix the valuein the PC and the microcode will go
>>>>         back to the Instruction Fetch micro-instruction (micro-
>>>>         instruction 217 - FET.00). The address 72 will be on the bus
>>>>         from the 1st cycle of theInstructon Decode, to the 1st cycle

Edward Tottenham

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May 26, 2026, 12:06:17 PM (8 days ago) May 26
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Yes, the read transation (the DATI) is done by the CPU in
microinstruction IRD.00.

isy...@gmail.com

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May 26, 2026, 12:06:49 PM (8 days ago) May 26
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Hi Jacob,

 Thanks for this info and I wish I had a real 11/70! Anyway, this does suggest that the realcons display is correct
 as for this 777 test, bit 1 and bit 9 are solid on with the same brightness. Could I kindly ask you to run
another test:   1000: 240 1002: 776 and maybe send us a video...

Thanks, Ian

Edward Tottenham

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May 26, 2026, 12:08:05 PM (8 days ago) May 26
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Which is what I keep insisting on. It is the fetch of the next word
which would normally be the first word of data for the instruction, or
the next instruction, do0ne in IRD.00 of the microcode.

Ed

Johnny Billquist

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May 26, 2026, 12:10:39 PM (8 days ago) May 26
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Well. That seems to become just a circumvent way of saying it shows the
updated PC. :-)

Or would it at some point show something else?

Johnny

On 5/26/26 18:07, Edward Tottenham wrote:
> Which is what I keep insisting on. It is the fetch of the next word
> which would normally be the first word of data for the instruction, or
> the next instruction, do0ne in IRD.00 of the microcode.
>
> Ed
>
> On 26/05/2026 17:05, Johnny Billquist wrote:
>> That's definitely a possibility. But if so, that is an address placed
>> there because of the start of a fetch based on the PC.
>>
>>   Johnny
>>
>> On 5/26/26 18:02, Edward Tottenham wrote:
>>> As I say, I don't think it shows the PC, I think it shows whatever
>>> address is placed onto the bus by the MMU.
>>>
>>> Ed
>>>
>>>
>>> On 26/05/2026 17:01, Johnny Billquist wrote:
>>>> On 5/26/26 17:57, isy...@gmail.com wrote:
>>>>> Hi Johnny,
>>>>>
>>>>>   Ummm. I think I got this wrong. Jacob's programme is justBR 1000
>>>>> and not NOP, BR 1000. Is this correct?
>>>>
>>>> Corect. Because I asked for that, as I considered that the most
>>>> basic test, which would tell a lot.
>>>>
>>>>>   If so, I am puzzled as to why bit 1 should light at allas the PC
>>>>> should only be 1002 transiently before being set to 1000 again.....???
>>>>
>>>> So it would appear it's showing the PC. After each instruction fetch
>>>> the PC is first of all incremented, so it would be 1002 after the
>>>> fetch of the instruction in this simple test.
>>>>
>>>>   Johnny
>>>>
>>>>>
>>>>> Regards, Ian.
>>>>>
>>>>>
>>>>> On Tuesday, May 26, 2026 at 4:48:44 PM UTC+1 edw...@tottenham.name
>>>>> wrote:
>>>>>
>>>>>     __
>>>>>
>>>>>     I've been looking at the whole thing of how Blinkyworks. It throws
>>>>>     in some new questions.
>>>>>
>>>>>     As far as I can see, with the switch set to CONSPHY, the Address
>>>>>     Lights show the last address set on the Switch Register, or if the
>>>>>     processor is running, the last value written to 1777570. This
>>>>> is how
>>>>>     Blink writes its rotating pattern into the Addresslights.
>>>>>     Otherwise, how could it execute at an address for a second or so,
>>>>>     then jump somewhere else for a second or so.
>>>>>
>>>>>     When the switch is set to PROG PHY then the Address lights show
>>>>> the
>>>>>     address put onto the bus by the MMU.
>>>>>
>>>>>     This doesn't seem to be the case with the PiDP 11/70.
>>>>>
>>>>>
>>>>>     Ed
>>>>>
>>>>>
>>>>>     On 25/05/2026 16:25, Michael Katzmann wrote:
>>>>>>     Yes you are probably right that both addresses are present.
>>>>>>     The LED brightness of the B1 LED is on par withthe B3-B5 LEDs
>>>>>>     (but that may be an artefact of the video).
>>>>>>     If the fetch of the actual address and the following address is
>>>>>>     indicated on the LEDs, then it is curious in the 'blinky program
>>>>>>     you only ever see one LED on at a time.
>>>>>>
>>>>>>     On Mon, May 25, 2026 at 6:39 AM Edward Tottenham
>>>>>>     <edw...@tottenham.name> wrote:
>>>>>>
>>>>>>         I think that what you areseeing there is the OR of 000070 and
>>>>>>         000072 (not 700 and 702).
>>>>>>
>>>>>>         While the Microcode is inthe Instruction Decode cycle (micro-
>>>>>>         Instruction 343 - IRD.00)it tentatively starts a DATI cycle
>>>>>>         to read the next location. If the instruction being
>>>>>> decoded is
>>>>>>         a BR (or a Conditional Branch where the branch is taken), the
>>>>>>         next micro-instruction (320, 325, 326, 330, 335 or 336,
>>>>>>         depending on the type of branch) will do a BusEnd transaction
>>>>>>         on the bus, fix the valuein the PC and the microcode will go
>>>>>>         back to the InstructionFetch micro-instruction (micro-

isy...@gmail.com

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May 26, 2026, 12:13:49 PM (8 days ago) May 26
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Hi Ed,

 Again, I agree with you on this one. But, why does the DATI cycle for the BR instruction fetch not result
 in the address 1000 being displayed such that the bit 1 LED should be a bit dimmer. Could the BR instruction
 be coming from the cache in which case, all bus DATIs would for address 1002 and we would never see 1000 displayed????

Regards, Ian.

Edward Tottenham

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May 26, 2026, 12:16:17 PM (8 days ago) May 26
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Yes, it could be showing the address of each of the two data words in turn.

If you do a MOV    @(R3)+. @(R2)+ the processor will not do the
tentative fetch, based on the addressing mode of the instruction. So the
next address put out on the bus will be the value that is in R3, rather
than the PC. That will be repeated for R2, then the updated PC will go out.

Ed

Jacob Ritorto

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May 26, 2026, 12:17:07 PM (8 days ago) May 26
to isy...@gmail.com, [PiDP-11]
My pleasure!
Pls see attachment
Video.mov

Johnny Billquist

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May 26, 2026, 12:17:16 PM (8 days ago) May 26
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Again - the front panel do not interact with the cache.

Johnny
> >>>>   Ummm. I think I got this wrong. Jacob's programmeis justBR
> >>>>>     Yes you are probably right thatboth addresses are present.
> >>>>>     The LED brightness of the B1 LED is on par with the B3-B5
> LEDs
> >>>>>     (but that may be an artefact of the video).
> >>>>>     If the fetch of the actual address and the following
> address is
> >>>>>     indicated on the LEDs, then it is curiousin the 'blinky
> program
> >>>>>     you only ever see one LED on at a time.
> >>>>>
> >>>>>     On Mon, May 25, 2026 at 6:39 AM Edward Tottenham
> >>>>>     <edw...@tottenham.name> wrote:
> >>>>>
> >>>>>         I think that whatyou areseeing there is the OR of
> 000070 and
> >>>>>         000072 (not 700 and 702).
> >>>>>
> >>>>>         While the Microcode is inthe Instruction Decode cycle
> (micro-
> >>>>>         Instruction 343 -IRD.00)it tentatively starts a DATI
> cycle
> >>>>>         to read the next location. If the instruction being
> >>>>> decoded is
> >>>>>         a BR (or a Conditional Branch where the branch is
> taken), the
> >>>>>         next micro-instruction (320, 325, 326, 330, 335 or 336,
> >>>>>         depending on the type of branch) will do a BusEnd
> transaction
> >>>>>         on the bus, fix the valuein the PC and the microcode
> will go
> >>>>>         back to the Instruction Fetch micro-instruction (micro-
> >>>>>         instruction 217 -FET.00). The address 72 will be on
> the bus
> >>>>>         from the 1st cycle of theInstructon Decode, to the
> 1st cycle
> >>>>>         of the Instruction Fetch which is 50% of the time
> since the
> >>>>>         entire Instruction fetch to Branch takes 4
> microinstructions.
> >>>>>
> >>>>>         At least that's how my interpretation of the
> microcode works.
> >>>>>         But I could well be wrong.
> >>>>>
> >>>>>         Ed
> >>>>>
> >>>>>
> >>>> --
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Edward Tottenham

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May 26, 2026, 12:17:52 PM (8 days ago) May 26
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Hi Ian,

It would still have to fetch the instruction again with a read of address 1000, so 1000 will again go out on the bus.

Regards Ed

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Edward Tottenham

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May 26, 2026, 12:23:54 PM (8 days ago) May 26
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Hi Jacob

Could I also ask you to try this one:

001000 012700  020000     Start:             MOV  #20000, R0
001004 012701  040000                           MOV  #40000, R1
001010 012702  001000                           MOV  #1000, R2
001014 012021                   1$:                 MOV  (R0)+, (R1)+
001016 077202                                          SOB  R2, 1$
001020 000767                                         BR  Start

It would certainly fix things in my mind better

If so, thanks

Ed



On 26/05/2026 17:16, Jacob Ritorto wrote:
My pleasure!
Pls see attachment
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On May 26, 2026, at 12:13, isy...@gmail.com <isy...@gmail.com> wrote:

Hi Ed,
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Message has been deleted

Michael Katzmann

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May 26, 2026, 12:42:57 PM (8 days ago) May 26
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not so fast .. Jacob ran the test of mine..  240 (nop) in 104 and br in 106.

single-stepping the front panel does just what you say, illuminating 104 and 106.
However when you actually run it, it glows 116 with the middle 1 a little dimmer.
So some interesting nuances revealed about how the real display samples things, here, eh?

So, this IS different than REALCONS/PiDP11.
In the actual 11/70, 102, 104 and 110 are accessed (hence you see the 'or' of all these addresses).
On the PiDP11 you only see the PC+2, (104 and 110 appearing as 114)


Michael Katzmann

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May 26, 2026, 12:48:38 PM (8 days ago) May 26
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oops..
Never mind.. I messed that up... but I think the PiDP11 will only show the PC+2 , i.e. not the first instruction address.

Johnny Billquist

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May 26, 2026, 12:53:08 PM (8 days ago) May 26
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Why would 102 be accessed?
It would be 104, 106 and 110, no?
And I would probably have expected both bit 1 and 3 to be a bit dimmer,
since they wouldn't be on for more than 1/3 of the time, while bit 2
would be on 2/3, and bit 6 on all the time.

Or did I miss something?

Johnny


On 5/26/26 18:42, Michael Katzmann wrote:
> not so fast .. Jacob ran the test of mine..  240 (nop) in 104 and br in 106.
>
> single-stepping the front panel does just what you say, illuminating 104
> and 106.
> However when you actually run it, it glows 116 with the middle 1 a
> little dimmer.
> So some interesting nuances revealed about how the real display samples
> things, here, eh?
>
> So, this IS different than REALCONS/PiDP11.
> In the actual 11/70, 102, 104 and 110 are accessed (hence you see the
> 'or' of all these addresses).
> On the PiDP11 you only see the PC+2, (104 and 110 appearing as 114)
>
>
> On Tue, May 26, 2026 at 12:06 PM isy...@gmail.com
> <mailto:isy...@gmail.com> <isy...@gmail.com <mailto:isy...@gmail.com>>
> wrote:
>
> Hi Jacob,
>
>  Thanks for this info and I wish I had a real 11/70! Anyway, this
> does suggest that the realcons display is correct
>  as for this 777 test, bit 1 and bit 9 are solid on with the same
> brightness. Could I kindly ask you to run
> another test:   1000: 240 1002: 776 and maybe send us a video...
>
> Thanks, Ian
>
>
>
> On Tuesday, May 26, 2026 at 4:57:29 PM UTC+1 jacob....@gmail.com
> >>>>>     > The LEDs showing 1006 would, tomy eyes be
> correct. Fetch of
> >>>>>     NOP at
> >>>>>     > 1000, fetch of BR at 1002, aborted fetch of
> next word at 1004.
> >>>>>     OR'd
> >>>>>     > together give an illusion of 1006.
> >>>>>     >
> >>>>>     > Ed
> >>>>>     >
> >>>>>     > Get BlueMail for Mobile <https://bluemail.me/
> download/ <https://bluemail.me/download/>
> >>>>>     <https://bluemail.me/download/ <https://
> bluemail.me/download/>>>
> >>>>>     >
> >>>>>     > On May 25, 2026, at 15:53, isy...@gmail.com
> <isy...@gmail.com
> >>>>>     > <mailto:isy...@gmail.com>> wrote:
> >>>>>     >
> >>>>>     >
> >>>>>     >> Hi Ed,
> >>>>>     >>
> >>>>>     >>  I very much doubt that the PDP11 does
> aspeculative prefetch
> >>>>>     of the
> >>>>>     >> next location unlike modern CPUs. But this isa
> good
> >>>>> suggestion.
> >>>>>     >>  What does need sorting out is that whenthe
> PiDP11 runs this
> >>>>>     simple
> >>>>>     >> br loop, the light pattern is probably wrong
> but equally the
> >>>>>     lights
> >>>>>     >> flicker.
> >>>>>     >>  The flickering is due tothe sampling process
> in the panel
> >>>>>     software.
> >>>>>     >> I have resolved this on the PiDP8I by sampling
> the CPU state
> >>>>>     using a
> >>>>>     >> prime number
> >>>>>     >>  divisor of the cpu cyclerate. This means
> that only a loop
> >>>>> whose
> >>>>>     >> length is an integer multiple of  the prime
> will result in
> >>>>>     invalid
> >>>>>     >> sampling. The the sampled data
> >>>>>     >>  is averaged (to simulatean incandescent
> bulb) and displayed.
> >>>>>     >> However, in the PI2350 version, the data is
> sampled at FETCH/
> >>>>>     DEFER and
> >>>>>     >> EXECUTE in the same way but used to light theLEDS
> >>>>>     >>  without any averaging. As noted above, if the
> display rate is
> >>>>>     high
> >>>>>     >> enough the eye does the averaging. You might
> think that you
> >>>>>     should get
> >>>>>     >> away with a very
> >>>>>     >>  low presentation rate eg100Hz but
> surprisingly you don't.
> >>>>>     The eye
> >>>>>     >> still sees some flicker. I really had to
> pushthings up to
> >>>>>     2KHz to get
> >>>>>     >> rid of this effect.
> >>>>>     >>  This due to the fact that if the LEDS are
> going between full
> >>>>>     on and
> >>>>>     >> full off with nothing in between, flicker
> canbe perceived
> >>>>> up to
> >>>>>     >>  about 160Hz. And, this assumes a 50-50 on/off
> ratio. If,say,
> >>>>>     the
> >>>>>     >> on/off ratio is 1 in 10 which gives a just
> perceptible glow,
> >>>>> the
> >>>>>     >> flicker frequency is actually
> >>>>>     >>  the display rate /10. Inmy case, 200 Hz. So,
> >>>>>     >> on the type of branch) will doa BusEnd
> transaction on the bus,
> >>>>>     >> fix the value in the PC and the microcode will
> go back to the
> >>>>>     >> Instruction Fetch micro-instruction (micro-
> instruction 217 -
> >>>>>     >> FET.00). The address 72 will be on the bus
> from the 1st
> >>>>> cycle of
> >>>>>     >> the Instructon Decode, to the 1st cycle of the
> Instruction
> >>>>> Fetch
> >>>>>     >> which is 50% of the time sincethe entire
> Instruction fetch to
> >>>>>     >> Branch takes 4 microinstructions.
> >>>>>     >>
> >>>>>     >> At least that's how my interpretation of the
> microcode
> >>>>> works. But
> >>>>>     >> I could well be wrong.
> >>>>>     >>
> >>>>>     >> Ed
> >>>>>     >>
> >>>>>     >>
> >>>>>     >> On 25/05/2026 04:41, Michael Katzmann wrote:
> >>>>>     >>> Well here is the proof that it does indeed
> display
> >>>>> address+2...
> >>>>>     >>> https://www.youtube.com/watch?v=j3suW-WD5b4
> <https://www.youtube.com/watch?v=j3suW-WD5b4> <https://
> >>>>> www.youtube.com/watch?v=j3suW-WD5b4 <http://
> >>>>> www.youtube.com/watch?v=j3suW-WD5b4 <http://
> >>>>>     >>> does show what I expect 0100,0102, 0100,
> 0102 etc)
> >>>>>     >>>
> >>>>>     >>> Michael
> >>>>>     >>>
> >>>>>     >>>
> >>>>>     >>> --
> >>>>>     >>>    |\     _,,,---,,_           Michael Katzmann
> >>>>>     >>>    /,`.-'`'    -.  ;-;;,_         NV3Z /
> VK2BEA / G4NYV
> >>>>>     >>>   |,4-  ) )-,_. ,\ (  `'-'
> >>>>>     >>>  '---''(_/--'  `-'\_)
> >>>>>     >>>
> >>>>>     >>>
> >>>>>     >>>
> >>>>>     >>> --
> >>>>>     >>>    |\     _,,,---,,_   MichaelKatzmann
> >>>>>     >>>    /,`.-'`'    -.  ;-;;,_         NV3Z /
> VK2BEA / G4NYV
> >>>>>     >>>   |,4-  ) )-,_. ,\ (  `'-'
> >>>>>     >>>  '---''(_/--'  `-'\_)
> >>>>>     >>>
> >>>>>     >>> --
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> >>>>>     >>
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> pidp-11/46e2e17d-6134-4abc-8e27-29c435750862n%40googlegroups.com <http://40googlegroups.com>>
> pidp-11/46e2e17d-6134-4abc-8e27-29c435750862n%40googlegroups.com <http://40googlegroups.com>?
> >>>>>     utm_medium=email&utm_source=footer <https://
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> >>>>>     msgid/
> >>>>>
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> >>>>>     utm_medium=email&utm_source=footer>>.
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> groups.google.com/d/msgid/>
> >>>>>
> pidp-11/19f5fb950ff3a2.fd5b556229d7%40tottenham.name
> <http://40tottenham.name> <https://
> >>>>> groups.google.com/d/msgid/ <http://groups.google.com/
> d/msgid/>
> >>>>>
> pidp-11/19f5fb950ff3a2.fd5b556229d7%40tottenham.name
> <http://40tottenham.name>> <https://
> >>>>> groups.google.com/d/msgid/ <http://groups.google.com/
> d/msgid/>
> >>>>>
> pidp-11/19f5fb950ff3a2.fd5b556229d7%40tottenham.name
> <http://40tottenham.name>?
> >>>>>     utm_medium=email&utm_source=footer <https://
> groups.google.com/d/ <https://groups.google.com/d/>
> >>>>> msgid/
> pidp-11/19f5fb950ff3a2.fd5b556229d7%40tottenham.name
> <http://40tottenham.name>?
> >>>>>     utm_medium=email&utm_source=footer>>.
> >>>>>
> >>>>>     --     Johnny Billquist || "I'm on a bus
> >>>>>     || on a psychedelic trip
> >>>>>     email: b...@softjar.se || Readingmurder books
> >>>>>     pdp is alive! || tryin' to stay hip" - B. Idol
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> >>>>> pidp-11/2d381af6-e20e-460b-b87a-
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> >>>>> <https://groups.google.com/d/msgid/pidp-11/2d381af6-
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> pidp-11/2d381af6-e20e-460b-b87a->
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> msgid/>
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> >>
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Johnny Billquist

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May 26, 2026, 12:55:21 PM (8 days ago) May 26
to pid...@googlegroups.com
Oh! Hmm... Since it appears the fetch at 104 wouldn't actually show up,
I would expect it to be bit 1&2 both on about 1/2 the time, and bit 3
one 1/2 the time... Or I wonder if the aborted fetch at 110 is of
shorter time?

Johnny
>>       Thanks for this info and I wish I had areal 11/70! Anyway, this
>>     does suggest that the realcons display is correct
>>       as for this 777 test, bit 1 and bit 9 are solid on with the same
>>     brightness. Could I kindly ask you to run
>>     another test:   1000: 240 1002: 776 and maybe send us a video...
>>
>>     Thanks, Ian
>>
>>
>>
>>     On Tuesday, May 26, 2026 at 4:57:29 PM UTC+1 jacob....@gmail.com
>>     <mailto:jacob....@gmail.com> wrote:
>>
>>         Hi everybody, sorry to arrive late to the scene, travel over the
>>         weekend.
>>
>>         So for Johnny's 777 test, Ican't see a difference in brightness
>>         of bit 9 vs bit 1.  Both seem to be 'on solid.'  I imagine a
>>         scope could reveal more :)
>>
>>         On Tue, 26 May 2026 at 11:48, Johnny Billquist <b...@softjar.se>
>>         wrote:
>>
>>             Jacobs comment:
>>
>>             "checked just now.  stays on steady reading 1002"
>>
>>             I'mreading that as the both LEDs are as bright, but I'll
>>             butequally the
>>             >>>>>     lights
>>             >>>>>     >> flicker.
>>             >>>>>     >>  The flickering is due tothe sampling process
>>             in the panel
>>             >>>>>     software.
>>             >>>>>     >> I have resolved this on the PiDP8I by sampling
>>             theCPU state
>>             >>>>>     using a
>>             >>>>>     >> prime number
>>             >>>>>     >>  divisor of the cpu cyclerate. This means
>>             that only a loop
>>             >>>>> whose
>>             >>>>>     >> length is an integer multiple of  the prime
>>             will result in
>>             >>>>>     invalid
>>             >>>>>     >> sampling. The the sampled data
>>             >>>>>     >>  is averaged (to simulatean incandescent
>>             bulb) and displayed.
>>             >>>>>     >> However, in the PI2350 version, the data is
>>             sampled at FETCH/
>>             >>>>>     DEFER and
>>             >>>>>     >> EXECUTE in the same way but used to light
>> theLEDS
>>             >>>>>     >>  without any averaging. As noted above,if the
>>             fora PWM
>>             335or 336,
>>             andthe display
>> utm_medium=email&utm_source=footer>>.
>>             >>>>
>>             >>>> --
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>>             groups.google.com/d/msgid/ <https://groups.google.com/d/
>> msgid/>
>>             >>>> pidp-11/431a0e497dd638.e6c0d88f3d94%40tottenham.name
>>             <http://40tottenham.name> <https://
>>             >>>> groups.google.com/d/msgid/ <http://groups.google.com/
>>             d/msgid/>
>>             >>>> pidp-11/431a0e497dd638.e6c0d88f3d94%40tottenham.name
>>             <http://40tottenham.name>?
>>             >>>> utm_medium=email&utm_source=footer>.
>>             >>>
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Ed Tottenham

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May 26, 2026, 12:55:45 PM (8 days ago) May 26
to Michael Katzmann, isy...@gmail.com, [PiDP-11]
Sounds correct. The real hardware reads NOP from 104, it reads the BR from 106, and it attempts the fetch of the next word 110, but then goes back to reading 104. The OR of those addresses is 116. Realcons is wrong in showing the updated PC, and doesn't attempt the additional fetch. 

To be correct, would have to show the non updated PC, and also know when the additional fetches are done and include those addresses in the light, mixer. 

Ian Schofield

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May 26, 2026, 12:57:53 PM (8 days ago) May 26
to Michael Katzmann, [PiDP-11]
Hi Mike,

 Wow this thread is getting complicated! Anyway, have you seen the video from Jacob?
 This is the NOP/BR test at 1000 which definitely shows 1006 in the LEDS as does the realcons build.
 The only difference is that the LEDS flicker a lot on the PiDP11 but are rock solid on Jacob's machine.
 There is a case for sorting this out as going back to my first 8/I, if the lights flickered, something was wrong!!

Regards, Ian.
 

Michael Katzmann

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May 26, 2026, 1:00:08 PM (8 days ago) May 26
to isy...@gmail.com, [PiDP-11]
Ys, I tried 240(NOP) in 106 and BR in 110.
On the PiDP11 the display is flickering 112.
On a real PDP you probably see 116

Jacob Ritorto

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May 26, 2026, 1:13:46 PM (8 days ago) May 26
to Edward Tottenham, pid...@googlegroups.com
Pls see attached vid
Video.mov

Ed Tottenham

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May 26, 2026, 1:18:45 PM (8 days ago) May 26
to Jacob Ritorto, pid...@googlegroups.com
Many thanks, that is the same as my implementation. Just wanted to be sure. 


On May 26, 2026, at 18:13, Jacob Ritorto <jacob....@gmail.com> wrote:


Pls see attached vid

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On May 26, 2026, at 12:23, Edward Tottenham <edw...@tottenham.name> wrote:



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On May 26, 2026, at 12:23, Edward Tottenham <edw...@tottenham.name> wrote:



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On May 26, 2026, at 12:23, Edward Tottenham <edw...@tottenham.name> wrote:



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On May 26, 2026, at 12:23, Edward Tottenham <edw...@tottenham.name> wrote:



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On May 26, 2026, at 12:23, Edward Tottenham <edw...@tottenham.name> wrote:



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On May 26, 2026, at 12:23, Edward Tottenham <edw...@tottenham.name> wrote:



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On May 26, 2026, at 12:23, Edward Tottenham <edw...@tottenham.name> wrote:



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On May 26, 2026, at 12:23, Edward Tottenham <edw...@tottenham.name> wrote:



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On May 26, 2026, at 12:23, Edward Tottenham <edw...@tottenham.name> wrote:



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On May 26, 2026, at 12:23, Edward Tottenham <edw...@tottenham.name> wrote:



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On May 26, 2026, at 12:23, Edward Tottenham <edw...@tottenham.name> wrote:



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On May 26, 2026, at 12:23, Edward Tottenham <edw...@tottenham.name> wrote:



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Ian Schofield

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May 26, 2026, 4:12:07 PM (8 days ago) May 26
to Ed Tottenham, Jacob Ritorto, pid...@googlegroups.com
Hi All,
 Jacob; many thanks again for the second movie of Ed's code as above. I'm afraid that the PiDP11 display is nothing like your machine at all.
 I do hope you don't mind if we ask a few more favours.
 Anyone got any suggestions as to what to do about this most interesting digression into the inner workings of the 11/70?

Regards, Ian.
 

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Ed Tottenham

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May 26, 2026, 5:58:38 PM (8 days ago) May 26
to Ian Schofield, Jacob Ritorto, pid...@googlegroups.com
I can't run my PiDP for the moment, I've butchered it for my nefarious purposes. So maybe you could post the same code on a PiDP? 

If the differences you are seeing are in the data lights that is probably quite normal, the code is shifting around whatever data happens to be in memory. It will depend on the position the switch. 

Cheers, Ed


Jacob Ritorto

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May 26, 2026, 11:03:32 PM (8 days ago) May 26
to Ian Schofield, Ed Tottenham, pid...@googlegroups.com
Elated to be of service, hope I’m doing a good job for you guys.

The kindness that’s come my way in the acquisition of this 11/70 is darn near unfathomable to me, exceeding life dream kind of thing, and my hope is to pay it forward via stuff like this; make it useful!

So pls don’t hesitate to ask; I doubt it’ll become too much but I’ll emit status if so :)

thx
jake



On May 26, 2026, at 16:12, Ian Schofield <isy...@gmail.com> wrote:



isy...@gmail.com

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May 27, 2026, 4:25:44 PM (7 days ago) May 27
to [PiDP-11]
Hi Jacob,

 Thanks for your note. Unfortunately, google groups doesn't do attachments ... really annoying!
 Can you put it somewhere accessible eg google drive or, send it direct to me isy...@gmail.com and I will post it for the group.

BW, Ian.

terri-...@glaver.org

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May 28, 2026, 12:31:33 AM (7 days ago) May 28
to [PiDP-11]
On Wednesday, May 27, 2026 at 4:25:44 PM UTC-4 isy...@gmail.com wrote:
 Thanks for your note. Unfortunately, google groups doesn't do attachments ... really annoying!

Odd. Using the web interface to the group:

I was able to view the video attachment.
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