PA Bias power up time improvement

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tak.k...@gmail.com

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Sep 27, 2021, 11:07:45 PM9/27/21
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Hi all,

I found slow PA bias power up using my HL2. In CW operation, if Key Down delay is not enough, 1st CW code will be shortened after rx-tx change over. And most CW operators want to minimize Key Down delay. So PA bias power up time is important. I know that the rise time of PA Bias depends on the individual characteristics of U19 and B109.  In my test, I replaced 0.1uF with 0.01uF at B109 and improved.  For more detail, please refer to the attached pdf.

73,
Taka,  JI1UDD
PA Bias power up time improvement.pdf

James Ahlstrom

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Sep 28, 2021, 7:36:22 AM9/28/21
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Hello Taka,

There may still be a problem if the HL2 is connected to an external power amplifier. It may be unable to power up fast enough. One solution is to use SDR software that keys the amplifier but records the keying waveform and plays it later. Then the amps can power up and the keying timing is preserved but delayed.

Jim
N2ADR

tak.k...@gmail.com

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Sep 28, 2021, 8:54:29 AM9/28/21
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Hi Jim,

Yes. If an external amplifier is used, the delay of the T/R switch and  bias circuit, etc should be checked.

73,
Taka,  JI1UDD

2021年9月28日火曜日 20:36:22 UTC+9 jah...@gmail.com:

Graeme Jury

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Sep 28, 2021, 6:46:41 PM9/28/21
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With the Teensy keyer we are providing a ptt to key the radio and then playing the cw after a delay and then the hang time on the ptt at finish of keying thus the onus to provide the keying delays falls on the keyer.

73, Graeme ZL2APV
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tak.k...@gmail.com

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Sep 28, 2021, 8:02:41 PM9/28/21
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Hi  Graeme,

Yes. I know that well.
But it's better that the rise time of PA bias is shorter.
Also I think that replacing with 0.01uF, PA Bias will be robust. 
I saw by my oscilloscope that the rise time of PA Bias was unstable if using default 0.1uF capacitor.

73,
Taka,  JI1UDD

2021年9月29日水曜日 7:46:41 UTC+9 Graeme Jury:

tak.k...@gmail.com

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Sep 28, 2021, 9:25:26 PM9/28/21
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> I saw by my oscilloscope that the rise time of PA Bias was unstable if using default 0.1uF capacitor.

I attached photos as examples of unstable rise time.

2021年9月29日水曜日 9:02:41 UTC+9 tak.k...@gmail.com:
short rise time.jpg
long rise time.jpg

Steve Haynal

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Sep 29, 2021, 12:05:53 AM9/29/21
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Hi Taka and Group,

Thanks for the analysis and recommendation. This would be the only 0.01uF capacitor in the BOM. To save a line in the BOM, I thought it would be safe to substitute 0.1uF here. But as you discovered this is not the best. Do you think 4.7nF will be okay here as we already use that value in the BOM? I have opened a github issue to make a change in future builds:
This will not affect most uses of the HL2. Just uses where you want to transmit within 30ms of applying bias to the PA. This may also vary from unit to unit. The delay from PA bias enabled to real TX signal is set by the TX buffer latency. Software typically sets this in the 20ms range. I think the only people who might notice this are those who set the TX buffer latency to 6ms (the specified minimum for the relays) to have semi-QSK.

73,

Steve
kf7o

tak.k...@gmail.com

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Sep 29, 2021, 2:30:15 AM9/29/21
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Hi Steve,

> Do you think 4.7nF will be okay here as we already use that value
> in the BOM? 

I think it's OK, but I cannot experiment it as there is no 4.7nF capacitor in my stock.

After replaced with 0.01uF, the rise time is very stable.
Before replaced,  the rise time is not stable and I saw that the rise time reached 50-60ms in
the worst case.
Thus Key-Down delay (means from PTT to CW keying) is needed more than 50-60ms without margin for sending complete CW code.
I feel It's a bit long as 1dot mark is 48ms when 25WPM.
But I think it's no problem for a remote CWer.

73,
Taka,  JI1UDD

2021年9月29日水曜日 13:05:53 UTC+9 softerh...@gmail.com:

Steve Haynal

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Oct 4, 2021, 12:39:49 AM10/4/21
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Hi Taka and Group,

This weekend I tried the same experiments Taka performed and saw similar results. I also checked to see if the bias current had any effect. For example, we set the bias to 100mA per LDMOS transistor. Does setting this higher to 110mA or 120mA help? I saw little change when varying the bias current. I also checked temperature and saw that once warm, the timing does improve. For example, after key down for 10 seconds, the next key down does not show as significant of a problem. I substituted 4.7nF for B109 and saw significant improvement. If testing with 4.7nF shows no other problems over the next few weeks, then we will switch to that for the next build. CW operators may want to consider changing out B109 for 10nF or 4.7nF on existing boards.

Worst case cold start with existing 100nF B109. Note the time scale is 10ms and it takes 60-70ms for the bias to reach full level. You can see the effect on the CW tone with the extra shaping. TX buffer latency is set to 6ms for relay settling.
cold100nf.png

Below is what hot start with existing 100nF B109 looks like. Now the horizontal time scale is 2ms and the bias has almost reached max at 6ms. There is still a little shaping due to the bias rise.
hot100nf.png

Below is what cold start looks like with 47nF B109. Note that the bias is stable within 4ms. I'm not sure what the glitch is at about 5V but it is seen every time, even when 100nF was used.
cold47nf.png


73,

Steve
kf7o

tak.k...@gmail.com

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Oct 4, 2021, 7:45:32 AM10/4/21
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Hi Steve,

Thanks for your confirmation. 4.7nF is good.

73,
Taka  JI1UDD

2021年10月4日月曜日 13:39:49 UTC+9 softerh...@gmail.com:
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