IO Board Beta Testing

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Steve Haynal

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Dec 24, 2019, 1:01:48 AM12/24/19
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Hi Group,

I am starting a new topic pinned to the top of the list for those participating in the IO board beta testing. I have sent out half of the kits and received parts for the remaining kits today. All kits should be sent a day or two after Christmas. I have started assembly notes for the various boards. We will fill in details and make corrections as we go. Please excuse my sloppy soldering. Please remember that these are experimental boards, so expect changes in future revisions and updates to the gateware.

Boards with notes:

** 40mm and 55mm end plates use the same notes:

** DB-9 Level Shifter Board:

** PureSignal Feedback:


No notes yet:

** Small IO Expansion:

** Alternate HL2/N2ADR Jumper with PureSignal Feedback and IO Expansions

73,

Steve
kf7o

dick_...@hotmail.com

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Dec 28, 2019, 3:05:53 PM12/28/19
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Hi Steve
I do not know if this is the right place or not for my questions and comments. I have two basic questions, the first relates to the companion boards.

Previously you pointed out to me [can't find the post] that the I2c bus also connects to HL2 DB17 pins 2 & 3 [SCL & SCA resp].  This also corresponds to FPGA pins 33 & 32 plus the MAX11613 pins.  This appears to be an isolated I2C bus with only the DB17 and the MAX11613 attached.
There is a second I2C bus called SCL2 & SCA2 connected to the FPGA pins 31 & 30 as well as DB7 pins 5 & 4 [SCL2 & SCA2 resp] which connect to the n2adr filter board which connects to the MCP23008 for band select on address 80.
In the case of the companion boards, the smallio connects the I2c to DB17 pins 2 & 3.  The io_jumper connects to DB7 pins 5 & 4.  Both companion boards show address select capability for 80 or 81 addressing.

My basic question is, are the two I2C buses totally independent or are they multiplexed ?  Are they like the TI - TCA9543 or the TCA954x series of I2C Bus Switches ?  If the two HL2 I2C buses are mirrored / multiplexed [like the TCA9543] then both can support a device [MPC23008] on address 80 and no additional programming is necessary.  If the two buses are independent all of the devices would all need a unique address and setup.  Haven't, as yet, become familiar with the gateware to answer my self.

My second question is related to connecting to my PA's using the independent low power TX output [17dBm @ RF3 / RF1 on n2adr] which is more than sufficient for the hpSDR PA's.  Does a jumper on CN8 [TX Inhibit] turn off the just 5W pa or the PA and TR switch or what ?  Is there a need to also reconfigure the PC software to accomplish this so that neither the RX or TX are damaged ?  I know that I have seen some discussion about this someplace but the location I do not remember.

Thanks
Dick K9IVB

Steve Haynal

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Dec 29, 2019, 12:52:35 AM12/29/19
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Hi Dick,

There are 3 i2c busses on the HL2:

I2C1, FPGA pins 103,104
I2C2, FPGA pins 30,31
Slow ADC Bus, FPGA pins 32,33

I2C1 and I2C2 are now shared and use a single controller to save FPGA resources. They use to be separate and there are 2 interfaces from software:
But accessing either interface causes the transaction to appear on both buses.

The Slow ADC Bus is currently a separate bus and is not accessible from software. It is only polling the slow ADC now. I am thinking about combining it with the other two buses so that there is only a single controller, but I have to synchronize the ADC polling better. I also may keep i separate and expand its use. If someone comes to me with a real circuit that they've built that needs to interface to one of the i2c buses, I will work with them to try and enable what they need.

The companion board supports address 80 and 81 as I wanted to see what happens with two MCP23008 at the same address connected to the same i2c bus. We can switch to 81 if that doesn't work. 

The TX inhibit acts on the entire TX chain, both low power and PA. You should use the software switch to enable the low power output if that is all you need. Quisk and SparkSDR have explicit control for this. It is mapped to an unused control in PowerSDR and other openhpsdr software. See the PowerSDR YouTube video linked on the wiki page.

73,

Steve
kf7o

Steve Haynal

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Dec 30, 2019, 1:23:07 AM12/30/19
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Hi Group,

I have added picture diagrams for the connections on the HL2 and some of the new IO boards:

Look towards the bottom of each page. This is to help the ~10 beta kit builders. I hope we can bring up and debug the HR50, ATU and FAN IO first.

There are some minor IO assignment changes to DB1. This is so all signals go to DB1 and we don't need to use signals on any other header. See the IO wiki page.

I read up on fan PWM noise and learned that a lower PWM frequency <60Hz will have less audible noise. I was using ~600Hz and the fan was very noisy at low speeds. I have lowered the PWM frequency to ~30Hz and there is no extra hum at lower speeds. I ran some tests and actually don't see much temperature improvement with the fan. For example, a 2 minute WSPR TX peaked at only 1 or 2 degrees C less than without fan. The ambient temperature is pretty cool here now though. Maybe it will make a bigger difference at a very hot QTH. I find the biggest thermal benefit from ensuring good thermal contact between the HL2 edge rails and the enclosure. Sanding the finish and using good thermal compound (I've noticed differences between different brands) with suitable downward pressure makes the biggest difference.

73,

Steve
kf7o

Steve Haynal

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Jan 19, 2020, 10:58:39 PM1/19/20
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Hi IO Beta Testers,

From the tracking information, I see that everyone has received their IO end plate kits. New gateware was released today that adds fan support:

I have been able to test the fan, but do not have a HR50 or ATU for testing. I am relying on your feedback to make sure that functionality works. The functionality is in the gateware, but there may be one or two minor changes required for everything to work. Please let me know how it is going and I will work to make sure the gateware support is fully functional. See these wiki links for IO assignments and build details:



73,

Steve
kf7o

K J

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Feb 11, 2020, 8:50:54 PM2/11/20
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I started a thread concerning FreeDV LGPL API and was thinking this might be an awesome hardware extension project for the I/0 board... and Quisk, etc.. as well .... food for thought.
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Joe LB1HI

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Mar 20, 2020, 7:04:22 AM3/20/20
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Hermes Lite V2 I/O Beta test`s  Pictures 

1.

     The fan works correctly according to the temperature plan.

I cannot present the test results about temperature reduction in closed housing because other tests and the development of pure signal feedback are still underway.
But my suggestion is for the fan to turn off when it reaches 35 degrees (34.9) instead of 30 degrees as it is now. Because he spins and blows all the time. HL2 rarely goes below 30 degrees.

But the temperature between 30 and 35 degrees is very safe. There is no need to cool in this temperature range from 30 to 35 degrees Celsius. Therefore, setting the fan to turn off already at 35 degrees would be a good solution


PS. Fan control can be also very useful if somebody wants to implement a modular design (HL2 as one of the modules in a larger housing)  Then this system can control the fan in this larger housing. This means HL2 in one larger casing with other devices (e.g. PA, SBC, etc.). Placed in such a way and so connected that after removing it is an independent device that can be taken into the field.
At the time, when HL2 is inserted into a larger housing together with other devices, it can control a larger fan that cools other devices (modules) inside.

2.

     A small modification of the pure signal feedback board has been done.

 holes have been drilled and the connector inside so there is no connection with the filter board and the plate can be aligned towards the filters. The goal was to slide it away from the power amplifier impedance transformer on LDMOS. Potentiometer installed in place of a 1 kOhm resistor (Pi configuration )  for the purpose of small experiments.

 73 Jozef, LB1HI

Steve Haynal

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Mar 21, 2020, 2:02:14 AM3/21/20
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Hi Joe,

You modification of the pure signal feedback board sound good. I look forward to your experiments with the potentiometer.

73,

Steve
kf7o

Joe LB1HI

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Mar 21, 2020, 2:41:11 PM3/21/20
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Hi Steve,
     The plan is to calculate and test looking for such parameters of Pi network or T network components, that changing the value of one resistor (part of the potentiometer) caused a change in attenuation but taking into account the maintenance of output and input impedance at a reasonable level both to avoid degrading the effect on the receiving path during RX as well as avoiding too large mismatch at the small bord input where the signal from external coupler is coming. 
     Consider adding a second variable resistor. There is little space there but two smaller ones will fit. I would prefer smaller because of the signal path impedance. 

(it may turn out that the simultaneous change of the value of two resistors will give the expected results, then we can use one but a double potentiometer). Of course not as a potentiometer but as a variable value resistor. Only two potentiometer connections used. Beginning or end of the resistance layer and slide. In the picture, is to see that the third connection is cut off.

Changing the attenuation value while maintaining reasonable impedance values ​​will allow us to "tune" to the already own external coupler There are various types of couplers on the market or in our drawers with different dB values. At the same time, if we were to build DIY, we would know how to build it so that it works with HL2 optimally.

Another goal is to find the optimum amount of Decibel attenuation which an external coupler should have. Such a coupler value which in combination in a small PS board would be most optimal for our purposes (pure signal) in power ranges from 5 Watt to 1500 Watt.
 And at the same time, it should do not require the use of an additional attenuator between the coupler and a Hermes lite.
     Your good suggestion about cutting off from the connection going to point P18 LPF board forced the small PS board to be mounted towards the HL2 motherboard. So I decided to change the soldering pins to take advantage of your right suggestion but at the same time rotate the small board towards the back of the HL / low pass filters N2ADR companion board.

73, Jozef lb1hi

dick_...@hotmail.com

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Mar 21, 2020, 10:17:40 PM3/21/20
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Hi

I have been too busy to finish an assortment of projects, but I have some data that still needs a little more checking for an approach to True Signal on the HL2 with either the barefoot [5W] output or 100 Watts.
Attached is a system drawing of the approach.  There is a PCB for the HL2 side as shown on the drawing and it is available from OSHpark at:
I added an extra piece of 5 jumpers so I could cut off and use a 10x2 or 5x2 with two pin jumpers for experimenting [got a bunch 100 @ $1.18 on ebay]
I also plan to redo the jumper to include the functions on the top 20 pins like I2c for filter select and SWR.

The diagram shows the basic schematic at both ends and uses multiple parallel resistors to achieve the desired values and support the power levels from the Directional Coupler.  The Directional Coupler in both the 100 W and 10 W are equivalent with 20 db of isolation or attenuation.  The resistor dividers have the values chosen so the termination of the Directional Coupler and the output are always close to matching 50 Ohms. I started with the rather basic PI circuit and a nominal attenuation value and adjusted to get the results that I thought would work at each power level.  Everything is basically straight forward Kirchhoff's laws and have been done in an Excel spreadsheet.

The HL2 side already has a PCB and I was going to see if reversing to the filter board side makes a difference.  When constructing the final jumper board I will just push the unwanted pin out of the connector so the length of the circuit is not extended.  I started with 3dB and higher attenuators and then regress to the 2dB circuit and adjusted values to keep the input 50 Ohms and provide hi Z isolation to the receiver input.  I used the uFL connector as it is no more difficult than 0805 to solder and there are a variety of SMA to uFL jumpers available at very modest $.

The optional termination circuit, in the middle, can be used if the RX is affected by the direct connection or the Directional Coupler needs the termination.  The trimpot can be used to reduce the output if necessary, or inline SMA attenuators can also be used.

I still need to do some more checking on the spreadsheet because the copy and repeat some times introduces cell errors.

Hope this is helpful.

Dick K9IVB
Pure Signal System for HL2-WPCB.pdf

Steve Haynal

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Mar 22, 2020, 8:58:09 PM3/22/20
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Hi Dick,

This looks quite interesting. Thanks for the update.

73,

Steve
kf7o
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Joe LB1HI

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Mar 23, 2020, 9:09:15 PM3/23/20
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Hi
Turning a small board towards filters doesn't improve anything but it only prevents further deterioration of already too much internal feedback.

73, Joe lb1hi

Joe LB1HI

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Mar 26, 2020, 11:37:37 PM3/26/20
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teml10and11removed.jpg

Further tests/experiments PS with L10 and L11 temporarily removed. Signal from the sampler fed on RF4

73, Jozef lb1hi

Joe LB1HI

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Mar 28, 2020, 11:23:55 AM3/28/20
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Hi Steve and all in beta test group,

It is difficult to determine how the distance between the pure signal/pre-distortion  board and the transformer / LDMOS output transistors has an impact on the internal feedback level, especially in the higher bands, because internal feedback is so large that it "covers" the perception of possible changes.
I plan to carry out tests with disconnected internal feedback (de-soldered L10 and L11). Not only the difference between the sampler signals and internal feedback is concerned, but also the phase difference.
Nevertheless, placing a small PS board away from LDMOS since space is present seems logically reasonable.
Depending on the results, the next ones will look for possible other solutions. The first casual thought is the RF switch/relay between RF4 and RF5. But I leave it for the next days only after completing the tests to determine whether mixing the signal from local feedback with the signal from the RF sampler has a significant impact on the operation of the Pure signal algorithm (signal level/phase difference)

73,
Jozef, lb1hi

Joe LB1HI

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Mar 29, 2020, 4:04:57 AM3/29/20
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Hi,

Internal Feedback has definitely disappeared and at the moment there is only a signal from the RF sampler.
Two issues still require further clarification and experiments and measurements.
Was the coupling coming from these coils (I don't think so because they are on the reverse side of the circuit board)
And the second question is how much (and if at all) preventing mixing of the signals from the sampler and internal couplings improve the operation of the pure signal.
One thing is that we want to improve the quality of the signal occurring beyond the last external PA. And the second is between the signals from the internal coupling and the sampler there is some unpredictable phase difference (whether and how much it affects the operation of the PS requires analysis and testing) I have a little different responsibilities and therefore little time. So I think that it will be during the week that I will continue. (In addition, I'm going to solder on a separate small board low pass filter eliminated by desoldering L10 and L11 coils. And plugging in the signal path from the sampler/(and RX)
73, Jozef lb1hi

Joe LB1HI

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Mar 29, 2020, 3:48:34 PM3/29/20
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Hi !
In the meantime, I want to add that Pure signal works very well. At 15 meters, 17 dB down to impressive 58.8 dB. Shows screenshot.
Congratulations Steve. Good job.
73, Joe lb1hi

ps15mtr.jpg



On Tuesday, December 24, 2019 at 7:01:48 AM UTC+1, Steve Haynal wrote:

Steve Haynal

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Mar 30, 2020, 1:42:10 AM3/30/20
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Hi Joe,

My thinking about PureSignal feedback is that you want the LNA at the lowest possible value during TX (-12dB) so that internal feedback is reduced as much as possible. Then, you want the TX feedback signal strength as high as possible to overcome the feedback but not overload the ADC. This is one reason I added separate LNA gain settings for TX and RX in the latest gateware, but software (linhpsdr and pihpsdr have PureSignal support) still needs to support that. Also, I think PowerSDR supports two gain settings from software but I don't recall exactly how to set the TX gain level. I think you set the step attenuator to a different value while transmitting directly on the main screen .

Without L10 and L11, the LPF to the RX is nonfunctional and you will get no signal if the components are absent, or aliased signal if the components are replaced with shorts.

73,

Steve
kf7o

Graeme Jury

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Mar 30, 2020, 2:27:07 AM3/30/20
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piHPSDR automatically adjusts the LNA gain while on TX sif you check the "auto attenuate" checkbox in the
Menu/PS popup. It seems to be very effective and as I lower TX power it reduces the attenuation.

73, Graeme zl2apv
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Joe LB1HI

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Mar 30, 2020, 11:44:40 AM3/30/20
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Hi Steve and group,

     Thank you for your interest. I have a lot of observations and comparisons. Also with the option, J1 and J21 temporarily removed but at the same time preserved L10 L11.
But as I wrote before, for hobby matters, I will be able to come back after about 5 days. Then I will gather all the insights and information, describe and write in the forum for all of you.
PS. I am curious whether your indications are similar to those I have here?
Internal crosstalk coupling alone. PS on:
20-meter band- S-ATT jumps at 9 dB, 
10-meter S-ATT automatically turns on 11dB attenuation.
73,
Joe, lb1hi 
PS2. Good news about support for separate TX and RX LNA gain settings (y) Tnx 

Joe LB1HI

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Apr 14, 2020, 9:55:23 PM4/14/20
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Hi,


Internal crosstalk feedback was not from the L10 and L11 low pass coils of the anti-alias filter.

Internal crosstalk feedback was not derived from proximity  of small pure signal board or jumper header internal wiring. to the LDMOS PA transformer


Internal crosstalk feedback comes from the K2 relay.


Temporarily de soldering J1 diminished crosstalk dramatically.

How to fix this problem?  (with ensuring the receiving path)

73, 
Jozef, lb1hi

Joe LB1HI

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Apr 15, 2020, 8:58:40 PM4/15/20
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Hi Steve,

     Changes in the R4 value caused a change in the input impedance from the FPGA side. But there was no need to change and increase it because with a 1 kOhm resistor, the impedance was already about 300 Ohm in the 10 meter band which is sufficient to prevent the pure signal feedback from influencing the receiving line during RX. I stay at 1 kOhm and I will replace the potentiometer with an SMD resistor.

The S21 measurement gave a value of 20.5 dB attenuation. And with this value I remain. I will eventually change the ATT value  for example, to 10dB Attenuation sometime in the future to have the possibility of adjusting attenuation it in the wider range with an external attenuator.

The small pure signal board works well and fulfills its role as it should. It gives us two options It gives two options for the signal delivery to rx ADC input (FPGA).. One option without any modification via the header jumper. And the second is to add a second SMA socket and lead the signal with a thin coax to the uFL RF5 connector.  From my side, the beta test of the small PS board can be considered as already completed.

73, Joe, lb1hi

Pictures below

psboard3.jpg


psboard1.png

Joe LB1HI

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Apr 15, 2020, 9:40:09 PM4/15/20
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Hi Steve,
Removal of L10 and L11 coils was temporary for the time of measurements, it was the result of a search for the cause of strong crostalk feedback which was revealed during beta pure signal small board tests. Regarding the rest will write back at a different time. (restrictions on returning to shack after Easter with the family) asap

73, Joe


On Monday, March 30, 2020 at 7:42:10 AM UTC+2, Steve Haynal wrote:

Steve Haynal

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Apr 16, 2020, 1:41:34 AM4/16/20
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Hi Joe,

I'm not sure how much you can improve the crosstalk feedback. There will always be pickup by the relays. The next batch of HL2 is using a different relay. Maybe another make of relay could improve the situation.

If during TX you decrease the LNA to -12dB, do you still have problems with crosstalk? This is the ideal: strong feedback signal during TX with lowest LNA setting to over power any crosstalk.

73,

Steve
kf7o

W. Jozef

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Apr 18, 2020, 10:56:50 AM4/18/20
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Hi,

     As a follow-up to the beta test. Additional tests are still planned to look for the best software settings and attenuation values, etc.  For power levels of 50 watt and above.  Previous tests were carried out barefoot. (5 Watt)

(e.g test for the effect of mixing the rf sampler  signals with the internal crosstalk signal on the quality of pure signal/predistortion operation)

 

Steve, what to take next?

73,
Jozef, lb1hi
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Joe LB1HI

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Apr 19, 2020, 12:05:49 PM4/19/20
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Hi the whole group, 
I corrected the text. Description of the course and final conclusions with the images are included in this document

https://docs.google.com/document/d/1lMHQjAkS-Fqw4q3H6bCMmp3k4lz7yEj2I1Ny5EJSIoU/edit?usp=sharing

73,
Jozef (Joe), LB1HI

Steve Haynal

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Apr 19, 2020, 7:32:08 PM4/19/20
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Hi Joe,

Thanks for the document. I have added a link to it from the IO wiki page:

73,

Steve
kf7o

Steve Haynal

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Apr 24, 2020, 8:41:25 PM4/24/20
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Hi Group,

Below is an update from N1IAH. He has the HR50 interface working and has offered to help anyone interested.

73,

Steve
kf7o 


Hello Steve,
I have tested keying the HR50 via the DB9 pin4 and it works like a champ.  I tested it using software with PowerSDR, SDRConsole and SparkSDR  as well as hardware via the Key/PTT connector on the front of the HL2.  I picked the EXTTR location on top of the connector connecting the HL2 and the N2ADR board (see photo) as the place to tap into, it was convenient and an easy connection to change in the future as the need arises.  .

 
image.png

I will document the HR50 to HL2 DB9 accessory board interface mods, settings and usage and post on the IO wiki page in the near future, In the meantime, if you are aware of  someone needing assistance on this, send them my way, I;ll be happy to help.
73,
Harry - N1IAH

W. Jozef

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Jun 3, 2020, 4:54:22 PM6/3/20
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Hi Steve,
please let me know if I can use any of the listed below I2C2 buses, to connect additional MCP23008 expander ???
  1. FPGA pins 30.31   
  2. Slow ADC Bus, FPGA pins 32.33   

73, Jozef
lb1hi

Steve Haynal

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Jun 5, 2020, 1:44:35 AM6/5/20
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Hi Group,

Thanks to Harry N1IAH for his document on using the DB9 IO board with the HR50 amplifier. Support for this is in the current gateware and has been for several months. Please find his PDF document here:

Or listed on the IO wiki page:
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