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BillThe teensy keyer was basically a K3NG keyer with added midi functionality. Unless you are considering midi you don't lose anything.At a quick check I see the Raspberry Pi 4, 4 GB available at Vilros ($55), Canakit ($55) and Amazon ($99).The question, as always, is what problem are you trying to solve. If you want some integrated "in box" smarts I think a Pi pico is a great choice. If you want to run SDR apps you need much more.Bob KD8CGH
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I like the Pi Pico suggestion, the Arduino IDE supports the Pi Pico.
Simon Brown, G4ELI
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Yes,
Arduino IDE runs on Windows, Linux etc. and supports C – maybe not the very latest & greatest standard but at least a very usable amount. Getting to grips with the PI Pico is one of my goals for 2022, maybe write a keyer or something…
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Hi Group,
I would also like to see a Pi Pico in there. I got one a couple of weeks back and have had a quick play using the Platform IO IDE. With a high performance processor we could maybe off load some of the processing from the FPGA to the Pico. Primarily I'm thinking about some of the IP workload (DHCP and the like) which would free up more resources for extra receivers. This would require some sort of high speed interface between the Pico and the FPGA.
While I'm at it, some other thoughts on a expansion board.
I think the board should be full length of the HL2 and N2ADR. This would allow extra connectors to be mounted on the ends of the board for extra interfaces and reduce point to point wiring. New end plates could be made to accommodate the new connectors
The board should pick up all the connection points that are on the HL2 board. You don't have to use them all but increase the usefulness as an experimenters board. I'm talking about DB9, DB17, etc.
Add the ability to have a separate Rx antenna switched by relay using the current N2ADR signal line.
Add dedicated transverter interface which would allow other bands to be integrated without dedicating a HL2 to the job. The idea would be to have a tunable IF at 45MHz which used undersampling. This has already been shown to work a 50MHz but the current sample rate causes a issue at 2 time the fundamental frequency. I don't think 45Mhz would have a problem. The undersampled image should appear about 31MHz in the digital world but in reality we just have diplex 1-30MHz and 45MHz together in the analogue world.
For transverter Tx, you need to pull of the raw DAC signals which are available at DB3 (remember what I said about making these signals available on the expansion board) and band pass filter. You would also need to turn off the Tx x2 interpolation. This might also be a way to produce signals for the new 8 metre band?
So, that's a lot of work but could be broken into individual bits and integrated in the final board. Not everybody will want it all but they only have to add the components they need to full fill there needs.
Build it and they will come.
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On Sun, Oct 3, 2021 at 5:22 AM Reid Campbell <scumballc...@gmail.com> wrote:
Hi Group,
I would also like to see a Pi Pico in there. I got one a couple of weeks back and have had a quick play using the Platform IO IDE. With a high performance processor we could maybe off load some of the processing from the FPGA to the Pico. Primarily I'm thinking about some of the IP workload (DHCP and the like) which would free up more resources for extra receivers. This would require some sort of high speed interface between the Pico and the FPGA.
I'm going to give it a try. My Pico comes this week. How about mounting the Pico in the new back panel so that its USB port is available? It might be tight, the Pico floating over the expansion board. Worse case, we lose the area under the Pico.
Will the Pico cause too much interference? We might need it to mostly be in sleep mode. Offloading the FPGA sounds good, but not if it causes interference.
While I'm at it, some other thoughts on a expansion board.
I think the board should be full length of the HL2 and N2ADR. This would allow extra connectors to be mounted on the ends of the board for extra interfaces and reduce point to point wiring. New end plates could be made to accommodate the new connectors
I think that's a great idea. I'm waffling between a DB9 serial port and a USB port. Why not both? Having the board extend all the way to the new back panel should give it mechanical stability and eliminate ribbon cables.
Is the N2ADR board cool enough to have the reduced air flow if we put a board the same size over it?should we add any venting in the back plate?
The board should pick up all the connection points that are on the HL2 board. You don't have to use them all but increase the usefulness as an experimenters board. I'm talking about DB9, DB17, etc.
Could we do what Steven and Jim did, and have it be two boards, connected with a connector board like the one used to connect the HL2 to the N2ADR? Alternatively, there could be one board with just interface stuff, and a single board with both interface and some cool new stuff.
Add the ability to have a separate Rx antenna switched by relay using the current N2ADR signal line.
Please excuse my ignorance, but what cool things could I do with an additional Rx input?
Add dedicated transverter interface which would allow other bands to be integrated without dedicating a HL2 to the job. The idea would be to have a tunable IF at 45MHz which used undersampling. This has already been shown to work a 50MHz but the current sample rate causes a issue at 2 time the fundamental frequency. I don't think 45Mhz would have a problem. The undersampled image should appear about 31MHz in the digital world but in reality we just have diplex 1-30MHz and 45MHz together in the analogue world.
I'd love to see a good integrated transverter. I currently use 2 HL2s, one for HF, and one for the 2m band. What bands do you have in mind? Any internal amp?
I have a cheap Ukrainian transverter. I can recommend it for the price, but I am envious of folks with the higher end transverters. It seems to show that a 2-band transverter could fit in the case, with a modest power amp. Mine is in theory (not measured) 10W on 146MHz, and 3W on 440MHz.
For transverter Tx, you need to pull of the raw DAC signals which are available at DB3 (remember what I said about making these signals available on the expansion board) and band pass filter. You would also need to turn off the Tx x2 interpolation. This might also be a way to produce signals for the new 8 metre band?
What is the Tx x2 interpolation?
C/C++ is the engineering language. Since I wrote my own C compiler in 1983 due to lack of a commercial compiler while working in Hemel Hempstead I’ve rarely used anything other than C/C++.
From: herme...@googlegroups.com <herme...@googlegroups.com> On Behalf Of Bill Cox
Sent: 05 October 2021 01:09
To: Reid Campbell <scumballc...@gmail.com>
Cc: Hermes-Lite <herme...@googlegroups.com>
Subject: Re: Discussion of next-gen HL2 interface board
How much do folks prefer programming the Pico in MicroPython vs C/C++?
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I'm assume this is for host support to connect some form of peripheral equipment? Would it not expect to be powered from the USB port, so potential requiring up to 500 mA of 5V.
Bill, do you have a use in mind for this port?
Hi Guys,Another option would be to put the RP2040 chip directly onto the extension board. From what I've seen it requires minimal external circuitry and it's available für 0,82€ at Farnell.
We could than provide some more efficient power regulator to provide the different voltage levels for different io ports.
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Just a thought. If you are going to mount a connector like that, consider using the equivalent sized 15 pin (vga type) connector for expansion. Like we used back in the SDR-1000 and UCB days.
Phil K3TUF
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The FPGA code is not in my wheelhouse but I can make out good chunk of it, still questions remain.
I went searching around the rest of the FPGA code and also the Protocol 1 specs. The specs were hard to find. I found an Ozy USB spec V1.57 document which I think the ethernet version was a adaption of that and close to the same.
I see the only frequency related fields in protocol 1 are for 1 TX NCO value and up to 7 RX NCOs values. No place for IF or LO frequencies without repurposing a field here or there. For transverter band decoder support from the HL2 itself some changes are required in the SDR app and/or HL2. The question is where best.
Question or validations:
Since the Hl2 is limited to HF bands there needs to be a way to add some offset to the dial frequency it receives. Maybe it is simply having the SDR app stuff the LO frequency into an ??unused?? field like the Alex fields (2 bytes long, possible bits from the prior field also) and the FPGA uses the result of freq – LO. The i2c N2ADR can work as normal including being selected to the right IF band. I have some alternative ideas percolating but are more complicated.
Mike
K7MDL EL87sm & CN88sf
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Totally missed that entry. Reading that page it seems the Alex bits are used and can be split and used BCD-like or other combos as agreed for use in the SDR apps. I have seen the split option in apps like Thetis but that would interfere with the N2ADR board so I count that out. If a revision or hand modification to the N2ADR board used the MCP23017 16 port expander, that would be a convenient option to provide some auxiliary IO lines.
As of today, for transverter work with dial frequencies above 28MHz (collectively called VHF+), the Band Voltage and HL2 serial port are not usable.
Unless we can add a new extension for LO frequency (so Dial Freq = LO + IF), it seems like the best option left is the i2c approach. The SDR continues to send the IF frequency only down to the HL2. The i2c bus needs to carry the dial frequency, LO frequency, and/or VHF+ band info. If a uP is used on the i2c bus it can offer a serial port output with the dial frequency in place of the built in serial port and/or IO pins. To keep the N2ADR filter board (desirable) then a port expander or uP must be at a new address. I was hopeful there was a way the FPGA serial port could be leveraged and not require any new external hardware ;-(.
Please carry on with your regularly scheduled programming!
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Jim,
Any solution which provides a separate RX antenna will be fantastic. Pure Signal feedback good but the HL2 is clean as it is.
Simon Brown, G4ELI
From: herme...@googlegroups.com <herme...@googlegroups.com> On Behalf Of James Ahlstrom
Sent: 12 January 2022 18:05
To: Hermes-Lite <herme...@googlegroups.com>
Subject: Re: Discussion of next-gen HL2 interface board
Hello Group,
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IIUC, Steve would prefer for design discussions to happen on the list, rather than private emails. I'd like to see if we can come to a consensus on what we want the interface card to do, and roughly the architecture. Currently, a number of folks on this list know far more about this than me, so I hope you all will educate me. I'd like to design this for the group, and get it fabbed, if no one else is already doing it. I'll take whatever help is offered.Interface to the interface boardI'm leaning towards making it a "hat" that floats either above the DB1 or DB7 connector. Both give access to the I2C bus, which so far sounds like the right bus for the interface board to live on. DB7 has access to the signal that keys the external amp, EXTR. DB1 has access to the FPGA's UART. However, the FPGA could send us band-change info (currently on the UART) and tell us that the amp is being keyed over the I2C bus, IIUC. The choice of DB1 or DB7 probably depends on the functionality we want for the interface board.Interface between HL2 and other open-hardware devicesWe might be able to modify open-hardware designs to be compatible with our preferred interface, rather than having HL2 attempt to support lots of open-hardware interfaces. What would our prefered interface be? Would it be similar to our UART based interface to the Hardrock50, which allows an HL2 to control only 1 peripheral, or should it be more like USB or I2C which could allow a single HL2 to control multiple peripherals?Currently, the HL2 -> HR50 interface board uses 3.3V UART signaling, which is understood by the Hardrock50, and probably a lot of other devices. However, the Hardrock50 also has USB, as do many other peripherals. Is USB an option? Usually USB with a fairly complex driver, but we don't have a CPU in HL2. I don't know if we can afford a USB master in the gateware. On the positive side, a single USB master could support any number of peripherals, whereas UART supports only 1. Here's a simple-ish USB host core using ~400 registers and LUTS. Are we this constrained on the FPGA?Using I2C signalling, amplified to 12V with bidirectional bus drivers was suggested as an option. I'm not sure how to assign different devices different addresses on an I2C bus when peripherals can be mixed and matched. Was this scheme meant to work with multiple peripherals on the same 12V I2C bus? Cool if so, also a bit scary.One concern with 3.3V UART is that the current UART to the Hardrock50 is glitchy when the Hardroc50 is transmitting. Some ham radio equipment uses opto-couplers, or digital-isolators. Should we support digital isolators or opto-couplers?Supporting various commercial devicesThe interface to varios radios and power amps seems to be all over the map, which is why we want a microcontroller on the interface board. What features are required to support a broad set of commercial interfaces? For instance:
- What voltage ranges are needed?
- Do we need an A/D or D/A?
- How many I/Os do we need? Are 9 enough?
- Do many require USB?
- Do many require UARTs?
- How could we support opto-couplers/digital-isolators?
What microcontroller should we use?I'd love to use RISC-V based microcontrollers, but cheap RISC-V microcontrollers are not yet available. Some questions:
- Can we use an ARM based microcontroller?
- How do we keep noise from the microcontroller from interfering with the radio?
- What peripherals do we need?
- How many I/Os?
Feel free to post any ideas/thoughts.73, Bill ak3q
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The RP2040 is a 32-bit dual ARM Cortex-M0+ microcontroller integrated circuit by Raspberry Pi Foundation.[1][2][3] At the same time, it was released as part of the Raspberry Pi Pico board.[1]"
And:
The Pico has 264 KB of RAM and 2 MB of flash memory
Hi,
Would software know whether there is a next Gen interface board connected?
From: herme...@googlegroups.com <herme...@googlegroups.com> On Behalf Of James Ahlstrom
Sent: 16 February 2022 16:52
To: Hermes-Lite <herme...@googlegroups.com>
Subject: Re: Discussion of next-gen HL2 interface board
Hello Group,
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3 RF Inputs as below would be ideal.
From: herme...@googlegroups.com <herme...@googlegroups.com> On Behalf Of Reid Campbell
Sent: 17 February 2022 09:21
To: herme...@googlegroups.com
Subject: Re: Discussion of next-gen HL2 interface board
Hi James,
Thanks.
Simon Brown, G4ELI
From: herme...@googlegroups.com <herme...@googlegroups.com> On Behalf Of James Ahlstrom
Sent: 17 February 2022 13:15
To: Hermes-Lite <herme...@googlegroups.com>
Subject: Re: Discussion of next-gen HL2 interface board
Hello Simon,
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New added custom i2c messages added to SDR apps that pass dial frequency and offset? Can leave the existing band i2c messages as is. Then tables in the io board can determine what to do with the frequency/LO data, such as translate to band bits, or do nothing and simply pass them on over serial.
Mike
K7MDL EL87sm & CN88sf
From: herme...@googlegroups.com <herme...@googlegroups.com>
On Behalf Of James Ahlstrom
Sent: Tuesday, February 15, 2022 17:42
To: Hermes-Lite <herme...@googlegroups.com>
Subject: Re: Discussion of next-gen HL2 interface board
Hello Alan,
Sorry for the long delay. I think I need to leave the filter board bits alone so you can switch filters without having to write special software. So you can just continue doing what you are doing now. I will figure out some other way of sending extended information.
Jim
N2ADR
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