FPGAlink with Nexys 4 and Virtex-7 FPGA

[Jason Chan]

I found this FPGAlink code, and I'm interested in it. 

Will FPGALink work with the Xilinx Artix-7 FPGA, specifically XC7A100T-1CSG324C found on the Nexys 4 boards?

i.e., will FPGALink work with Nexys 4 FPGA Boards from Digilent? 

On a related note, will FPGALink work with Xilinx 7 Series FPGAs, specifically the Virtex-7 FPGAs?

[Henry Hallam]

FPGALink will certainly work with any of the FPGAs you mention. To
use it with the Nexys 4 board[1], you'll have to connect an external
FX2LP (recommended) or AVR to a number of GPIOs on the FPGA, as
described in the FPGALink documentation [2].

Henry

[1] http://www.digilentinc.com/Data/Products/NEXYS4/Nexys4_RM_VB2_Final_5.pdf
[2] http://www.swaton.ukfsn.org/docs/fpgalink/vhdl_paper.pdf

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[Chris McClelland]

Incidentally, the need for an external USB interface arises from the
fact that with the Nexys4, Digilent made the baffling (and probably
politically-motivated) decision to drop the Hi-Speed (480Mbit/s) USB
interface from Cypress that they used in previous boards, in favour of
a Full-Speed (12Mbit/s) USB interface from Microchip. FPGALink works
out of the box on pretty much any Digilent FPGA board, *except*
Nexys4. To add native support for Nexys4 you'd have to port one of the
FPGALink firmwares to the Microchip PIC it uses. I suggest the AVR
firmware[1] as a good starting point. I have no plans to do this
myself, but I can help guide you if you want to go that route. But
bear in mind you'll probably only get a communication throughput of a
few hundred kbytes/sec with the onboard PIC.

Chris

[1]https://github.com/makestuff/libfpgalink/tree/dev/firmware/avr

[Jason Chan]

First off, thank you all for the responses. I'm surprised that this got answered so quickly.

With that in mind, let me elaborate on my problem a little more.

I'm trying to communicate between a host PC running Linux (Ubuntu), and an Virtex-7 FPGA board (acting as the slave) directly through USB by connecting a simple USB cable (assuming 2.0 and possibly through a mini/micro USB port on the FPGA board). I tried searching on Google for other related projects that might help and I found FPGALink. It seems interesting, and I think it might work on the host side, but I'm worried about the slave side. On the FPGA side, what does it require to communicate through USB (VHDL code, Xilinx IP Cores)? Does it depend on the UART Chip present on the FPGA board? The FPGA's trying to send/receive data to/from the host PC at a minimum of 32 MB/s, and USB 2.0 support that, just barely. I thought FPGALink might solve our problems. 

If this is too vague, please let me know. Sorry, I'm new to this, and I can't really say much.

[Jason Chan]

Sorry, I also forgot to ask...with FPGALink, do you have to program the Virtex-7 bitstream directly through USB on the host side, or can you use a software like Vivado, program the board via JTAG, and put in VHDL code to talk to the host PC via USB?

[Chris McClelland]

I'm fairly sure all of these questions are answered in the user manual
Henry linked. You should probably read that first. It's a bit out of
date, but it describes the high level fairly well.

[Chris McClelland]

Actually, there's a slightly more recent user manual linked from the
homepage: https://github.com/makestuff/libfpgalink/wiki/FPGALink

[S S]

It might have been a commercially motivated decision to drop the FX2 from Cypress.
It used to be around $7.00 to $9.00 in small quantities (<100) and jumped to $15 about a year ago which might coincide with when the Nexus 4 was developed. Part is back to $9-$10 now. This is still relatively expensive if you compare it to the ARM micros you can get for these sort of prices. Unfortunately the FX2 is the only micro-controller I know of that allows you to access the USB core through a simple buffer system.

Sébastien

> Date: Tue, 7 Oct 2014 23:58:16 +0100
> Subject: Re: [fpgalink-users] FPGAlink with Nexys 4 and Virtex-7 FPGA
> From: proph...@gmail.com
> To: fpgalin...@googlegroups.com

[Chris McClelland]

On the Chinese market I see FX2LP prices in the $3-$5 range, for 10x
quantities. An example of US/EU distributor markup perhaps?

[S S]

Possibly. Or the Chinese parts come without the silicon maybe:
http://blog.saleae.com/counterfeit-parts-are-a-big-headache/
 ;)

> Date: Wed, 8 Oct 2014 16:09:57 +0100

[Jason Chan]

I'm reading over the user guide, and I downloaded the files from GitHub. So far, I downloaded the files from the repo libfpgalink, flcli, and swled. Are there any other repos that are required or recommended?

[Chris McClelland]

You should not download repos yourself, you should follow one of the
build sequences listed on the homepage, for example the one for Atlys:
https://gist.github.com/makestuff/7486988

That will ensure you get all the dependencies, and their correct
versions (currently 20140524).

If you want an example of how to wire your FX2LP to the FPGA on your
PCB, you can use this as a reference:
https://github.com/makestuff/lx9/tree/r3

Chris

[Jason Chan]

Thanks. Sorry, but I got another question.

In a previous post, Mr. Hallum and you mentioned that the FX2LP USB module would work. 

I looked at various microcontrollers, and I found that the FX2LP Module is available, though a little outdated.

http://www.amazon.com/Geeetech-Cypress-CY7C68013A-EZ-USB-Developement/dp/B008G7WE12

I was thinking of buying a module, connect it to the Virtex 7 FPGA, and program it that way through the host computer, just like the documentation says. 

However, I noticed that Cypress came out with the EZ-USB FX3™ SuperSpeed USB 3.0 peripheral controller and the 

CYUSB3KIT-003 EZ-USB® FX3™ SuperSpeed Explorer Kit . (http://www.cypress.com/?rID=99916)

 

The kit has its own FMC peripheral board which makes it advantageous to attach to the Virtex 7 FPGA, but I'm wondering, can FPGALink work with the FX3 USB 3.0 controller, or should I stick with the FX2LP?

[Henry Hallam]

Stick with the FX2LP unless you want a large distraction from your current project... I'm sure a port to the FX3 would be welcome but it would be quite a bit of work.
Henry

[Jason Chan]

Thanks for replying. Again, I apologize, but I'm having trouble with the instructions. 

I'm running off of a Windows computer since I have more control over it.

I followed step 1 by trying to install the Windows SDK. For some reason, it didn't work out for me. The installation couldn't complete, so I tried an alternative way by installing Visual Studio 2013 Ultimate edition. I figured it would come with the packages as well.

Next, I tried step 2 by installing Python 3.4, and I followed with installing PyYAML 3.11 for Python 3.4. 

After that, I downloaded the file specified in step 4, uncompressed it to the makestuff folder in C, ran the setup executable, and created a shortcut on my desktop, and the shortcut failed to work properly, saying on the shell prompt that it couldn't find the path specified, and it closed. I never typed anything in. How can I fix this on my machine? 

I'm running a Windows 7 machine with a 64-bit OS

On Wednesday, October 8, 2014 12:17:13 PM UTC-4, Chris McClelland wrote:

[Chris McClelland]

You should have a look at the shortcut target that was generated for you and try each command individually in an ordinary cmd.exe console to see where it's going wrong.

This thread may help: https://groups.google.com/d/msg/fpgalink-users/RG4XabL-WwE/ciS1W4njzWsJ

Chris

[Jason Chan]

Thanks for the reply. I found the problem on the link provided, though when I tried continuing to follow the instructions, antivirus flagged one of executables as malicious (forgot which one, is this common?). Still trying to follow the instructions and pull the files like you said. 

If this doesn't work out, could you please provide some links to example VHDL projects/files that do use FPGAlink so that I can see how it is implemented on the FPGA side? Right now, we decided to purchase the FX3 with the FMC interconnect board and are thinking of creating an interface to communicate with USB, so still trying to take a look at FPGAlink to see if it can help out. 

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[Chris McClelland]

The antivirus warning is a hoax. Search this forum, you will not find
any complaints about me installing malware on user's PCs. Furthermore
despite the fact that supporting Windows is an awful time-sink, I am
prepared to fix any specific problems with the installer, but to do
that I need precise information about what you did, and what went
wrong. To give you some idea, these build instructions should take
about 15 minutes to execute, so if it's taking you 15 days, something
is very wrong. But unless you tell me precisely what's going wrong for
you, I can't help.

FPGALink does not support the Cypress FX3, but I will gratefully
accept patches and an FX3 firmware port if you wish to do it yourself,
but I should warn you this is not a trivial task.

Anyway, here's the example code you asked for (which the build
infrastructure fetches and builds correctly using the Xilinx or Altera
tools). First, the top level entity:

https://github.com/makestuff/swled/blob/20140524/templates/fx2min/vhdl/top_level.vhdl

This instantiates the comm_fpga_fx2 module, for USB communication via
an FX2 chip:

https://github.com/makestuff/comm-fpga/blob/20140524/fx2/vhdl/comm_fpga_fx2.vhdl

...and the actual application module, which just messes with some registers:

https://github.com/makestuff/swled/blob/20140524/templates/harness.vhdl
https://github.com/makestuff/swled/blob/20140524/cksum/vhdl/cksum_rtl.vhdl

This is better explained in the user manual, which is linked from the home-page.

Chris

[Jason Chan]

Thanks for replying. I decided to try again, and I found where I went wrong.

I fixed the shortcut, so it works now, and I followed the steps directly for the Windows instructions. 

When I ran "make deps", my antivirus detected that the wget.exe found in makestuff/msys/bin/wget.exe was infected, but for this, I decided to ignore it for now, and the program continued. I fetched hdlmake through using msget.sh, but when I tried to fetch swled with hdlmake.py, I get the following error:

<ANON>@<ANON>-PC$ ../bin/hdlmake.py -g makestuff/swled

  File "../bin/hdlmake.py", line 50

    print "Fetching " + url

                    ^

SyntaxError: Missing parentheses in call to 'print'

<ANON>@<ANON>-PC$ ../bin/hdlmake.py -g makestuff/swled

  File "../bin/hdlmake.py", line 50

    print "Fetching " + url

                    ^

SyntaxError: Missing parentheses in call to 'print'

<ANON>@<ANON>-PC$ ls

README

Is this a problem with the Python script, or is it something to do with the instructions? I'm sure I entered the command correctly.

[Chris McClelland]

I noticed previously, you wrote "...I tried step 2 by installing

Python 3.4, and I followed with installing PyYAML 3.11 for Python
3.4."

Which quickstart told you to install Python 3.4? As far as I'm aware
all the quickstarts say to install 2.7, e.g:
https://gist.github.com/makestuff/7829484#file-nexys2-howto-L48

At some point I'll make it work with Python 3.x, but for now you'll
need 2.7 like it says in the quickstart.

Chris

[Henry Hallam]

Jason: FYI, Python 3 involved some significant changes to the language
and libraries that are not backwards-compatible. So it is quite
common for software to require python 2.7.x. Most linux systems make
both versions available. Some more discussion here:
http://blog.startifact.com/posts/python-2-gravity.html

[Chris McClelland]

I actually did port the FPGALink Python binding itself to 3.x, in a
way that is backwards-compatible:

https://github.com/makestuff/libfpgalink/commit/6e1b2897f4c6611ae48db6fc6df4aafea4b46ce5

...but I never got around to doing the port for hdlmake.py.

Chris

[Jason Chan]

Sorry. It was the python version, so I uninstalled Python 3 and went with 2.7.8. That seems to work.

I continued along with the steps. hdlmake.py worked, so I continued, but something happened with the following command:

<ANON>@<ANON>-PC$ ../../../../../bin/hdlmake.py -t ../../templates/fx2all/vhdl -b atlys -p fpga

MakeStuff HDL Builder (C) 2012-2013 Chris McClelland

[Running tests]

[Finished testing]

Fetching https://github.com/makestuff/seven-seg/archive/20140524.tar.gz

Fetching https://github.com/makestuff/comm-fpga/archive/20140524.tar.gz

Unique HDLs:

  ../../templates/fx2all/vhdl/../../harness.vhdl

  ../../templates/fx2all/vhdl/top_level.vhdl

  c:/makestuff/hdlmake/libs/makestuff/comm-fpga/fx2/vhdl/comm_fpga_fx2.vhdl

  c:/makestuff/hdlmake/libs/makestuff/seven-seg/vhdl/seven_seg.vhdl

  cksum_rtl.vhdl

'xst' is not recognized as an internal or external command,

operable program or batch file.

ERROR: The xst process failed

I'm not sure if this is a problem with one of the files, but I wanted to see if this was an issue.

[Jason Chan]

Sorry, I didn't know that there were differences in the python version. The guides said 2.7.8, but I thought 3 would work just as well. Someone mentioned the differences, so now I'm with 2. 

[Henry Hallam]

The problem is as described in the error message:

'xst' is not recognized as an internal or external command,
operable program or batch file.

This means that the Xilinx tools are not installed, not installed
correctly, or missing from the path.

[Chris McClelland]

Step 1: google the error.

https://www.google.com/search?q="ERROR%3A+The+xst+process+failed"

[Aveek Chandra]

Hi Chris,

  We are using Xilinx Kintex 7 FPGA KC705. After doing some tests mentioned in manual, we would like to code it and be able to send receive/store data. Do you think we can use the fpgalink library ?
If yes, first we would like to get the modules/libraries for establishing PCie connection. Subsequently we would like to transfer it to DAC module externally connected !!
PLease kindly comment and  make suggestions !

Thank you
Aveek

[Chris McClelland]

I have not done any work to integrate Xilinx PCIe into FPGALink. I do have a proof-of-concept direct-I/O PCIe solution[1] for Altera Stratix V & Cyclone V though, which may give you a head start. I will probably be starting some Xilinx PCIe work in the next several months, but certainly not imminently.

Chris

[1]https://github.com/makestuff/altera-pcie

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