Spartan 6 PCB

[Sab V]

Hi,

Why is it that I see a ressitor from Pin 60 to ground on the PCB?

[Chris McClelland]

During configuration, pins 69 and 60 (ramBank_out{0} and ramAddr_out{2} respectively) serve a special function: they are M0 and M1, which tell the FPGA which of several possible configuration modes to attempt. Refer to table 2-1 of UG380[1] and you'll discover that for SPI-Master config mode, M1 must be pulled low and M0 high. The "Overview" section of UG380 suggests 2K4 resistors for this[2], but I used a 2K2 pull-down on M1 because I already had some 2K2 resistors in the BOM. In spite of what UG380 says, a pull-up on M0 is not necessary because according to table 5-2, M0 and M1 have internal pull-ups.

[1]http://www.xilinx.com/support/documentation/user_guides/ug380.pdf

[2]"The M1 and M0 mode pins should be set at a constant DC voltage level, either through pull-up or pull-down resistors (2.4 kΩ), or tied directly to ground or VCCO_2."

On Tue, Jan 12, 2016 at 8:11 AM, Sab V <madman...@gmail.com> wrote:

Hi,

Why is it that I see a ressitor from Pin 60 to ground on the PCB?

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[Chris McClelland]

(This is described in detail in https://github.com/makestuff/lx9/blob/r3/NOTES.txt BTW)

[Sab V]

Hi,

Sorry for the late reply. Anyway, the JTAG configuration document says that if I plan to use only JTAG and no SPI flash then these pins do not matter. Take a look http://www.xilinx.com/support/documentation/user_guides/ug380.pdf at Pg 63, last para.  But yes, they also have internal pull ups.

The second question I has was regarding the use of AMS1117 for power? DO you think it dissipates too much heat. Is it better to use a switching regulator?

[Chris McClelland]

Oh yes, if you don't need it to boot, you can omit the pull-down resistor. But you'll have to JTAG-program the FPGA every time you cycle the power.

Anecdotal evidence: I have never felt either AMS1117 on any of my LX9 boards get warm.

[Sab V]

OKay. Cool. Thanks for the help

[Michael Simmonds]

For what it's worth...
Also make sure that pin 39 (INIT_B) is high during bootup or the FPGA will hang.  That mistake nailed me badly a while back.

[Sab V]

Yes. I have pulled the pins up. Thanks for the help :-)

On Sat, Jan 16, 2016 at 3:56 AM, Michael Simmonds <simm...@montana.net> wrote:

For what it's worth...
Also make sure that pin 39 (INIT_B) is high during bootup or the FPGA will hang.  That mistake nailed me badly a while back.

--

[Chris McClelland]

I assume you've googled and found the results unsatisfactory, so you're going to have to be more specific.

On 29 Jul 2018, at 22:58, Nedasada...@gmail.com wrote:

Hello

Where can i fin spartan 6 io block diagram?