Indeed none of the external signals control the frame output directly, BUT if the CLOCK_IN signal is unstable, then the timestamp is getting continuously reset to zero, and that will break the frame output, which expects all of its pixels to come out with
an increasing timestamp, and if that's not happening, no frame is generated.
The events just 'slip through' the cracks between timestamp resets and will still be visualized to some extent, but their timestamps will be mostly wrong.
If they're not, the isolation component on the PCB that receives SIGNAL_IN and CLOCK_IN just won't work and you get very random results. If your signal generator doesn't provide a separate VDD output, then generating it separately (with the same voltage
swing) and shorting GND, as per your first drawing, is the correct solution.
If you're not using CLOCK_IN but only SIGNAL_IN, we recommend just also putting VDD on CLOCK_IN which will disable it, if you leave it floating there's a good chance it will couple with SIGNAL_IN over the long cable and go up and down following that signal
instead, which will result in the timestamps resetting all the time and the side-effects I described above.
To summarize, if only using SIGNAL_IN:
- VDD_IN and CLOCK_IN -> connect to your VDD, eg 3.3V
- GND_IN -> connect to your GND
- SIGNAL_IN -> connect to your trigger signal
Hope this helps, have a nice day!
--
Luca Longinotti (llongi)
Senior Software Engineer
iniVation AG - https://inivation.com/
A SynSense Group company