Beaglebone Black GPMC Tutorial

[Jack Zhang]

Hi everyone,

Does anyone know a good GPMC tutorial? Or examples of code for this with BBB.

I know how to change the Pin Mode already with device tree.

[Jack Zhang]

Is anyone out there working on GPMC??

This is very difficult!

[Gerald Coley]

How are you planning on using the GPMC bus?

Gerald

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Gerald

 

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[Jack Zhang]

Hi Gerald,

I wish to store the signals that comes in from a ADC. But I know very little about the GPMC.

A number of questions that I have:

1. How do I set up the GPMC such that it will start doing that? Do I do that in the device tree layout or in code? If so, do you have any examples that I can follow.

2. How do I use the Direct Memory Access (DMA) function? I can't seem to find a detailed explanation of this.

Jack

[Gerald Coley]

I have no idea. That sounds like a software question to me.

Gerald

[Mark Lazarewicz]

Jack  the TRM discusses GPMC and EDMA 7.1 GPMC 7.1.1 Introduction Examples on How to set it up might be tough I would check the starterware I know of one military SDR app needed this so for OMAP4 I am sure the GPMC is similar but you wont find that code in the public domain Dont expect any help from most  the SW people on here they spend their lives writing convoluted scripts to build Linux and have no real Your asking for help in a area ecompassing REAL world applications in a forum addressing some hobbyist version of Linux that targets the mobile world and is  DOMINATED by  FAE scripsters adept at convoluting how to build a kernel TI TRM's usually has a step by step sequence that explains what to do and you will have to code it --- On Mon, 6/17/13, Jack Zhang <jackzh...@gmail.com> wrote:

[Mark Lazarewicz]

Jack I do remember the timing of the FPGA or ASIC has to match what the GPMC was intended for ie see below . I do know customer got this to work eventually. Once you get the software working Gerald or some of the excellant HW people on here may guide you in narrowing down/debugging it if it doesnt work the first time but that may be beyond the scope of the this forum. Good Luck The general-purpose memory controller (GPMC) is an unified memory controller dedicated to interfacing external memory devices: • Asynchronous SRAM-like memories and application-specific integrated circuit (ASIC) devices • Asynchronous, synchronous, and page mode (only available in non-multiplexed mode) burst NOR flash devices • NAND Flash • Pseudo-SRAM devices

--- On Mon, 6/17/13, Jack Zhang <jackzh...@gmail.com> wrote:

From: Jack Zhang <jackzh...@gmail.com> Subject: Re: [beagleboard] Re: Beaglebone Black GPMC Tutorial To: beagl...@googlegroups.com Date: Monday, June 17, 2013, 10:50 AM

[Jack Mitchell]

On 17/06/2013 18:25, Mark Lazarewicz wrote:
> Jack
>
> the TRM discusses GPMC and EDMA
> 7.1 GPMC
> 7.1.1 Introduction
>
> Examples on How to set it up might be tough I would check the starterware
>
> I know of one military SDR app needed this so for OMAP4 I am sure the
> GPMC is similar but you wont find that code in the public domain
>
> Dont expect any help from most the SW people on here they spend their
> lives writing convoluted scripts to build Linux and have no real

Heh, there are some extremely talented people on this list, who will
answer properly phrased questions; where previous research and attempts
at solutions are presented.

>
> Your asking for help in a area ecompassing REAL world applications
> in a forum
> addressing some hobbyist version of Linux that targets the mobile world
> and is DOMINATED by FAE scripsters adept at convoluting how to build a
> kernel

I think you'll find that those convoluted kernel scripts enable me to
build professional broadcasting products based on Linux in a
_deterministic_ way. I would imagine that is as real world as it gets,
and is no way related to anything mobile; what you have stated is nonsense.

I think there is an FPGA cape which uses the GPMC bus, whether that uses
it in a similar way to what you are envisioning; I don't know, but the
code is GPL licensed, and as such available to view.

If you wish to do low level work like this I would recommend you either
delve into some Linux Kernel programming guides or move to something a
little closer to the metal, such as the suggested StarterWare, which TI
provides support for.

The mmc and spi drivers that the 'convoluted' kernel scrips build, make
use of edma within the Linux kernel, that would also be a good place to
go exploring.

Cheers,

--

Jack Mitchell (ja...@embed.me.uk)
Embedded Systems Engineer
http://www.embed.me.uk

--

[Philip Balister]

I did this a while back:

https://github.com/balister/linux-omap-philip/blob/e100-2.6.38/drivers/misc/usrp_e.c

and (for GPMC setup see):

https://github.com/balister/linux-omap-philip/blob/e100-2.6.38/arch/arm/mach-omap2/board-overo.c

No devicetree help here though. I also do build system work and ignore Lazerman.

Philip

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[Mark Lazarewicz]

--- On Mon, 6/17/13, Jack Mitchell <m...@communistcode.co.uk> wrote:I think there is an FPGA cape which uses the GPMC bus, whether that uses it in a similar way to what you are envisioning; I don't know, but the code is GPL licensed, and as such available to view Good news for Jack if  1) Device is similar 2) He can find the code Thanks for Jack

[Jack Zhang]

I read somewhere that I need to send a DMA request to get the GPMC to store the input data from the expansion to set to the memory.

Does anyone know how to do this?

Jack

[Philip Balister]

You do not need to use DMA to talk to devices attached the the GPMC.

Jack

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[magyarm]

Here are two githubs for the Blank Canvas Cape, an fpga add-on cape for the beaglebone. https://github.com/emeb/bcc_lib and https://github.com/ka6sox/bcc_software.

The first one is by the cape creator, Erik Brombaugh, and includes everything you need to program the fpga from the beaglebone. The second link is from Tom King and includes a DTS file for the blank canvas cape, and an example verilog implementation of SRAM for the fpga.

I think the .dts will help you get started setting up the gpmc and IO pins. If you can provide more information on what you are trying to connect to the beaglebone I probably better advise where you can look. As mentioned by others the AM335x datasheet and Technical Reference Manual will be your best friends. (http://www.ti.com/litv/pdf/sprs717f and http://www.ti.com/litv/pdf/spruh73h).

A quick google also revealed these two pages that will be of interest to you: http://processors.wiki.ti.com/index.php/AM335x_NAND_Driver's_Guide and http://processors.wiki.ti.com/index.php/Tips_for_configuring_OMAP35x,_AM35x,_and_AM-DM37x_GPMC_registers

Best of luck, and report back how things work out. :)

[Jack Zhang]

For now, I just want something as simple as connecting some 3.3 V to the expansion set (having switched the mode to GPMC), which will form some form of an 8 bit input (for example: 10101010).

My question, how do I configure the GPMC such that it will store that input into the memory and how can I read on that, say on the console?

Jack

[magyarm]

Ah, in that case take a look at this: http://engineersofthecorn.blogspot.ca/2012/06/faux-gpmc-interfacing-with-beaglebone.html. It's exactly what you want to do, but for pre-device tree, so you will have to adjust for that.

[Jack Zhang]

Thanks that really helped. I can get that to work on my beaglebone.

But eventually I have to get it working on my beaglebone black. As you probably know, the difficulty with that is change in the Pin Mux to mode 0 for the input. Beaglebone black does not let you do that, because it has something to do with eMMC. Do you know how to bypass that?

Thanks!

Jack

[magyarm]

The beaglebone black boots off the eMMC, so takes exclusive access of the GPMC pins. You have to boot off the sdcard and disable the eMMC. I remember seeing a post about this... want to hold the eMMC in reset I believe. I can't find the post right now, but you should be able to get at it somewhere in google groups. I only have beaglebone whites, so have never had to do this.

Good luck, and please report back what you find.

[magyarm]

Took a quick look around, this looks like it will be useful: https://groups.google.com/forum/#!searchin/beagleboard/emmc$20disable/beagleboard/pSOre-xZz8o/fh9GdHn_JXsJ

[Jack Zhang]

Finally found out how to do this.

In your uEnv.txt file which you can access on the USB. Delete whatever is on that, and add the following line:

optargs=quiet drm.debug=7 capemgr.disable_partno=BB-BONE-EMMC-2G

This will disable the EMMC. When you "cat /sys/devices/bone_capemgr.9/slots" you will get

 0: 54:PF--- 

 1: 55:PF--- 

 2: 56:PF--- 

 3: 57:PF--- 

 4: ff:P-O-- Bone-LT-eMMC-2G,00A0,Texas Instrument,BB-BONE-EMMC-2G

 5: ff:P-O-L Bone-Black-HDMI,00A0,Texas Instrument,BB-BONELT-HDMI

Now you can load your device tree. Here is a sample of my code.

/*

 * FL-PCONV-001-001.dts

 *  

 */

/dts-v1/;

/plugin/;

/ {

compatible = "ti,beaglebone", "ti,beaglebone-black";

/* identification */

part-number = "FL-PCONV-001-01";

version = "00A0";

/* Set up pin multiplex */

fragment@0 {

target = <&am33xx_pinmux>;

__overlay__ {

mynet_cape_00a0_pins: pinmux_mynet_cape_00a0_pins {

pinctrl-single,pins = <

/* 8-bit data bus */

0x000 0x20 /* gpmc_ad0 MODE0 | INPUT */

0x004 0x20 /* gpmc_ad1 MODE0 | INPUT */

0x008 0x20 /* gpmc_ad2 MODE0 | INPUT */

0x00c 0x20 /* gpmc_ad3 MODE0 | INPUT */

0x010 0x20 /* gpmc_ad4 MODE0 | INPUT */

0x014 0x20 /* gpmc_ad5 MODE0 | INPUT */

0x018 0x20 /* gpmc_ad6 MODE0 | INPUT */

0x01c 0x20 /* gpmc_ad7 MODE0 | INPUT */

/* Chip select */

0x080 0x00 /* gpmc_csn1 MODE0 | OUTPUT */

/* Output enable */

0x094 0x00 /* gpmc_oen_ren MODE0 | OUTPUT */

/* Write enable */

0x098 0x00 /* gpmc_wen MODE0 | OUTPUT */

/* Wait */

0x070 0x20 /* gpmc_wait0 MODE0 | INPUT */

/* Interrupt */

0x078 0x27 /* gpmc_ben1 MODE7 | INPUT */

>;

};

};

};

/* Set up the GPMC interface */

fragment@1 {

target = <&gpmc>;

depth = <1>; /* only create devices on depth 1 */

#address-cells = <1>;

#size-cells = <1>;

__overlay__ {

status = "okay";

#address-cells = <2>;

#size-cells = <1>;

pinctrl-names = "default";

pinctrl-0 = <&mynet_cape_00a0_pins>;

/* chip select ranges */

ranges = <1 0 0x01000000 0x1000000>;

};

};

};

[Jack Zhang]

There is a problem with this, that I am trying to investigate.

After a while, the BBB will just freeze with USER2 (activity indicator) and USER3 (eMMC) on.

[mae...@gmail.com]

I have the same problem. I think its because I drive the inputs of the emmc on the extension header at start up. The crash is always between 1 to 5 minutes after start up. 

Any idea how to solve this problem except not using this pins?

[Gerald Coley]

Disable the eMMC and run from the SD card. Using the pins is the easiest if you can use other pins. Driving the pins on power up, which it sounds like may not be the case here, can damage the eMMC.

Gerald

--

[maxith...@gmail.com]

I was able to get a GPMC device tree loaded with your help, and it seems like everything is working. But how do I actually use the GPMC? I know for gpio I can just access the pins with command line using /sys/class/gpio, but that doesn't seem to work for GPMC...

On Tuesday, June 25, 2013 3:19:56 PM UTC-7, Jack Zhang wrote:

[todd...@gmail.com]

I've only used the GPMC in a non-linux, bare metal environment.  What it boils down to is that in the course of setting up the GPMC, you are coupling an address space in the AM335x's memory map with a particular chip select, an address space in the peripheral's memory map, and timing information to successfully communicate with the peripheral.  

So, lets say you have mapped 0x01000000 in the AM335x's memory map to Chip Select 0, and defined the space as 16MB.  If you perform a write to any address between 0x01000000 and 0x01FFFFFF, the memory controller will recognize this as a GPMC write, and will assert Chip select 0, and put the address and data on the address and data pins, using the timing information you specified.

In the case of NAND memory, and other devices that cannot be directly written to with a single address and data word, the GPMC can also be configured to perform all of the necessary actions to allow it to write to the memory.

So, to answer your question, you use the GPMC by writing to or reading from a memory address within the address space you've configured the GPMC to control. Performs the memory access.

[Max Woo]

Wow Todd, thanks for the great explanation! I was eventually able to figure it out by modifying the code from here. It seems like using "mmap" is the cleanest way to do it. Here's the code I used for testing gpmc

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"Be who you are and say what you feel because those who mind don't matter and those who matter don't mind" - Dr. Seuss

[nilesh...@gmail.com]

I have downloaded the kernel and test on Overo Gumstix board.
I did not get the source code for FPGA to check the exact communication.
So i wrote myself the code which writes data to BRAM from GPMC.
in this driver i did not understand the DMA working and "RX_DATA_READY_GPIO ,TX_SPACE_AVAILABLE_GPIO"  pin working

I have bypassed the dma and wrote directly data to GPMC with memcpy. but it shows very slow speed.
The time between two packets transfer is round about 8ms. its huge time how can i reduce this time.
//============
for(i=0;i<100;i++)
 n = write(fp, buf, Wbytes);
//==============


is there the FPGA code and c user level(application) code available to test the driver?

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[seeta...@gmail.com]

Hi Todd,

I am trying the GPMC interface on AM335x for VFD (Vacuum Flouroscent Dsiplay) interface. I have configured the GPMC_config_registers and trying to Write into the configured memory address but the code crashes with exception. Not sure what is going wrong. I am trying this on TI starterware (OS less) environment using CCS. I have posted a question in TI e2e forum

 https://e2e.ti.com/support/embedded/starterware/f/790/t/490638

I am not connecting the actual VFD panel but just trying to debug this code. It crashes when i'm writing a byte to the configured GPMC address. Can you please review this and suggest me what is wrong here.

Thanks,

Seetaram