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On 29 Jun, 2014 1:37 am, "Tony Prisk" <li...@prisktech.co.nz> wrote:
>
> Thanks for this. I don't have time at the moment to integrate it into our source but I have updated the wiki to include/correct the info for WM8880 if someone else wants to have a go.... I expect it should be pretty simple since most of the code is already written - it just needs someone to create a devicetree file and add a build option for the WM8880 since it needs GIC support.
Plus also write a couple of init-time functions to bring up the secondary CPU and let it know its entry point (I guess).
It's pretty great to have the sources, thanks for the heads up!
Best,
Alexey
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On 30/06/14 01:51, Alexey Charkov wrote:
On 29 Jun, 2014 1:37 am, "Tony Prisk" <li...@prisktech.co.nz> wrote:
>
> Thanks for this. I don't have time at the moment to integrate it into our source but I have updated the wiki to include/correct the info for WM8880 if someone else wants to have a go.... I expect it should be pretty simple since most of the code is already written - it just needs someone to create a devicetree file and add a build option for the WM8880 since it needs GIC support.Plus also write a couple of init-time functions to bring up the secondary CPU and let it know its entry point (I guess).
It's pretty great to have the sources, thanks for the heads up!
Best,
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2014-08-15 9:05 GMT+04:00 Tony Prisk <li...@prisktech.co.nz>:
>
> On 15/08/14 08:36, Alexey Charkov wrote:
>> Got my WM8880 to boot (almost). Current issues:Not yet. Just one core for now, but in an SMP kernel and with TWD
>>
>> 1. UART dies somewhere during termios setting
>> 2. Again some weirdity with contrast (apparently)
>> 3. Waits forever for the root FS on SD card
>>
>> But RTC works, USB works, screen shows stuff. Can share current
>> DTS+DTSI if anyone is interested - otherwise will investigate the SD
>> issue first.
>>
>> Best,
>> Alexey
>>
> Booting both cores?
enabled. I hadn't taken note of the register to put the secondary
core's starting vector before our Chinese friends took down the APC
Rock II sources, and it's kind of tricky to find that by reverse
engineering.
Best,
Alexey
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On 31 Aug, 2014 1:26 pm, "Cray Ze" <cray....@gmail.com> wrote:
>
>
> I believe I'm stuck, cant make it past "Starting kernel ...", I don't get the decompressing message.
>
> I'm starting with an up to date pull of the testing branch with all files and patches from this thread applied, and following the 'Build-the-source' page on github (selecting WM8880).
Which testing branch is that? Just 'testing' or 'testing-serial' or 'testing-smp'? The former is pretty outdated by now. I'd suggest 'testing-serial' (should somewhat work even without further patches).
> Serial console is configured via console=ttyS0,115200n8 on the command line.
WMT's don't use a standard UART - rather a WMT-specific one. So you should use ttyWMT0 instead of ttyS0. Except with WMT kernels, which pretend that it's a standard one, for no good reason.
Also consider using 'earlyprintk' in conjunction with respective config options under Kernel hacking - this will show you early messages before UART driver gets loaded.
> Is my tool-chain likely to be a problem? Gentoo crossdev generated (armv7a-hardfloat-linux-gnueabi-).
That's what I use too, works perfectly.
> Any advice as to where I should be looking for the problem?
Also check that you've appended the right DTB for your 8880... That's often a problem.
Best,
Alexey
On 6 Sep, 2014 2:48 am, "Cray Ze" <cray....@gmail.com> wrote:
>
> I've had a chance to play about with this, obviously I was never going to get anywhere with ttyS0 :)
>
> The SMP stuff appears to be stable, it's the chip that's broken. A9 r3p0 in my wm8880 SOC.
>
> If you turn SMP back on, along with the following three errata options, you'll have more joy.
> [*] ARM errata: possible faulty MMU translations following an ASID switch
> [*] ARM errata: Data cache line maintenance operation by MVA may not succeed
> [*] ARM errata: A data cache maintenance operation which aborts, might lead to deadlock
Do you observe panics in ehci-q:qh_completion due to null pointer to URB? Did those errata improve the situation for you?
I've managed to connect KGDB to my machine (will post patches), but it would take some time before I figure out what's wrong there...
> Also noticed that second core fails to start if 'Compile the kernel in Thumb-2 mode' is selected.
That might be because the 'holding pen' function is written in asm and in ARM mode, and it branches without mode switch into the C entry point.
Will need to check, though.
Thanks a lot,
Alexey
On 6 Sep, 2014 1:20 pm, "Cray Ze" <cray....@gmail.com> wrote:
>
> Without the errata enabled I get lots of ehci-q:qh_completion panics. After enabling the three errata fixes covering the cortex A9 r3p0, the panics are gone and I have a usable machine.
> Even with SMP disabled, a task (usually the gnu assembler) would occasionally hang, eating %100 CPU. With the errata applied, that issue is also fixed.
That sounds awesome, thanks a lot for sharing! Will try.
Cheers,
Alexey
On Tuesday, July 2, 2013 7:11:46 PM UTC+12, Tony Prisk wrote:On Sunday, June 30, 2013 6:05:42 PM UTC+12, Tony Prisk wrote:On Saturday, June 29, 2013 9:52:10 PM UTC+12, Tony Prisk wrote:On Wednesday, June 26, 2013 5:35:39 PM UTC+12, Tony Prisk wrote:I got one of these tablets today - unfortunately on disassembling it, I can't see a serial port/uart connection.
Slightly disappointing.
I will drop the board out and photograph it so I can get a better look - There are a few GPIO pads exposed, and a lot of testpoints for voltages.
Regards
Tony P
Not having a lot of luck - Had a play with the tablet on vendor firmware and it doesn't seem too bad (although 512MB memory is definitely a limiting factor).
One thing that doesn't seem to be working is the USB. If I connect it to my PC, it refuses to accept an address and fails. If I used HOST mode, it doesn't seem to detect the USB Flash Disk that is attached.
Still haven't located a uart header, although there is a 7 or 8 pin header (well, pads) on the back of the board which could be a possibility (several pins all routed back to the WM8880 in a bus-like fashion).
Looks like it now has a GIC (interrupt controller). I have done some quick updates on the WIKI to show what I've found.
Regards
Tony P
Still no luck finding the UART output...
I have confirmed that the vendor kernel has support for UART0..3 - found the memory space and irq's for them.
GPIO memory space doesn't seem to have changed (0xD8110000)
Serial Flash, EHCI, UHCI, NAND Flash, SD/MMC Controller, PWM, SPI 0 and I2C all seem to be located in the same IO space as well.
There is a new I2C3 (@ 0xD83B0000) and I2C4 (disabled on my board so I don't know where it is yet).
Finding the GIC has proven difficult as well - without it, getting even serial console working will be difficult.
Also, it appears there are some clock tricks going on again (or still).
Checking the PLL's, I see the kernel reading PLLB=700Mhz.
Testing this against the WM8850 PLL formula gives the expected results - A 24Mhz source clock.
When my tablet is idle, I get a PLLA=600Mhz (which is the lowest cpufreq frequency).
When running Antutu CPU benchmark though, it only jumps up to PLLA=800Mhz.
I also noticed that my result from Antutu is ~9000, whereas the screenshots posted on 1pad.cn show ~11000. When I compared them, it appears the only difference is in the 3D performance. Looking through dmesg I see an error for "please add mbsize=73M to kernel commandline". Guess someone didn't test it very well ;) Something to fix when I get uboot access.
Regards
Tony P
Found the UART pins finally - looks like the 8 pin pads on the bottom of the board are a sort of multifunctional input.
With a bit of board tracing, the first two pins are the UART tx/rx.
The other pins are other functions, one of which appears to be for for rewriting the serial flash.
Annoyingly, they are high density so I will need to get some enamel wire before I can put a header on them - Then I'll be able to finally see why the kernel isn't booting :)
Regards
Tony P
The pins are 0.5mm spaced. I soldered some 0.25mm enamelled wire on them and confirmed they work - Being a bit stupid, I didn't glue the wires and after half an hour or so I managed to pull the pad off the board so that pretty much ends any debugging I can do on the WM8880.
Regards
Tony P
I boot it successfully with root fs on USB. Don't think SD works, although I haven't yet tried after enabling errata.
Best,
Alexey
As a heads-up: just discovered that not everything is rosy with
interrupts. Almost finished booting into a Fedora image on a USB stick
and got a kernel panic in some per-cpu interrupts from EHCI.
Looks like my TWD attempted to interrupt the secondary CPU, which is
unconfigured. Or maybe it's something totally different...
Will try disabling TWD altogether for now.
Best,
Alexey
2014-09-21 11:35 GMT+04:00 Cray Ze <cray....@gmail.com>:
> Is there a way to test the TWD?
>
> I changed the device tree entry a bit.
> Added an interrupt per core as suggested by the devicetree docs. Also added
> the twd-watchdog entry.
> Switched back to pos_edge triggering for the interrupts, still not sure if
> we want edge or level here (varies with different vendors).
I believe stock kernel sets everything to level.
> Attached both to the the peripheral clock.
Was it just a guess, or did you have any reference for it? It's good
to know the tick rate in advance, but getting it wrong could be messy,
and I didn't find anything meaningful in Rock-II sources.
Also, I haven't found any interrupts beyond 13 in vendor sources, so I
haven't included anything like that in my device tree. Is this some
kind of a standard arrangement?
Each Cortex-A9 processor has its own private timers that can generate interrupts, using ID29.
Each Cortex-A9 processor has its own watchdog timers that can generate interrupts, using ID30.
http://terefrio.tuars.com/images/back.jpg
http://terefrio.tuars.com/images/frontimi.jpg
Try that unsoldered header on the front, in the 'internal' corner next to NAND and SPI flash. Most likely it has serial and SPI flash pads - looks very similar to other boards.
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you refereded to this pins, right?
Exactly. Have a look at prior posts: I think Marius posted a picture of his board with Rx marked, and Tx is the one next to it (either 1 and 2 or 2 and 3 - can't remember for sure). The header seems to be the same on many WM8880 boards.
http://terefrio.tuars.com/images/rxtx.jpg
Thank you so much for all your patience and sorry for mi bad english
sorry the bad english
At least it shows something, so your u-boot is alive. Thus you can potentially use scriptcmd to reflash the bootloader environment and OS.
Can't say anything further, as you haven't provided any details on your flashing script/environment.
Please start a new topic if you'd like to discuss anything further on this - this one is a bit too long and divergent already...
Thanks,
Alexey
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On 15 Dec 2015 15:46, <jeremy...@gmail.com> wrote:
>
> I recently got an Elovo X6-13V21 laptop with a WM8880, planned to install Linux on it natively. I wanted something a little more powerful and portable than a Raspberry Pi. It's been a real pain, though. No one on any forum has been able to help me, and looking through this thread I'm starting to see why. It took me forever to find out the manufacturer. It turned out not to be useful information after all, though.
>
> I've been looking for anyone that might know something about this device, and you guys seem to fit the bill. I've never played around with U-boot much, but I was able to dump/extract the U-boot image from a rooted installation of Android on the laptop. I figured out that I could make the device cycle its power until I removed the SD card by putting a compiled mkImage script with "poweroff" in either FirmwareInstall/autorun.1.wmt on an SD card, or FirmwareInstall/autorun.u.wmt on a USB device. I can't see what U-boot is doing, though, and I have no experience working with it.
It should be relatively easy to install Debian using the stock kernel - or, for that matter, using one compiled from APC Rock II sources (though I haven't really tried for the lack of time).
You just create a root filesystem using debootstrap and make your scriptcmd load the stock kernel from NAND (if necessary, with a custom initramfs).
Debian's official docs describe debootstrap usage quite well - just keep in mind that you won't be able to chroot into your freshly made root fs (so you'll need to e.g. set the root password via other means, like booting directly into the shell as init first). Also skip anything bootloader related.
If you have a rooted Android system, you can easily use that to dump the u-boot config partition to see what it does in the stock boot sequence (may be a good idea to replicate most of that, except the kernel command line and initramfs).
Happy to help you out with this if you promise to document the whole process in a wiki article on some relevant site ;)
Cheers,
Alexey