Could you pinpoint the location (highest level routine) where the IC
is accessed, and thus determined if its a hit/miss. That way, I can
create my own flag/statistic to determine the miss ratio.
Looking at the code, I see that an IC_Miss from ic/ic.cc is invoked
from is-<arch>.cc
from the ::GenerateMiss routine, one for each IC. However, its not
clear to me from where GenerateMiss is called, that I can determine
hit/miss. In other words, I am looking for something like
if(hit) {
return;
} else {
GenerateMiss()
}
Rather, what I see is something like the following code snippet where
GenerateMiss() is called after __bind() and after a ret(). In this
case, I presume it would be a hit if it did actually call Ret() and
not continue down to __bind() & GenerateMiss()
void StoreIC::GenerateNormal(MacroAssembler* masm) {
Label miss;
Register receiver = StoreDescriptor::ReceiverRegister();
Register name = StoreDescriptor::NameRegister();
Register value = StoreDescriptor::ValueRegister();
Register dictionary = r3;
DCHECK(
receiver.is(r1));
DCHECK(
name.is(r2));
DCHECK(
value.is(r0));
__ ldr(dictionary, FieldMemOperand(receiver, JSObject::kPropertiesOffset));
GenerateDictionaryStore(masm, &miss, dictionary, name, value, r4, r5);
Counters* counters = masm->isolate()->counters();
__ IncrementCounter(counters->store_normal_hit(), 1, r4, r5);
__ Ret();
__ bind(&miss);
__ IncrementCounter(counters->store_normal_miss(), 1, r4, r5);
GenerateMiss(masm);
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