compile error

[Hamid Reza Motaman]

Hello, I have already compiled M5. but I confronted with this error when I tried to compile MV5. I would really appreciate if somebody help me. I really need this software.\

 

build/ALPHA_SE/base/statistics.hh: In member function 'void Stats::DistStor::update(Stats::DistDataData*, const Stats::DistStor::Params&)':
build/ALPHA_SE/base/statistics.hh:1457: error: 'INT_MAX' was not declared in this scope
build/ALPHA_SE/base/statistics.hh:1458: error: 'INT_MIN' was not declared in this scope
build/ALPHA_SE/base/statistics.hh: In member function 'void Stats::DistStor::reset()':
build/ALPHA_SE/base/statistics.hh:1475: error: 'INT_MAX' was not declared in this scope
build/ALPHA_SE/base/statistics.hh:1476: error: 'INT_MIN' was not declared in this scope
In file included from build/ALPHA_SE/cpu/thread_context.hh:44,
                 from build/ALPHA_SE/arch/alpha/utility.hh:40,
                 from build/ALPHA_SE/arch/alpha/pagetable.hh:36,
                 from build/ALPHA_SE/arch/alpha/faults.hh:38,
                 from build/ALPHA_SE/arch/alpha/ev5.cc:32:
build/ALPHA_SE/sim/byteswap.hh: At global scope:
build/ALPHA_SE/sim/byteswap.hh:130: error: explicit template specialization cannot have a storage class
build/ALPHA_SE/sim/byteswap.hh:138: error: explicit template specialization cannot have a storage class
In file included from build/ALPHA_SE/arch/alpha/pagetable.hh:36,
                 from build/ALPHA_SE/arch/alpha/faults.hh:38,
                 from build/ALPHA_SE/arch/alpha/ev5.cc:32:
build/ALPHA_SE/arch/alpha/utility.hh: In function 'bool AlphaISA::isCallerSaveIntegerRegister(unsigned int)':
build/ALPHA_SE/arch/alpha/utility.hh:55: error: suggest parentheses around '&&' within '||'
In file included from build/ALPHA_SE/arch/alpha/faults.hh:38,
                 from build/ALPHA_SE/arch/alpha/ev5.cc:32:
build/ALPHA_SE/arch/alpha/pagetable.hh: In member function 'Addr AlphaISA::VAddr::level2() const':
build/ALPHA_SE/arch/alpha/pagetable.hh:59: error: suggest parentheses around '+' inside '>>'
build/ALPHA_SE/arch/alpha/pagetable.hh: In member function 'Addr AlphaISA::VAddr::level1() const':
build/ALPHA_SE/arch/alpha/pagetable.hh:61: error: suggest parentheses around '+' inside '>>'
In file included from build/ALPHA_SE/arch/alpha/tlb.hh:37,
                 from build/ALPHA_SE/arch/alpha/ev5.cc:36:
build/ALPHA_SE/arch/alpha/ev5.hh: In function 'Addr EV5::DTB_PTE_PPN(uint64_t)':
build/ALPHA_SE/arch/alpha/ev5.hh:84: error: suggest parentheses around '-' inside '<<'
build/ALPHA_SE/arch/alpha/ev5.hh:84: error: suggest parentheses around '-' in operand of '&'
build/ALPHA_SE/arch/alpha/ev5.hh: In function 'Addr EV5::ITB_PTE_PPN(uint64_t)':
build/ALPHA_SE/arch/alpha/ev5.hh:94: error: suggest parentheses around '-' inside '<<'
build/ALPHA_SE/arch/alpha/ev5.hh:94: error: suggest parentheses around '-' in operand of '&'
In file included from build/ALPHA_SE/cpu/simple_thread.hh:68,
                 from build/ALPHA_SE/arch/alpha/ev5.cc:42:
build/ALPHA_SE/mem/page_table.hh: In member function 'void PageTable::invalidateCache(Addr)':
build/ALPHA_SE/mem/page_table.hh:124: error: 'ULONG_MAX' was not declared in this scope
build/ALPHA_SE/sim/host.hh: At global scope:
build/ALPHA_SE/sim/host.hh:61: error: 'MaxTick' defined but not used
build/ALPHA_SE/arch/alpha/isa_traits.hh:164: error: 'AlphaISA::SyscallPseudoReturnReg' defined but not used
scons: *** [build/ALPHA_SE/arch/alpha/ev5.do] Error 1
scons: building terminated because of errors.
make: *** [compile] Error 2


thank you

[Jiayuan Meng]

Hi Hamid,

Thanks for your interests!

FYI, MV5 is based on M5 v2 beta 4, which has kept evolved and is now Gem5, with more comprehensive features. So I suggest you go with Gem5 if possible. MV5 is no longer actively supported.

I think this is a GCC compatibility issue. You are probably using a more recent GCC version. I was using the following back at that time:

GCC: 4.2.4
Python: 2.5.2
scons: 0.96.95

Thanks,

Jiayuan

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[SHRM]

Thank you. I want to change cache parameter like read and write energy/time (not cache access time) ;I found out that cacti is embedded in MV5 but there is no embedded cacti in Gem5. I don't know how to change these parameter in Gem5. Do you know? I would really appreciate for your help.

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[Jiayuan Meng]

Hi SHRM,

I'm actually not sure how Gem5 models energy, but I believe someone has integrated McPAT with Gem5, which models energy. You might be able to google it. FYI, here is a google group for it:

https://groups.google.com/forum/#!topic/sst-simulator/SD3bc955q5w

If you want to go with MV5, that's also fine, but you may need to deal with the GCC compatibility issue first. Let me know.

Hope that's helpful.

Thanks!

Jiayuan