Help with V3s

[Petar Dimitrijevic]

Hi,

I've received a V3s development board few days ago. It has an android FW with Camdroid installed booting from SPI NOR flash.

Picture of the board as well as the fex file are attached to this message.

The SDK generates android image which can be programmed to the NOR flash.

However I'm unable to boot Linux. Currently I'm stuck at making u-boot work. The SDK ships with 2011.09 Allwinner u-boot.

I'm following http://linux-sunxi.org/H3_Manual_build_howto#Building_u-boot and http://linux-sunxi.org/SDK_build_howto.

When I copy the uboot images to the sdcard I get the following output in the serial console:

HELLO! BOOT0 is starting!
get_ifm reg_val=7
===i2c gpio === 22777722 
PMU: axp version ok 
after set, dcdc2 =1100mv
axp20 set dcdc2 success 
DRAM DRIVE INFO: V0.7
DRAM Type = 2 (2:DDR2,3:DDR3,6:LPDDR2,7:LPDDR3)
DRAM CLK = 408 MHz
DRAM zq value: 000039bb
DRAM size = 64 MB
card boot number = 0
card no is 0
sdcard 0 line count 0
[mmc]: mmc driver ver 2014-8-11 15:06:39
[mmc]: ***Try SD card 0***
[mmc]: SD/MMC Card: 4bit, capacity: 3768MB
[mmc]: vendor: Man 0002544d Snr 21ab4a86
[mmc]: product: SA04G
[mmc]: revision: 1.3
[mmc]: ***SD/MMC 0 init OK!!!***
sdcard 0 init ok
ERROR! NOT find the head of uboot.
Jump to Fel.

I presume that u-boot0 can't find u-boot1 header. I've checked the source code and UBOOT_START_SECTOR_IN_SDMMC is 32800 which should correspond to:

# write u-boot
dd if=u-boot.fex of=/dev/sdX bs=1k seek=16400

However it doesn't work.

I've also tried booting with Icenowys mainline u-boot branch https://github.com/Icenowy/u-boot-1/tree/v3s.

I've modified the LichePieZero DTS file to correspond to the board pinout. 

However I get no message on the console whatsoever. Tried booting both from USB and SDcard.

Digging through the commit messages for v3s mainline u-boot support I've noticed that SPL is disabled. Maybe that is the problem ?

Does anyone have any idea on how to proceed ? I'd like to get this board up and running with mainline kernel so that I could port some stuff over from lichee.

Any help is appreciated.

Best,

Petar

[Icenowy Zheng]

For my own branch the SPL is enabled.

>
> Does anyone have any idea on how to proceed ? I'd like to get this board up and running with mainline kernel so that I could port some stuff over from lichee.
>
> Any help is appreciated.
>
> Best,
> Petar
>

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[Icenowy Zheng]

21.03.2017, 23:07, "Petar Dimitrijevic" <petar.dim...@gmail.com>:

According to the FEX file, your board uses different debugging UART than Lichee Pi Zero.

(Lichee Pi Zero uses UART0 @ PB, but your board uses UART2 @ PB)

Maybe you should try to alter UART-initialization-related code.

>
> Digging through the commit messages for v3s mainline u-boot support I've noticed that SPL is disabled. Maybe that is the problem ?
>
> Does anyone have any idea on how to proceed ? I'd like to get this board up and running with mainline kernel so that I could port some stuff over from lichee.
>
> Any help is appreciated.
>
> Best,
> Petar
>

[Benjamin Henrion]

On Tue, Mar 21, 2017 at 4:06 PM, Petar Dimitrijevic
<petar.dim...@gmail.com> wrote:
> Hi,
>
> I've received a V3s development board few days ago. It has an android FW
> with Camdroid installed booting from SPI NOR flash.
> Picture of the board as well as the fex file are attached to this message.

Where have you bought it?

> The SDK generates android image which can be programmed to the NOR flash.

I just made a mirror of V3S SDK here:

http://filez.zoobab.com/allwinner/v3s/

Good luck,

--
Benjamin Henrion <bhenrion at ffii.org>
FFII Brussels - +32-484-566109 - +32-2-3500762
"In July 2005, after several failed attempts to legalise software
patents in Europe, the patent establishment changed its strategy.
Instead of explicitly seeking to sanction the patentability of
software, they are now seeking to create a central European patent
court, which would establish and enforce patentability rules in their
favor, without any possibility of correction by competing courts or
democratically elected legislators."

[Petar Dimitrijevic]

Thanks for the heads up. I'll probably end up attaching JTAG to the board so that I can debug the boot loader.

I really don't want to mess with lichee uboot. Mainline uboot is the way to go.

[Petar Dimitrijevic]

Colleague of mine got it from distributor of electric components from China directly. He was ordering some processors and power supplies and the sent this board as well as A83T development board in the package as well.

I can ask for company details if they do any good to you.

I'm downloading the SDK you've posted and I will compare it with the one I have. Thanks.

[Petar Dimitrijevic]

I finally managed to boot mainline u-boot at least initially. More precisely I was able to see u-boot output. It was booting previously as well. 

Beside changing the DTS file with UART2 additional change in include/configs/sunxi-common.h  is required.

diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index 6bcb9e692c..cc329daf8d 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -261,7 +261,7 @@ extern int soft_i2c_gpio_scl;
 #endif
 
 #ifndef CONFIG_CONS_INDEX
-#define CONFIG_CONS_INDEX              1       /* UART0 */
+#define CONFIG_CONS_INDEX              3       /* UART2 */
 #endif

After this change I get the following console output:

U-Boot SPL 2017.01-rc2-01115-g252ef38050-dirty (Mar 22 2017 - 16:58:12)
DRAM: 64 MiB
Trying to boot from MMC1

I tried setting up primary boot partition. However nothing works so far.

Just to be clear I'm booting from MMC0.

However the card removal is detected:

Trying to boot from MMC1Card did not respond to voltage select!
spl: mmc init failed with error: -95
SPL: failed to boot from all boot devices
### ERROR ### Please RESET the board ###

So I guess I'm missing something. My head is not really clear atm.

 I'v also tried booting from USB for easier development.

sudo ../sunxi-tools/sunxi-fel -v -p uboot  u-boot-sunxi-with-spl.bin write 0x41000000

Stack pointers: sp_irq=0x00002000, sp=0x00005E08
MMU is not enabled by BROM
Generating the new MMU translation table at 0x00008000
=> Executing the SPL... done.
Setting write-combine mapping for DRAM.
Setting cached mapping for BROM.
Writing back the MMU translation table.
Enabling I-cache, MMU and branch prediction... done.
Writing image "U-Boot 2017.01-rc2-01115-g252ef3", 338273 bytes @ 0x42E00000.
Invalid command write

 

However as it is seen on the output above it fails. Console output says:

U-Boot SPL 2017.01-rc2-01115-g252ef38050-dirty (Mar 22 2017 - 16:58:12)
DRAM: 64 MiB
Trying to boot from FEL

 

And its stuck.

[Icenowy Zheng]

23.03.2017, 00:21, "Petar Dimitrijevic" <petar.dim...@gmail.com>:

The SPL just speaks mmc0 as MMC1 and mmc2 as MMC2.

>
> However the card removal is detected:
>
>> Trying to boot from MMC1Card did not respond to voltage select!
>> spl: mmc init failed with error: -95
>> SPL: failed to boot from all boot devices
>> ### ERROR ### Please RESET the board ###
>
> So I guess I'm missing something. My head is not really clear atm.
>
>  I'v also tried booting from USB for easier development.
>
>> sudo ../sunxi-tools/sunxi-fel -v -p uboot  u-boot-sunxi-with-spl.bin write 0x41000000
>> Stack pointers: sp_irq=0x00002000, sp=0x00005E08
>> MMU is not enabled by BROM
>> Generating the new MMU translation table at 0x00008000
>> => Executing the SPL... done.
>> Setting write-combine mapping for DRAM.
>> Setting cached mapping for BROM.
>> Writing back the MMU translation table.
>> Enabling I-cache, MMU and branch prediction... done.
>> Writing image "U-Boot 2017.01-rc2-01115-g252ef3", 338273 bytes @ 0x42E00000.
>> Invalid command write
>
> However as it is seen on the output above it fails. Console output says:
>
>> U-Boot SPL 2017.01-rc2-01115-g252ef38050-dirty (Mar 22 2017 - 16:58:12)
>> DRAM: 64 MiB
>> Trying to boot from FEL
>
> And its stuck.
>

[Icenowy Zheng]

P.S. If you like, you can go IRC freenode #linux-sunxi to ask me questions.

My IRC nick is MoeIcenowy.

23.03.2017, 00:21, "Petar Dimitrijevic" <petar.dim...@gmail.com>:

[Petar Dimitrijevic]

Thank you very much for IRC contact. I will definitely contact you there.

One more question. I've turned on debugging in uboot. And here is what I get:

U-Boot SPL 2017.01-rc2-01115-g252ef38050-dirty (Mar 23 2017 - 17:50:16)
DRAM: 64 MiB
>>spl:board_init_r()

Trying to boot from MMC1

init mmc 0 resource
init mmc 0 clock and io
mmc 0 set mod-clk req 24000000 parent 24000000 n 1 m 1 rate 24000000
malloc_simple: size=x, ptr=x, limit=x: x
set ios: bus_width: 1, clock: 0
set ios: bus_width: 1, clock: 400000
mmc 0 set mod-clk req 400000 parent 24000000 n 4 m 15 rate 400000
mmc 0, cmd 0(0x80008000), arg 0x00000000
mmc resp 0x00000000
mmc 0, cmd 8(0x80000148), arg 0x000001aa
mmc resp 0x000001aa
mmc 0, cmd 55(0x80000177), arg 0x00000000
mmc resp 0x00000120
mmc 0, cmd 41(0x80000069), arg 0x40300000
mmc resp 0x00ff8000
mmc 0, cmd 55(0x80000177), arg 0x00000000
mmc resp 0x00000120
mmc 0, cmd 41(0x80000069), arg 0x40300000
mmc resp 0xc0ff8000
mmc 0, cmd 2(0x800001c2), arg 0x00000000
mmc resp 0xe700f289 0x10102230 0x30303030 0x1b534d30
mmc 0, cmd 3(0x80000143), arg 0x00000000
mmc resp 0x59b40520
mmc 0, cmd 9(0x800001c9), arg 0x59b40000
mmc resp 0x0a400041 0x3bcd7f80 0x5b590000 0x400e0032
mmc 0, cmd 13(0x8000014d), arg 0x59b40000
mmc resp 0x00000700
mmc 0, cmd 7(0x80000147), arg 0x59b40000
mmc resp 0x00000700
mmc 0, cmd 55(0x80000177), arg 0x59b40000
mmc resp 0x00000920
mmc 0, cmd 51(0x80002373), arg 0x00000000
trans data 8 bytes
cacl timeout 78 msec
mmc resp 0x00000920
mmc 0, cmd 6(0x80002346), arg 0x00fffff1
trans data 64 bytes
cacl timeout 78 msec
mmc resp 0x00000900
mmc 0, cmd 6(0x80002346), arg 0x80fffff1
trans data 64 bytes
cacl timeout 78 msec
mmc resp 0x00000900
mmc 0, cmd 55(0x80000177), arg 0x59b40000
mmc resp 0x00000920
mmc 0, cmd 6(0x80000146), arg 0x00000002
mmc resp 0x00000920
set ios: bus_width: 4, clock: 400000
mmc 0 set mod-clk req 400000 parent 24000000 n 4 m 15 rate 400000
mmc 0, cmd 55(0x80000177), arg 0x59b40000
mmc resp 0x00000920
mmc 0, cmd 13(0x8000234d), arg 0x00000000
trans data 64 bytes
cacl timeout 78 msec
mmc resp 0x00000920
set ios: bus_width: 4, clock: 50000000
mmc 0 set mod-clk req 50000000 parent 600000000 n 1 m 12 rate 50000000
mmc_init: 0, time u
spl: mmc boot mode: raw
mmc 0, cmd 16(0x80000150), arg 0x00000200
mmc resp 0x00000900
mmc 0, cmd 17(0x80002351), arg 0x00000020
trans data 512 bytes
cacl timeout 78 msec
mmc resp 0x00000900
hdr read sector x, count=u
mkimage signature not found - ih_magic = 22019204
mmc 0, cmd 16(0x80000150), arg 0x00000200
mmc resp 0x00000900
mmc 0, cmd 18(0x80003352), arg 0x00000020
trans data 786432 bytes
cacl timeout 78 msec
mmc resp 0x00000900
mmc cmd 12 check rsp busy
read 600 sectors to 42e00000
Jumping to U-Boot
SPL malloc() used lx bytes (d KB)
loaded - jumping to U-Boot...image entry point: 0x

And this just keeps looping. From what I can figure out 2nd stage uboot fails to start.

There is config option in SPL section that says MMC raw mode: by sector. It is checked by default and 0x50 is entered.

I've tried deselecting it but it doesn't work either.

Any ideas on what I may be missing ? Or any special uboot config that u're using ?

[jons...@gmail.com]

Missing a correct image header signature?

--
Jon Smirl
jons...@gmail.com

[Petar Dimitrijevic]

Yes and then it restarts SPL. However I can't yet figure out why it is happening.

u-boot-sunxi-with-spl.bin builds just fine. Can't understand why it fails to load.

Clear the head first and then back to debugging I guess :)

[jons...@gmail.com]

If the image does not have the correct header, the ROM restarts the
boot process and trys again to find an image with the correct header.

[Petar Dimitrijevic]

Just to close up this thread for completeness sake.

Icenowy suggested that I try booting with console on UART0 instead of UART2.

And that worked. I currently have working uboot started from sdcard.

Many thanks for that.

[Nick Gart]

Petar,

could you pass along the information of the company which had the V3S devkit? I'm trying to source a devkit for it and it is seeming very difficult, the only other one(lichee pi) seems to now be defunct.

Thank you!

[Petar Dimitrijevic]

I didn't do the purchase myself. I'll ask my colleagues where they did get it from and I'll let you know.

Yeah, my experience with lichee pi also was bad. I paid for the most expensive package of licheepi but I haven't received anything yet. It should've been shipped in June.
It seems that this is the case with a lot of people since there are a lot complaints of the same nature on the official forum.

[jons...@gmail.com]

Easy way to get V3 hardware is by buying a 4K action cam similar to this one:
https://www.amazon.com/TEC-BEAN-Waterproof-Wide-Angle-Rechargeable-Accessories/dp/B01N7JS6IA/ref=sr_1_1

When you attach USB Android adb will work.

$24 from China
https://www.aliexpress.com/item/Glavey-WiFi-remote-4K-Ultra-HD-1080P-H9-Action-camera-Sport-camera-2-0-LCD-20m/32839995199.html

They have a V3 inside plus external DRAM. V3S has the DRAM die inside the chip.

[Siarhei Volkau]

Hello Petar,


Can you point me where i can order same V3s based board?


BR,
Siarhei

[N G]

Okay some searching on Taobao and I've turned up this board which looks very similar to Petar's:

https://item.taobao.com/item.htm?spm=a211ha.10565794.0.0.5f17d0d8X9toiS&id=546051765308

Jon, thanks, that is a good work around.

Final question:

Does the same kernel for the V3S work for the V3?

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