Fully open source SoC

[Maurício Carvalho]

Hi everyone,

I would like to develop a full open source RISCV-based System-On-Chip making use of free VLSI tools and PDKs (possibly making everything freely available). I have been playing with electric vlsi for some years but I never did anything serious with it besides playing with small designs and doing simple tests. On industry standard tools, however, I have been doing a couple of serious professional works and I have a reasonable understanding of the digital and analog flow.

I have a few questions regarding electric and my goal:

1) I'd like to know if electric could work well with distributed computing for physical synthesis and other computing intense work. For example, If I have a powerful workstation including several CPUs and such, would it correctly make use of the system's resources?

2) I have found some open source PDKs, but I could never find an answer whether they can produce a reliable layout and the relative foundry where it can be actually manufactured. I presume someone has already manufactured a design, possibly with MOSIS PDKs, using Electric? Any other suggestions are welcome. I have found a .18 library, but I would like to use sub-micron technologies 90nm, 65nm and 45nm. I guess listing as many open source PDKs related to a specific Foundry as I can would also help.

3) What about automated DFT in electric? Sure we can manually add some blocks at the RTL, but scan chains can be quite difficult to implement without useful information from the synthesized circuit. What about ATPGs? Are there any possibility to integrate these tools on electric? Or, are there any open source Test Tools? I've asked for the Lifting fault simulation tool but never got an answer back from the developers. 

4) Is there an SDC equivalent for Electric during logic and physical synthesis? 

5) Does anyone know where I can find an open source memory cell? Or a very cheap one which would include models for logic and electrical simulations?

I'm sure there are many other questions I'd like to add to this post, but it is best to keep it short for now.

Hope someone can help!

Regards,
Mauricio De Carvalho
 

[Luís Vitório Cargnini]

Hi Mauricio,

Regarding OpenPDKs, what you have are synthetic PDKs, they cannot be fabricated. If you take FreePDK45 and Nangate OpenCell 45nm, or FreePDK15 and OpenCell16 (FinFet) you have your openPDKS, you can publish, discuss widely open, but you cannot fabricate. SIAM32 from Synopsys also add on top of that (28nm) the memory banks. 

You can download the Synopsys on University connection, OpenCell 16nm is a 1k fee one-time for universities, 45nm is open to download at Si2.

Regarding memory, in general, you would get the memory compiler from the foundry for the specific process or design your own, e.g., Qualcomm has an entire division designing SRAM banks.

1) No, you have to modify and add this capability in the tool;

2) MOSIS had an internal lambda system where you would design in 'MOSIS' process and they would translate to partner foundries at the time, nowadays you get the process of the specific foundry trough MOSIS after signing the NDAs. You may still be able to use the Lambda system embedded on ElectricVLSI, however, I believe 200nm is the limit, below that is foundry and process specific;

3)No idea, I believe you would need a 3rd party to load your electric made design insert the ATPG and then reload it within Electric, or you can create a tool and embed it on Electric (why not);

4)I'm not sure

5)There is none as far as I know, you have to design your own or use the one supplied by the foundry (lib,lef,gdsII)

Regards,

Vitorio.

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[Maurício Carvalho]

Hi Luis,

Thanks for the prompt response!

Since my goal is to prepare/gather a number of open source hardware, tools, scripts and PDKs to elaborate a design that can be manufactured, I wouldn't want to tie this project to any of the big companies (Cadence, Synopsys ... Nangate) unless they are willing to help open source design for actual real projects. The idea is to totally remove NDA contracts, but I'm sure this is not a reality for now, therefore I will try to minimize the number of NDA's.
In addition, I'd also like to point out that this project is not related to any university or program, therefore I cannot benefit from any tools and PDKs. However, it might be beneficial to University students (undergrads to researchers) as well as independent designers.

As a response to your answers:

1) , 3) and 4) Does the Electric developers plan on embedding distributed processing, SDCs and DFT? If not, have they thought about it? How can they help one to modify/implement them? (I have, in the past, built some ad-hoc scripts running bash and awk to implement distributed processing as well as implementing scan-chains. Still a work in progress)
2) 200nm is a good technology to start off with.
5) I thought this would be a bit of an issue.

Adding another question
6) I really like command prompts where I can run scripts with almost no effort. Electric has some reasonable options for running scripts, but it doesn't have a command prompt (at least in the version I have) that I can quickly copy and paste or add specific commands similarly to the commercial tools without moving the mouse too much.

Regards,
Mauricio De Carvalho

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[Steven Rubin]

> 1) , 3) and 4) Do the Electric developers plan on embedding

> distributed processing, SDCs and DFT? If not, have they thought about
> it? How can they help one to modify/implement them?

None of the things you listed are planned for Electric. But any of them
can be done, by you or other interested developers. As always, I am
available for guidance and question answering.

> Adding another question
> 6) I really like command prompts where I can run scripts with almost
> no effort. Electric has some reasonable options for running scripts,
> but it doesn't have a command prompt (at least in the version I have)
> that I can quickly copy and paste or add specific commands similarly
> to the commercial tools without moving the mouse too much.

You *can* script Electric but it's not easy. You have to use the Java or
Python interface, which gives you complete access to the entire code
base. With that much power, you can create circuitry, run tools, write
files, and feed arbitrary commands to Electric, all from a script
written in either Java or Python. The user's manual explains these
interfaces, but you'll have to study the code to know the methods to
call for each of the commands you want to script. Also note that the
Java interface comes built-into Electric, but Python needs to be added
separately).

-Steven Rubin

[Luís Vitório Cargnini]

Hi Mauricio,

I had made some attempts in the past to embed the OpenCell 45 nm, still doesn't work well. Since it is an open-source project, I got your idea. So, Electric it is a great tool already, it can become better I agree. So, the best would increase the screens capability and the capability of the tool to assimilate all the parameters from FreePDK 45 and 16. They are open still as 'process', so anyone still can use the tool, however, cannot fabricate, they are highly detailed, as well as any foundry PDK, so they are a great start (Not talking about the OpenCell libraries, that are built on top of the FreePDKs).

So, my $0.02, the idea have icarus verilog, but l would be incorporate icarus verilog parsing and exchange so you have to  have it installed, but you c run and simulate from inside Electric. Also, there are other tools like Yosis (http://www.clifford.at/yosys/) also look into http://opencircuitdesign.com/, because there are some tools that can be incorporated. 

Since you mentioned Scripts, most probably the ideal would be integrated into  Electric like  the same way it have an add-on the Bean Shell, but find and create support for TCL, since every EDA tool, and mostly everyone uses TCL, so you can create a TCL shell (the classes for TCL in Java most probably already exist, somewhere)

That is what I can contribute to you right now.

Regards,

Vitorio.

[Justin Spencer]

Dear Mr. Carvalho,

Good day. I would also like to help with this endeavor in any way possible.

Please contact me if you're interested in collaborating.

Thank you.

Regards,

Justin

[Travis Ayres]

The NDAs for the foundaries will stop you cold as soon as you go below about 180nm.

An option would be to use laser direct writing and expose and dope the wafers yourself. You could theoretically do this in a clean room you setup in a garage, but you'd still probably need 40k of equipment and material, at the very low end. Disposal of toxic chemicals in an appropriate way is another hurdle. All of this, and you might be able to get an ancient process out the door. But it would be fun...

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[Patryk S]

https://opencores.org

https://en.wikipedia.org/wiki/OpenCores

[Maurício Carvalho]

Thank you Travis and Patryk!

I have a few remarks though:

1) The idea is to set up open source hardware and tools for ASIC design (Digital and Analog) to reduce as many NDAs as I can. The idea behind this to make ASIC design freely available to whoever wants to develop their own design. Last year I was an ASIC design instructor linked to an University in the south of Brazil. I taught DFT and test to engineers, but focusing on "piloting" EDA tools and the ASIC design flow. I was also involved in some designs linked to research. The course is fabulous and it teaches ASIC design thoroughly that one would not learn in regular university courses unless they have worked in the industry on a real design. However, before attending this 2-year hands-on specialized course, our students needed to sign EDA/CAD NDA contracts committing to not use it on any commercial activity, as well as to keep every material and scripts they produced secret to themselves or to whoever is involved. In addition, you'd often see many students with entrepreneur skills keen on developing their own ASIC projects (after studying viability to market and design feasibility) but they'd need to pay EDA licenses which are very costly. On the fabrication part, there are several multiuser projects out there that they can use, specially if this open source platform is finely tuned for a target Foundry.

2) I have designed a few CPU cores for academic research as well as worked on a few commercial CPU cores. I have also used the openrisc1200 and I admire it, but I would really like to develop my own CPU with a free ISA based on the RISCV. (This part is personal). However, any case study CPU would be fine, in order to set up the open source ASIC platform (kind of like Fedora had once, namely FEL) but I would also add free to use scripts, IDEs and everything needed so that one can actually produce a professional sign-off and send it to the target Foundry.

3) I have no intention to manufacture it in a garage, but could be a future challenge, probably with the help of others (if that's even possible).

Please feel free to add as many problems I may find and probable solutions!

Kind regards,

Mauricio De Carvalho  

https://opencores.org

https://en.wikipedia.org/wiki/OpenCores

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[Travis Ayres]

Minimal NDA probably exists already - RISCV code, that's as close as you could get without starting to sign NDAs, unless you target an ancient process, even then it won't necessarily be prodicible.

I think getting a handful of people together and targeting an ancient node would be fun, but I'd aim for something even simpler than RISCV.

[Leandro Marsó]

Hello Mauricio!
I've seen a webinar[1] where they show how is implemented a picorv[2] plus other peripherals to get a SoC in 180nm using the efabless.com website. There you use electric for schematic capture, ngspice for the analog and mixed signal and qflow for rhe digital. You can login in that site and get all tools already configured with the PDKs and import some analog IP blocks from an available library.
Regards,
Leandro

[1]:https://m.youtube.com/watch?v=TrTp572FgFo

[2]: https://github.com/cliffordwolf/picorv32

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