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SKiAt
Apr 30, 2013, 12:41:54 PM4/30/13
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Hi all
today I received my first Black one revision A5A.
With my old Beaglebone A6A I was using 2 uart, so the first things I checked out were the serial ports, and:
- I didn't find the /dev/ttyOx nodes
- I saw that there is no mode the pin muxing avaliable from /sys/kernel/debug/omap_mux/...
I have read about the auto muxing based on capes eeprom configuration and stuff like this is it the only way? And if I don't need the display how can I disable the hdmi drivers?
Thanks
Luca
Tim Clark
May 1, 2013, 9:34:57 AM5/1/13
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Same issue here - if anybody has a solution please let us know.
Thanks
Tim
On Wednesday, May 1, 2013 8:57:50 AM UTC-4, sop...@net-support.net wrote:
Thanks
Tim
On Wednesday, May 1, 2013 8:57:50 AM UTC-4, sop...@net-support.net wrote:
Hello Luca
Have you found how to access the UARTS on BB Black?
THanks
Pedro
El martes, 30 de abril de 2013 11:41:54 UTC-5, SKiAt escribióow to
SKiAt
May 3, 2013, 10:25:12 AM5/3/13
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Hi all,
following these two guides I finally managed to enable the serial ports!
http://hipstercircuits.com/adding-beaglebone-cape-support-to-a-kernel-with-device-tree-in-ubuntu/The thing is to create a virtual-cape like the one used for the internal emmc or hdmi. Put some overlay configuration for pinmux config, like this:
fragment@0 {
target = <&am33xx_pinmux>;
__overlay__ {
/* pinmux for uart1 */
bone_myuartXX_pins: pinmux_bone_myuartXX_pins {
/* the uart pin config register offset from the base 0x44e10800 / the mux value */
pinctrl-single,pins = <
0x184 0x00 /* 24 UART1_TXD uart1_txd OUTPUT */
0x180 0x20 /* 26 UART1_RXD uart1_rxd INPUT */
>;
};
};
};
and some other to change the device node status from the default "disabled" to "okay" and assign the pinctrl:
fragment@1 {
target = <&uart2>;
__overlay__ {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&bone_myuartXX_pins>;
};
};
Since we don't have a real cape with an eeprom saying hei i am connected so mux that we must also change uEnv.txt like mentioned in this comment: http://hipstercircuits.com/enable-pwm-on-beaglebone-with-device-tree-overlays/#comment-516
However a huge amount of work compared to the old-style pin muxing at runtime available on 3.2 kernel of the original beaglebone.
If someone will find how to manage runtime pinmuxing i will glad to listen to the solution ;)
bye
Luca
Tim Clark
May 3, 2013, 10:58:54 AM5/3/13
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Hi Luca,
I tried the first method and kept getting errors with dtc.
That sounds great.
Did you only compile the new dts file and move to dto file to appropriate location, or did you move dts to /KERNEL/firmware/capes and rebuild the kernel ?
I tried the first method and kept getting errors with dtc.
SKiAt
May 3, 2013, 11:04:46 AM5/3/13
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Hi
I rebuilt the kernel with tools/rebuild.sh and copied everything: zImage and ddbs to fat partition, modules and firmwares to the rootfs. but in the next rebuilds i just copied zImage and the am335x-boneblack.dtb the the fat part.
have fun..
Tim Clark
May 3, 2013, 1:03:24 PM5/3/13
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Luca
I think I'm getting close - when you finally got it to work - where did the device finally show up? in /dev where /dev/ttyO1 used to be located ?
Luca Marchesi
May 6, 2013, 3:22:21 AM5/6/13
to beagl...@googlegroups.com, Tim Clark, sop...@net-support.net
Hi Tim,
yes it is! You will see it in the boot log like this:
...
[ 1.830121] bone-capemgr bone_capemgr.9: slot #7: #3 overlays
[ 1.837655] 48022000.serial: ttyO1 at MMIO 0x48022000 (irq = 89) is a OMAP UART1
...
I don't know which kind of logic is used to accept or not the pinmux overlay names, but in some cases it could say that it is not able to apply the muxing..
bye
yes it is! You will see it in the boot log like this:
...
[ 1.830121] bone-capemgr bone_capemgr.9: slot #7: #3 overlays
[ 1.837655] 48022000.serial: ttyO1 at MMIO 0x48022000 (irq = 89) is a OMAP UART1
...
I don't know which kind of logic is used to accept or not the pinmux overlay names, but in some cases it could say that it is not able to apply the muxing..
bye
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SKiAt
May 6, 2013, 11:37:16 AM5/6/13
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this seems to be a good way to proceed, but I didn't tried..
KurtE
May 6, 2013, 2:41:35 PM5/6/13
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I just tried out this approach, especially the quick approach where you simply need to grab a few things from them and I think it worked! Thanks for the link.
Next question might be if I want a 2nd TTL UART, which one should I use? Looks like most of the others are on either on the HDMI stuff or the boot stuff... For the most part I won't be using the HDMI.
Suggestions?
Kurt
Next question might be if I want a 2nd TTL UART, which one should I use? Looks like most of the others are on either on the HDMI stuff or the boot stuff... For the most part I won't be using the HDMI.
Suggestions?
Kurt
Tim Clark
May 6, 2013, 6:03:42 PM5/6/13
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If you don't need hardware handshaking, just RX and TX, then UART2 and UART4 should be available. UART5 with same is available, but not advised unless you can gate RX during boot since RX is used as one of the boot mode signals.
Tim Clark
May 6, 2013, 6:06:12 PM5/6/13
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Keep in mind too - you keep saying TTL UART - these are all 3.3 V signals. You will need a level shifter of some sort before you connect these to anything > 3.3 VDC.
KurtE
May 6, 2013, 6:35:43 PM5/6/13
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Thanks,
The two devices I was thinking of connecting up are:
XBee which is 3.3v
And potentially a Roboclaw (Motor controller), which as I understand it from the people who make them (Basic Micro/Orion Robotics), they are also 3.3v devices which are 5v tolerant
However I may also play on the safe side and use one of the Sparkfun Level Converters, I have, and plug it into the prototype Cape (breadboard.), May try USART2... Will need to figure out the addresses. and the like. Also not sure but my guess is that I should do this as separate overlay as to make them both independent to install.
Kurt
The two devices I was thinking of connecting up are:
XBee which is 3.3v
And potentially a Roboclaw (Motor controller), which as I understand it from the people who make them (Basic Micro/Orion Robotics), they are also 3.3v devices which are 5v tolerant
However I may also play on the safe side and use one of the Sparkfun Level Converters, I have, and plug it into the prototype Cape (breadboard.), May try USART2... Will need to figure out the addresses. and the like. Also not sure but my guess is that I should do this as separate overlay as to make them both independent to install.
Kurt
Philip Polstra
May 6, 2013, 6:38:12 PM5/6/13
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Would you be interested in an Xbee cape? I'm considering making these to make life simpler for people running my stuff,
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KurtE
May 6, 2013, 11:16:39 PM5/6/13
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Not sure about my plans yet. May have some fun and maybe design and build my own cape, that has on it what I want...
Note: I mentioned the newer instructions work. They do to a point, but so far I have to do the echo... >$SLOTS on each boot.
I remember a note on this, about needing to edit the /boot/uEnv.txt file... Need to experiment some more to figure out what needs to go in this file.
Kurt
Nick Garner
May 7, 2013, 2:30:46 PM5/7/13
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I forgot to mention that in the post. The echo > $SLOTS is not persistent across reboots. A quick fix would be to put that command into an init script that gets executed at boot. I think the proper thing to do would be to do the pin mux setting in the am335x-boneblack.dtb file so it happens at boot. I haven't tried that part out yet. It should be possible to put the pin settings in the am33xx_pinmux section in am335x-bone-common.dtsi.
Nick
Nick
Kurt
--
Michael Vernier
May 7, 2013, 5:30:03 PM5/7/13
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The link SKiAt provided to http://blog.pignology.net/2013/05/getting-uart2-devttyo1-working-on.html worked really well. After some messing around with it, I was able to enable the UARTs without needing to recompile am335x-boneblack.dtb. The second fragment in the uart2pinmux.dts file from Pignology can be changed to overlay the <&uart2> object instead of creating the test_helper. This is how SKiAt mentioned the changes above:
If you do this, the slots won't unload, but this shouldn't be a concern for most people. If for some reason you need to unload and reload the UART slots, stick with the test_helper method described by Pignology; however, you'll need to remove the ":helper" in the second fragment. With this left in, only the first UART added to the slots will be active.
Like Nick mentioned, the echo > $SLOTS commands are not persistent. Compiling the pinmux commands into the am335x-boneblack.dtb will make them persist after boot.
fragment@1 {
target = <&uart2>;
__overlay__ {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart2pinmux>;
};
};
Also, to save some people time digging through thousands of pages of datasheets, here are the pin offset and mux values for the other UARTs:
uart3:serial@48024000 (/dev/ttyO2)
TX: 0x154 0x01
RX: 0x150 0x21
uart4:serial@481a6000 (/dev/ttyO3)
TX: 0x164 0x01
RX: N/A (not broken out to P8 or P9)
uart5:serial@281a8000 (/dev/ttyO4)
TX: 0x074 0x06
RX: 0x070 0x26
uart6:serial@481aa000 (/dev/ttyO5)
TX: 0x0C0 0x04
RX: 0x0C4 0x24
Note: these pins are used by the HDMI on the BBB. dmesg will show errors that the pins are in use, but the module will still be placed into a slot. I don't use the HDMI so I tried to remove the slot (echo -5 > $SLOTS), but the BBB didn't like that (ssh session closed and had to power cycle to reconnect).
-Michael
KurtE
May 7, 2013, 7:17:00 PM5/7/13
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Thanks, that looks really good.
I will update mine to match as well.
Kurt
I will update mine to match as well.
Kurt
Nick Garner
May 8, 2013, 6:47:04 PM5/8/13
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Thank you for gathering that information, Michael.
There's a section in am335x-bone-common.dtsi that sets up the HDMI; it's in the bone_capemgr section. They're forcing it to load some firmware since it's soldered on. On a side note, it appears this is the way (cape-override) to load custom cape firmware that doesn't have an EEPROM for cape identification, like the Geiger Cape.
slot@101 {
ti,cape-override;
priority = <1>;
compatible = "ti,beaglebone-black";
board-name = "Bone-Black-HDMI";
version = "00A0";
manufacturer = "Texas Instruments";
part-number = "BB-BONELT-HDMI";
};
This can be commented out to keep the HDMI pins from being claimed and UART6 pins can be set to the correct mode without error.
I've managed to get all UARTs (except UART4/ttyO3) enabled and pin mux modes set correctly from within am335x-bone-common.dtsi. Going this route will set pin mux modes correctly upon boot. This also disables HDMI to get UART6 to work so use with caution if you're using HDMI.
The updated files to build /boot/am335x-boneblack.dtb are here:
If you need HDMI, uncomment the slot@101 section and set uart6 to status = "disabled";.
Nick
Kurt
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ky...@cranehome.info
May 9, 2013, 4:05:52 PM5/9/13
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Sigh......
Tried to follow this and compile a dtb to give me access to the uarts but the dtc command throws an error over the '-@' option and so I can't follow any of the examples out there nor can I find any indication of what '-@' means. I'm using Arch and puled the dtc package from their repository. If i omit '-@' then it produces the .dtb file but it's several K smaller than the exiting one and I have not the foggiest idea what I am omitting in doing that.
Nick,
Thanks for the examples. I'm hoping to enjoy this more once I'm past stubbing my toes in the dark everywhere.
ky...@cranehome.info
May 9, 2013, 8:27:05 PM5/9/13
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Well, whatever '-@' is it doesn't appear to be all that important!
Dec 31 18:18:22 robo-2 kernel: [ 0.490195] 44e09000.serial: ttyO0 at MMIO 0x44e09000 (irq = 88) is a OMAP UART0
Dec 31 18:18:22 robo-2 kernel: [ 0.502437] console [ttyO0] enabled
Dec 31 18:18:22 robo-2 kernel: [ 0.503495] 48022000.serial: ttyO1 at MMIO 0x48022000 (irq = 89) is a OMAP UART1
Dec 31 18:18:22 robo-2 kernel: [ 0.504471] 48024000.serial: ttyO2 at MMIO 0x48024000 (irq = 90) is a OMAP UART2
Dec 31 18:18:22 robo-2 kernel: [ 0.505482] 481a8000.serial: ttyO4 at MMIO 0x481a8000 (irq = 61) is a OMAP UART4
Dec 31 18:18:22 robo-2 kernel: [ 0.506424] 481aa000.serial: ttyO5 at MMIO 0x481aa000 (irq = 62) is a OMAP UART5
:)
Justin Smith
May 9, 2013, 9:00:14 PM5/9/13
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I'm having the same issue with the "-@"
Also, the uart2pinmux.dts fails to compile with the "/plugin/;" on line 9.
Justin Smith
May 9, 2013, 10:25:35 PM5/9/13
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I guess this patch: https://patchwork.kernel.org/patch/1934471/
has not made it to the dtc trunk (at least the one I have). I applied the patch and got the dtbo file.
Here's to bleeding edge.
ky...@cranehome.info
May 12, 2013, 12:44:59 AM5/12/13
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I spoke too soon. Something is not right with the version that enables all the TTY's. I am making a spreadsheet to link all the various numbers involved in access I/O and I noticed some MUX modes didn't seem right. Appears that I lost more than just the HDMI interface.
While the all uarts version produces this:
Are those that compiled this with the -@ working seeing the same thing?
Unmodified am335x-bone-common.dtsi: shows this when I look at pinmux-pins.....
pin 0 (44e10800): mmc.5 (GPIO UNCLAIMED) function pinmux_emmc2_pins group pinmux_emmc2_pinspin 1 (44e10804): mmc.5 (GPIO UNCLAIMED) function pinmux_emmc2_pins group pinmux_emmc2_pinspin 2 (44e10808): mmc.5 (GPIO UNCLAIMED) function pinmux_emmc2_pins group pinmux_emmc2_pinspin 3 (44e1080c): mmc.5 (GPIO UNCLAIMED) function pinmux_emmc2_pins group pinmux_emmc2_pinspin 4 (44e10810): mmc.5 (GPIO UNCLAIMED) function pinmux_emmc2_pins group pinmux_emmc2_pinspin 5 (44e10814): mmc.5 (GPIO UNCLAIMED) function pinmux_emmc2_pins group pinmux_emmc2_pinspin 6 (44e10818): mmc.5 (GPIO UNCLAIMED) function pinmux_emmc2_pins group pinmux_emmc2_pinspin 7 (44e1081c): mmc.5 (GPIO UNCLAIMED) function pinmux_emmc2_pins group pinmux_emmc2_pinspin 20 (44e10850): rstctl.3 (GPIO UNCLAIMED) function pinmux_rstctl_pins group pinmux_rstctl_pinspin 32 (44e10880): mmc.5 (GPIO UNCLAIMED) function pinmux_emmc2_pins group pinmux_emmc2_pinspin 33 (44e10884): mmc.5 (GPIO UNCLAIMED) function pinmux_emmc2_pins group pinmux_emmc2_pinspin 40 (44e108a0): hdmi.13 (GPIO UNCLAIMED) function nxp_hdmi_bonelt_pins group nxp_hdmi_bonelt_pinspin 41 (44e108a4): hdmi.13 (GPIO UNCLAIMED) function nxp_hdmi_bonelt_pins group nxp_hdmi_bonelt_pinspin 42 (44e108a8): hdmi.13 (GPIO UNCLAIMED) function nxp_hdmi_bonelt_pins group nxp_hdmi_bonelt_pinspin 43 (44e108ac): hdmi.13 (GPIO UNCLAIMED) function nxp_hdmi_bonelt_pins group nxp_hdmi_bonelt_pinspin 44 (44e108b0): hdmi.13 (GPIO UNCLAIMED) function nxp_hdmi_bonelt_pins group nxp_hdmi_bonelt_pinspin 45 (44e108b4): hdmi.13 (GPIO UNCLAIMED) function nxp_hdmi_bonelt_pins group nxp_hdmi_bonelt_pinspin 46 (44e108b8): hdmi.13 (GPIO UNCLAIMED) function nxp_hdmi_bonelt_pins group nxp_hdmi_bonelt_pinspin 47 (44e108bc): hdmi.13 (GPIO UNCLAIMED) function nxp_hdmi_bonelt_pins group nxp_hdmi_bonelt_pinspin 48 (44e108c0): hdmi.13 (GPIO UNCLAIMED) function nxp_hdmi_bonelt_pins group nxp_hdmi_bonelt_pinspin 49 (44e108c4): hdmi.13 (GPIO UNCLAIMED) function nxp_hdmi_bonelt_pins group nxp_hdmi_bonelt_pinspin 50 (44e108c8): hdmi.13 (GPIO UNCLAIMED) function nxp_hdmi_bonelt_pins group nxp_hdmi_bonelt_pinspin 51 (44e108cc): hdmi.13 (GPIO UNCLAIMED) function nxp_hdmi_bonelt_pins group nxp_hdmi_bonelt_pinspin 52 (44e108d0): hdmi.13 (GPIO UNCLAIMED) function nxp_hdmi_bonelt_pins group nxp_hdmi_bonelt_pinspin 53 (44e108d4): hdmi.13 (GPIO UNCLAIMED) function nxp_hdmi_bonelt_pins group nxp_hdmi_bonelt_pinspin 54 (44e108d8): hdmi.13 (GPIO UNCLAIMED) function nxp_hdmi_bonelt_pins group nxp_hdmi_bonelt_pinspin 55 (44e108dc): hdmi.13 (GPIO UNCLAIMED) function nxp_hdmi_bonelt_pins group nxp_hdmi_bonelt_pinspin 56 (44e108e0): hdmi.13 (GPIO UNCLAIMED) function nxp_hdmi_bonelt_pins group nxp_hdmi_bonelt_pinspin 57 (44e108e4): hdmi.13 (GPIO UNCLAIMED) function nxp_hdmi_bonelt_pins group nxp_hdmi_bonelt_pinspin 58 (44e108e8): hdmi.13 (GPIO UNCLAIMED) function nxp_hdmi_bonelt_pins group nxp_hdmi_bonelt_pinspin 59 (44e108ec): hdmi.13 (GPIO UNCLAIMED) function nxp_hdmi_bonelt_pins group nxp_hdmi_bonelt_pinspin 94 (44e10978): 4819c000.i2c (GPIO UNCLAIMED) function pinmux_i2c2_pins group pinmux_i2c2_pinspin 95 (44e1097c): 4819c000.i2c (GPIO UNCLAIMED) function pinmux_i2c2_pins group pinmux_i2c2_pinspin 98 (44e10988): 44e0b000.i2c (GPIO UNCLAIMED) function pinmux_i2c0_pins group pinmux_i2c0_pinspin 99 (44e1098c): 44e0b000.i2c (GPIO UNCLAIMED) function pinmux_i2c0_pins group pinmux_i2c0_pinspin 100 (44e10990): 48038000.mcasp (GPIO UNCLAIMED) function mcasp0_pins group mcasp0_pinspin 101 (44e10994): 48038000.mcasp (GPIO UNCLAIMED) function mcasp0_pins group mcasp0_pinspin 103 (44e1099c): 48038000.mcasp (GPIO UNCLAIMED) function mcasp0_pins group mcasp0_pinspin 106 (44e109a8): 48038000.mcasp (GPIO UNCLAIMED) function mcasp0_pins group mcasp0_pinspin 107 (44e109ac): 48038000.mcasp (GPIO UNCLAIMED) function mcasp0_pins group mcasp0_pinspin 108 (44e109b0): hdmi.13 (GPIO UNCLAIMED) function nxp_hdmi_bonelt_pins group nxp_hdmi_bonelt_pinspin 20 (44e10850): rstctl.3 (GPIO UNCLAIMED) function pinmux_rstctl_pins group pinmux_rstctl_pinspin 28 (44e10870): 481a8000.serial (GPIO UNCLAIMED) function pinmux_uart5_pins group pinmux_uart5_pinspin 29 (44e10874): 481a8000.serial (GPIO UNCLAIMED) function pinmux_uart5_pins group pinmux_uart5_pinspin 48 (44e108c0): 481aa000.serial (GPIO UNCLAIMED) function pinmux_uart6_pins group pinmux_uart6_pinspin 49 (44e108c4): 481aa000.serial (GPIO UNCLAIMED) function pinmux_uart6_pins group pinmux_uart6_pinspin 84 (44e10950): 48024000.serial (GPIO UNCLAIMED) function pinmux_uart3_pins group pinmux_uart3_pinspin 85 (44e10954): 48024000.serial (GPIO UNCLAIMED) function pinmux_uart3_pins group pinmux_uart3_pinspin 94 (44e10978): 4819c000.i2c (GPIO UNCLAIMED) function pinmux_i2c2_pins group pinmux_i2c2_pinspin 95 (44e1097c): 4819c000.i2c (GPIO UNCLAIMED) function pinmux_i2c2_pins group pinmux_i2c2_pinspin 96 (44e10980): 48022000.serial (GPIO UNCLAIMED) function pinmux_uart2_pins group pinmux_uart2_pinspin 97 (44e10984): 48022000.serial (GPIO UNCLAIMED) function pinmux_uart2_pins group pinmux_uart2_pinspin 98 (44e10988): 44e0b000.i2c (GPIO UNCLAIMED) function pinmux_i2c0_pins group pinmux_i2c0_pinspin 99 (44e1098c): 44e0b000.i2c (GPIO UNCLAIMED) function pinmux_i2c0_pins group pinmux_i2c0_pinsAre those that compiled this with the -@ working seeing the same thing?
Nick Garner
May 12, 2013, 1:16:53 AM5/12/13
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I get the output at the bottom of this email.
The -@, according to 'dtc --help' is:
-@ Symbols and Fixups support
These messages:
lead me to believe it's required by capemgr. I don't entirely understand what "generates a __symbols__ node at the
root node of the resulting blob" means/does.
Nick
root@beaglebone:~# cat /sys/kernel/debug/pinctrl/44e10800.pinmux/pinmux-pins
Pinmux settings per pin
Format: pin (name): mux_owner gpio_owner hog?
pin 0 (44e10800): mmc.5 (GPIO UNCLAIMED) function pinmux_emmc2_pins group pinmux_emmc2_pins
pin 1 (44e10804): mmc.5 (GPIO UNCLAIMED) function pinmux_emmc2_pins group pinmux_emmc2_pins
pin 2 (44e10808): mmc.5 (GPIO UNCLAIMED) function pinmux_emmc2_pins group pinmux_emmc2_pins
pin 3 (44e1080c): mmc.5 (GPIO UNCLAIMED) function pinmux_emmc2_pins group pinmux_emmc2_pins
pin 4 (44e10810): mmc.5 (GPIO UNCLAIMED) function pinmux_emmc2_pins group pinmux_emmc2_pins
pin 5 (44e10814): mmc.5 (GPIO UNCLAIMED) function pinmux_emmc2_pins group pinmux_emmc2_pins
pin 6 (44e10818): mmc.5 (GPIO UNCLAIMED) function pinmux_emmc2_pins group pinmux_emmc2_pins
pin 7 (44e1081c): mmc.5 (GPIO UNCLAIMED) function pinmux_emmc2_pins group pinmux_emmc2_pins
pin 8 (44e10820): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 9 (44e10824): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 10 (44e10828): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 11 (44e1082c): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 12 (44e10830): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 13 (44e10834): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 14 (44e10838): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 15 (44e1083c): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 16 (44e10840): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 17 (44e10844): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 18 (44e10848): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 19 (44e1084c): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 20 (44e10850): mmc.5 (GPIO UNCLAIMED) function pinmux_emmc2_pins group pinmux_emmc2_pins
pin 21 (44e10854): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 22 (44e10858): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 23 (44e1085c): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 24 (44e10860): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 25 (44e10864): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 26 (44e10868): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 27 (44e1086c): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 28 (44e10870): 481a8000.serial (GPIO UNCLAIMED) function pinmux_uart5_pins group pinmux_uart5_pins
pin 29 (44e10874): 481a8000.serial (GPIO UNCLAIMED) function pinmux_uart5_pins group pinmux_uart5_pins
pin 30 (44e10878): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 31 (44e1087c): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 32 (44e10880): mmc.5 (GPIO UNCLAIMED) function pinmux_emmc2_pins group pinmux_emmc2_pins
pin 33 (44e10884): mmc.5 (GPIO UNCLAIMED) function pinmux_emmc2_pins group pinmux_emmc2_pins
pin 34 (44e10888): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 35 (44e1088c): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 36 (44e10890): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 37 (44e10894): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 38 (44e10898): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 39 (44e1089c): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 40 (44e108a0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 41 (44e108a4): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 42 (44e108a8): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 43 (44e108ac): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 44 (44e108b0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 45 (44e108b4): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 46 (44e108b8): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 47 (44e108bc): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 48 (44e108c0): 481aa000.serial (GPIO UNCLAIMED) function pinmux_uart6_pins group pinmux_uart6_pins
pin 49 (44e108c4): 481aa000.serial (GPIO UNCLAIMED) function pinmux_uart6_pins group pinmux_uart6_pins
pin 50 (44e108c8): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 51 (44e108cc): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 52 (44e108d0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 53 (44e108d4): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 54 (44e108d8): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 55 (44e108dc): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 56 (44e108e0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 57 (44e108e4): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 58 (44e108e8): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 59 (44e108ec): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 60 (44e108f0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 61 (44e108f4): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 62 (44e108f8): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 63 (44e108fc): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 64 (44e10900): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 65 (44e10904): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 66 (44e10908): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 67 (44e1090c): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 68 (44e10910): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 69 (44e10914): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 70 (44e10918): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 71 (44e1091c): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 72 (44e10920): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 73 (44e10924): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 74 (44e10928): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 75 (44e1092c): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 76 (44e10930): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 77 (44e10934): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 78 (44e10938): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 79 (44e1093c): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 80 (44e10940): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 81 (44e10944): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 82 (44e10948): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 83 (44e1094c): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 84 (44e10950): 48024000.serial (GPIO UNCLAIMED) function pinmux_uart3_pins group pinmux_uart3_pins
pin 85 (44e10954): 48024000.serial (GPIO UNCLAIMED) function pinmux_uart3_pins group pinmux_uart3_pins
pin 86 (44e10958): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 87 (44e1095c): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 88 (44e10960): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 89 (44e10964): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 90 (44e10968): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 91 (44e1096c): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 92 (44e10970): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 93 (44e10974): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 94 (44e10978): 4819c000.i2c (GPIO UNCLAIMED) function pinmux_i2c2_pins group pinmux_i2c2_pins
pin 95 (44e1097c): 4819c000.i2c (GPIO UNCLAIMED) function pinmux_i2c2_pins group pinmux_i2c2_pins
pin 96 (44e10980): 48022000.serial (GPIO UNCLAIMED) function pinmux_uart2_pins group pinmux_uart2_pins
pin 97 (44e10984): 48022000.serial (GPIO UNCLAIMED) function pinmux_uart2_pins group pinmux_uart2_pins
pin 98 (44e10988): 44e0b000.i2c (GPIO UNCLAIMED) function pinmux_i2c0_pins group pinmux_i2c0_pins
pin 99 (44e1098c): 44e0b000.i2c (GPIO UNCLAIMED) function pinmux_i2c0_pins group pinmux_i2c0_pins
pin 100 (44e10990): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 101 (44e10994): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 102 (44e10998): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 103 (44e1099c): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 104 (44e109a0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 105 (44e109a4): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 106 (44e109a8): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 107 (44e109ac): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 108 (44e109b0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 109 (44e109b4): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 110 (44e109b8): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 111 (44e109bc): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 112 (44e109c0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 113 (44e109c4): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 114 (44e109c8): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 115 (44e109cc): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 116 (44e109d0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 117 (44e109d4): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 118 (44e109d8): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 119 (44e109dc): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 120 (44e109e0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 121 (44e109e4): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 122 (44e109e8): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 123 (44e109ec): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 124 (44e109f0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 125 (44e109f4): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 126 (44e109f8): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 127 (44e109fc): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 128 (44e10a00): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 129 (44e10a04): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 130 (44e10a08): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 131 (44e10a0c): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 132 (44e10a10): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 133 (44e10a14): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 134 (44e10a18): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 135 (44e10a1c): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 136 (44e10a20): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 137 (44e10a24): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 138 (44e10a28): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 139 (44e10a2c): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 140 (44e10a30): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 141 (44e10a34): (MUX UNCLAIMED) (GPIO UNCLAIMED)
root@beaglebone:~# cat /sys/kernel/debug/pinctrl/44e10800.pinmux/pins
registered pins: 142
pin 0 (44e10800) 00000031 pinctrl-single
pin 1 (44e10804) 00000031 pinctrl-single
pin 2 (44e10808) 00000031 pinctrl-single
pin 3 (44e1080c) 00000031 pinctrl-single
pin 4 (44e10810) 00000031 pinctrl-single
pin 5 (44e10814) 00000031 pinctrl-single
pin 6 (44e10818) 00000031 pinctrl-single
pin 7 (44e1081c) 00000031 pinctrl-single
pin 8 (44e10820) 00000027 pinctrl-single
pin 9 (44e10824) 00000027 pinctrl-single
pin 10 (44e10828) 00000027 pinctrl-single
pin 11 (44e1082c) 00000027 pinctrl-single
pin 12 (44e10830) 00000027 pinctrl-single
pin 13 (44e10834) 00000027 pinctrl-single
pin 14 (44e10838) 00000027 pinctrl-single
pin 15 (44e1083c) 00000027 pinctrl-single
pin 16 (44e10840) 00000027 pinctrl-single
pin 17 (44e10844) 00000027 pinctrl-single
pin 18 (44e10848) 00000027 pinctrl-single
pin 19 (44e1084c) 00000027 pinctrl-single
pin 20 (44e10850) 00000017 pinctrl-single
pin 21 (44e10854) 00000007 pinctrl-single
pin 22 (44e10858) 00000017 pinctrl-single
pin 23 (44e1085c) 00000007 pinctrl-single
pin 24 (44e10860) 00000017 pinctrl-single
pin 25 (44e10864) 00000027 pinctrl-single
pin 26 (44e10868) 00000027 pinctrl-single
pin 27 (44e1086c) 00000027 pinctrl-single
pin 28 (44e10870) 00000026 pinctrl-single
pin 29 (44e10874) 00000006 pinctrl-single
pin 30 (44e10878) 00000037 pinctrl-single
pin 31 (44e1087c) 00000037 pinctrl-single
pin 32 (44e10880) 00000032 pinctrl-single
pin 33 (44e10884) 00000032 pinctrl-single
pin 34 (44e10888) 00000037 pinctrl-single
pin 35 (44e1088c) 00000027 pinctrl-single
pin 36 (44e10890) 00000037 pinctrl-single
pin 37 (44e10894) 00000037 pinctrl-single
pin 38 (44e10898) 00000037 pinctrl-single
pin 39 (44e1089c) 00000037 pinctrl-single
pin 40 (44e108a0) 0000002f pinctrl-single
pin 41 (44e108a4) 0000002f pinctrl-single
pin 42 (44e108a8) 0000002f pinctrl-single
pin 43 (44e108ac) 0000002f pinctrl-single
pin 44 (44e108b0) 0000002f pinctrl-single
pin 45 (44e108b4) 0000002f pinctrl-single
pin 46 (44e108b8) 0000002f pinctrl-single
pin 47 (44e108bc) 0000002f pinctrl-single
pin 48 (44e108c0) 00000004 pinctrl-single
pin 49 (44e108c4) 00000024 pinctrl-single
pin 50 (44e108c8) 0000002f pinctrl-single
pin 51 (44e108cc) 0000002f pinctrl-single
pin 52 (44e108d0) 0000002f pinctrl-single
pin 53 (44e108d4) 0000002f pinctrl-single
pin 54 (44e108d8) 0000002f pinctrl-single
pin 55 (44e108dc) 0000002f pinctrl-single
pin 56 (44e108e0) 00000027 pinctrl-single
pin 57 (44e108e4) 00000027 pinctrl-single
pin 58 (44e108e8) 00000027 pinctrl-single
pin 59 (44e108ec) 00000027 pinctrl-single
pin 60 (44e108f0) 00000030 pinctrl-single
pin 61 (44e108f4) 00000030 pinctrl-single
pin 62 (44e108f8) 00000030 pinctrl-single
pin 63 (44e108fc) 00000030 pinctrl-single
pin 64 (44e10900) 00000030 pinctrl-single
pin 65 (44e10904) 00000030 pinctrl-single
pin 66 (44e10908) 00000027 pinctrl-single
pin 67 (44e1090c) 00000027 pinctrl-single
pin 68 (44e10910) 00000020 pinctrl-single
pin 69 (44e10914) 00000000 pinctrl-single
pin 70 (44e10918) 00000020 pinctrl-single
pin 71 (44e1091c) 00000000 pinctrl-single
pin 72 (44e10920) 00000000 pinctrl-single
pin 73 (44e10924) 00000000 pinctrl-single
pin 74 (44e10928) 00000000 pinctrl-single
pin 75 (44e1092c) 00000020 pinctrl-single
pin 76 (44e10930) 00000020 pinctrl-single
pin 77 (44e10934) 00000020 pinctrl-single
pin 78 (44e10938) 00000020 pinctrl-single
pin 79 (44e1093c) 00000020 pinctrl-single
pin 80 (44e10940) 00000020 pinctrl-single
pin 81 (44e10944) 00000027 pinctrl-single
pin 82 (44e10948) 00000030 pinctrl-single
pin 83 (44e1094c) 00000010 pinctrl-single
pin 84 (44e10950) 00000021 pinctrl-single
pin 85 (44e10954) 00000001 pinctrl-single
pin 86 (44e10958) 00000062 pinctrl-single
pin 87 (44e1095c) 00000062 pinctrl-single
pin 88 (44e10960) 00000035 pinctrl-single
pin 89 (44e10964) 00000027 pinctrl-single
pin 90 (44e10968) 00000037 pinctrl-single
pin 91 (44e1096c) 00000037 pinctrl-single
pin 92 (44e10970) 00000030 pinctrl-single
pin 93 (44e10974) 00000000 pinctrl-single
pin 94 (44e10978) 00000073 pinctrl-single
pin 95 (44e1097c) 00000073 pinctrl-single
pin 96 (44e10980) 00000020 pinctrl-single
pin 97 (44e10984) 00000000 pinctrl-single
pin 98 (44e10988) 00000070 pinctrl-single
pin 99 (44e1098c) 00000070 pinctrl-single
pin 100 (44e10990) 00000027 pinctrl-single
pin 101 (44e10994) 00000027 pinctrl-single
pin 102 (44e10998) 00000027 pinctrl-single
pin 103 (44e1099c) 00000027 pinctrl-single
pin 104 (44e109a0) 00000024 pinctrl-single
pin 105 (44e109a4) 00000027 pinctrl-single
pin 106 (44e109a8) 00000027 pinctrl-single
pin 107 (44e109ac) 00000027 pinctrl-single
pin 108 (44e109b0) 00000023 pinctrl-single
pin 109 (44e109b4) 00000027 pinctrl-single
pin 110 (44e109b8) 00000030 pinctrl-single
pin 111 (44e109bc) 00000028 pinctrl-single
pin 112 (44e109c0) 00000030 pinctrl-single
pin 113 (44e109c4) 00000028 pinctrl-single
pin 114 (44e109c8) 00000028 pinctrl-single
pin 115 (44e109cc) 00000028 pinctrl-single
pin 116 (44e109d0) 00000030 pinctrl-single
pin 117 (44e109d4) 00000030 pinctrl-single
pin 118 (44e109d8) 00000030 pinctrl-single
pin 119 (44e109dc) 00000030 pinctrl-single
pin 120 (44e109e0) 00000020 pinctrl-single
pin 121 (44e109e4) 00000030 pinctrl-single
pin 122 (44e109e8) 00000030 pinctrl-single
pin 123 (44e109ec) 00000028 pinctrl-single
pin 124 (44e109f0) 00000028 pinctrl-single
pin 125 (44e109f4) 00000028 pinctrl-single
pin 126 (44e109f8) 00000030 pinctrl-single
pin 127 (44e109fc) 00000028 pinctrl-single
pin 128 (44e10a00) 00000028 pinctrl-single
pin 129 (44e10a04) 00000020 pinctrl-single
pin 130 (44e10a08) 00000028 pinctrl-single
pin 131 (44e10a0c) 00000028 pinctrl-single
pin 132 (44e10a10) 00000028 pinctrl-single
pin 133 (44e10a14) 00000028 pinctrl-single
pin 134 (44e10a18) 00000028 pinctrl-single
pin 135 (44e10a1c) 00000020 pinctrl-single
pin 136 (44e10a20) 00000028 pinctrl-single
pin 137 (44e10a24) 00000028 pinctrl-single
pin 138 (44e10a28) 00000028 pinctrl-single
pin 139 (44e10a2c) 00000028 pinctrl-single
pin 140 (44e10a30) 00000028 pinctrl-single
pin 141 (44e10a34) 00000020 pinctrl-single
root@beaglebone:~#
ky...@cranehome.info
May 12, 2013, 1:37:05 AM5/12/13
to beagl...@googlegroups.com
Ok, that I think confirms that the little -@ is going to be important then. It clobbered the MUX settings for quite a bit of other stuff beyond HDMI. Interestingly, despite the fact that mux was not correct for the eMMC hardware, it seemed to still be operable. I could mount it and use it but clearly some of the data lines were switched to 0x27 and thus were MUXed GPIO according to the pins file.
I guess I need to figure out how to build dtc from source.
KurtE
May 12, 2013, 10:44:58 AM5/12/13
to beagl...@googlegroups.com
Up till now I have used my own files modeled after the first setup under pignology, with some of the changes mentioned earlier in this thread about setting active... But this morning I wanted to check out how you activated all of them, plus I was curious about how to activate the PU resistors so I can attempt to do the equivalent of INPUT_PULLUP mode of Arduino (will get more into that on the other thread).
So I downloaded the All uarts files and took a look and I believe there may be some issues with the uart5 section. That is:
uart5_pins: pinmux_uart5_pins {
pinctrl-single,pins = <
0x070 0x26 /* UART5_RXD */
0x074 0x06 /* UART5_TXD */
>;
};
Turns out these pins correspond with some of the GPIO pins I am experimenting with. What first confused me at first with this file, is that the UART pin numbers are off by 1. that is UART5_RXD is actually UART4_RXD. What I find curious is that in the BBB reference manual (P72), these are listed as uart4_rxd_mux2 and likewise uart4_txd_mux2. None of the other RXD/TXD pins are listed as Mux... Looking at TI AM3359 manual (p77), I see that for example uart4_rxd is exposed an balls (E18, J18, T17). But I am not sure if this is significant as for example uart3_rxd is also on multiple pin(C15, G15, L17). But what I do see is that while only T17 is exported to one of these connectors, I believe that J18 is connected to the Ethernet processor (Fig 37 P59) of the BBB manual.
Again I am still learning here so not sure if there is any significance that these signals are potentially brought out on different balls (pins). Do you need to do anything special? What if multiple exports of the same signal are active at the same time on multiple pins?
Again it may simply be that I am confused here.
Kurt
So I downloaded the All uarts files and took a look and I believe there may be some issues with the uart5 section. That is:
uart5_pins: pinmux_uart5_pins {
pinctrl-single,pins = <
0x070 0x26 /* UART5_RXD */
0x074 0x06 /* UART5_TXD */
>;
};
Turns out these pins correspond with some of the GPIO pins I am experimenting with. What first confused me at first with this file, is that the UART pin numbers are off by 1. that is UART5_RXD is actually UART4_RXD. What I find curious is that in the BBB reference manual (P72), these are listed as uart4_rxd_mux2 and likewise uart4_txd_mux2. None of the other RXD/TXD pins are listed as Mux... Looking at TI AM3359 manual (p77), I see that for example uart4_rxd is exposed an balls (E18, J18, T17). But I am not sure if this is significant as for example uart3_rxd is also on multiple pin(C15, G15, L17). But what I do see is that while only T17 is exported to one of these connectors, I believe that J18 is connected to the Ethernet processor (Fig 37 P59) of the BBB manual.
Again I am still learning here so not sure if there is any significance that these signals are potentially brought out on different balls (pins). Do you need to do anything special? What if multiple exports of the same signal are active at the same time on multiple pins?
Again it may simply be that I am confused here.
Kurt
ky...@cranehome.info
May 12, 2013, 12:37:20 PM5/12/13
to beagl...@googlegroups.com
Well, I pulled in the source for Arch 3.8.11 last night and went to bed. Lo and behold when I looked this morning in the ./scripts/dtc/ directory there was already a compiled dtc. dtc -h showed that it understood the -@ option. So I compiled the new dts files using this new compiler and the results looked better, more closely matching in output size with the original. Booting from this new .dtb results in the correct pinmux-pins contents and the mux modes in pins is correct as well. So, I apparently have shaved enough yak now to get on with trying out some ideas!
Tim Clark
May 18, 2013, 2:58:29 PM5/18/13
to beagl...@googlegroups.com, wb9...@gmail.com
ubuntu@ubuntu-armhf:/dev$ uname -a
Linux ubuntu-armhf 3.8.9-bone15 #1 SMP Sat Apr 27 02:57:35 UTC 2013 armv7l armv7l armv7l GNU/Linux
ubuntu@ubuntu-armhf:/dev$ ls ttyO*
ttyO0 ttyO1 ttyO2 ttyO4 ttyO5
ubuntu@ubuntu-armhf:/dev$
Thanks wb9 !
On Saturday, May 18, 2013 12:08:36 AM UTC-4, wb9...@gmail.com wrote:
I have a device tree with Ubuntu working with several Uarts the SD card Images are at http://www.marchdvd.com/bbbk/ -- you can also boot with out S2by modifying the eMMC as I describe in the /root text file
Nathaniel Lewis
May 23, 2013, 5:09:51 AM5/23/13
to beagl...@googlegroups.com
Or you could do something like this without rebooting - http://hipstercircuits.com/enable-serialuarttty-on-beaglebone-black/
On Wed, May 22, 2013 at 9:39 PM, <rto...@gmail.com> wrote:
Hey guys, good work!First of all thanks to everyone especially SKiAt, Pignology and Michael, for the tremendous support,I wanted to add a lazy short solution, without patch the dtc or recompile the kernel.you can follow the initial step in the Pignology's Blog, atrecompiling only am335x-boneblack.dtb without overlays of abstraction,adding these definitions into am335x-bone-common.dtsi file:am33xx_pinmux: pinmux@44e10800 {
pinctrl-names = "default";
pinctrl-0 = <&userled_pins>;
userled_pins: pinmux_userled_pins {
pinctrl-single,pins = <
0x54 0x7 /* gpmc_a5.gpio1_21, OUTPUT | MODE7 */
0x58 0x17 /* gpmc_a6.gpio1_22, OUTPUT_PULLUP | MODE7 */
0x5c 0x7 /* gpmc_a7.gpio1_23, OUTPUT | MODE7 */
0x60 0x17 /* gpmc_a8.gpio1_24, OUTPUT_PULLUP | MODE7 */
>;
};
i2c0_pins: pinmux_i2c0_pins {
pinctrl-single,pins = <
0x188 0x70 /* i2c0_sda, SLEWCTRL_SLOW | INPUT_PULLUP | MODE0 */
0x18c 0x70 /* i2c0_scl, SLEWCTRL_SLOW | INPUT_PULLUP | MODE0 */
>;
};
i2c2_pins: pinmux_i2c2_pins {
pinctrl-single,pins = <
0x178 0x73 /* uart1_ctsn.i2c2_sda, SLEWCTRL_SLOW | INPUT_PULLUP | MODE3 */
0x17c 0x73 /* uart1_rtsn.i2c2_scl, SLEWCTRL_SLOW | INPUT_PULLUP | MODE3 */
>;
};
uart1_pins: pinmux_uart1_pins {
pinctrl-single,pins = <
0x180 0x20 /* uart1_rxd, FAST | INPUT_PULLUP | MODE0 */
0x184 0x00 /* uart1_txd, FAST | OUTPUT_PULLUP | MODE0 */
>;
};
uart5_pins: pinmux_uart5_pins {
pinctrl-single,pins = <
0x070 0x26 /* uart5_rxd, FAST | INPUT_PULLUP | MODE6 */
0x074 0x06 /* uart5_txd, FAST | OUTPUT_PULLUP | MODE6 */
>;
};
};
ocp: ocp {
uart1: serial@44e09000 {
status = "okay";
/* PINS NOT MAPPED err: -19*/
};
uart2: serial@48022000 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>;
};
uart5: serial@481a8000 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart5_pins>;
};
...This automatically links the ttyO * to pins and set the function pin mode* in conf_<module>_<pin> register.
For the compilation, you can removed "- @" option, and leave the command with this aspect:# dtc -I dts -O dtb -o am335x-boneblack.dtb am335x-boneblack.dtsThe BBB has been tested with debian 7.0.0 available in:you need install "dtc" on your BBB with debian# apt-get install device-tree-compilerestimated time to implement this solution: 2 minutes + reboot!byeMaurizio
Gerald Coley
Jun 1, 2013, 6:09:02 PM6/1/13
to beagl...@googlegroups.com
If you install the FTDI driver and the cable, There is nothing magical about it other than making sure you have it plugged in correctly. Black wire is pin 1. Pin 1 has the big white dot next to it on the board.
Gerald
On Sat, Jun 1, 2013 at 1:05 AM, <mathew...@gmail.com> wrote:
I followed the instructions here and my /dev/ttyO1 shows up now. Excellent instructions. Thanks. But the device I'm trying to interface with just doesn't show any data. It's a GPS receiver I had laying around:
(http://www.parallax.com/Store/Sensors/CompassGPS/tabid/173/ProductID/644/List/0/Default.aspx?SortField=ProductName,ProductName)
I confirmed it works on my FTDI with USB to a PC running Linux. I put a pull down resistor on the TX and RX pins which appears to make it continuously transmit data without having to open a terminal (LEDs flash). I have the power connected to BBB 3.3 V, gnd connected, and TX and RX connected to UART1. I've tried minicom, screen, and cat. No matter what I do, I can't see any data. I enabled pull-down and am trying to use the receiver in TTL mode. Before I put the pull-down resistors on, when connected to my PC it wouldn't send any data until I opened a terminal. I figure the FTDI conditions the signal when the terminal connects, signaling it to transmit. Do I need to do something to the BBB to connect a TTL device?
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shubhama...@gmail.com
Jun 26, 2013, 9:34:06 AM6/26/13
to beagl...@googlegroups.com
Hey Tim,
I am a newbie to Beaglebone black. I want to establish full UART with hardware flow control using RTS,CTS,DTR,DSR,DCD and RI on UART1 so that I could establish a full modem handshaking. Can you suggest how should I proceed? I have gone through following http://blog.pignology.net/2013/05/getting-uart2-devttyo1-working-on.html to enable UART1 Tx and Rx. So would just enabling UART1_RTS and UART1_CTS there serve my purpose.
Thanks in advance
vamshi....@unigen.com
Jan 6, 2016, 9:44:02 AM1/6/16
to BeagleBoard
Hi Folks,
I have added the following
uart1_pins: pinmux_uart1_pins {
pinctrl-single,pins = <
0x170 0x30 /* (E15) uart0_rxd.uart0_rxd, PIN_INPUT | MUX_MODE0 */
0x174 0x00 /* (E16) uart0_txd.uart0_txd, PIN_OUTPUT | MUX_MODE0 */
>;
};
uart2_pins: pinmux_uart2_pins {
pinctrl-single,pins = <
0x180 0x30 /* (D16) uart1_rxd.uart1_rxd, PIN_INPUT | MUX_MODE0 */
0x184 0x00 /* (D15) uart1_txd.uart1_txd, PIN_OUTPUT | MUX_MODE0 */
>;
};
This worked for me
I have added the following
uart1_pins: pinmux_uart1_pins {
pinctrl-single,pins = <
0x170 0x30 /* (E15) uart0_rxd.uart0_rxd, PIN_INPUT | MUX_MODE0 */
0x174 0x00 /* (E16) uart0_txd.uart0_txd, PIN_OUTPUT | MUX_MODE0 */
>;
};
uart2_pins: pinmux_uart2_pins {
pinctrl-single,pins = <
0x180 0x30 /* (D16) uart1_rxd.uart1_rxd, PIN_INPUT | MUX_MODE0 */
0x184 0x00 /* (D15) uart1_txd.uart1_txd, PIN_OUTPUT | MUX_MODE0 */
>;
};
This worked for me
uart1: serial@44e09000 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>;
};
uart2: serial@48022000 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>;
};
uart2: serial@48022000 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
};
};
On Tuesday, April 30, 2013 at 10:11:54 PM UTC+5:30, SKiAt wrote:
Hi alltoday I received my first Black one revision A5A.With my old Beaglebone A6A I was using 2 uart, so the first things I checked out were the serial ports, and:- I didn't find the /dev/ttyOx nodes- I saw that there is no mode the pin muxing avaliable from /sys/kernel/debug/omap_mux/...I have read about the auto muxing based on capes eeprom configuration and stuff like this is it the only way? And if I don't need the display how can I disable the hdmi drivers?ThanksLuca
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