Booting issue with a cape - servo input load

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Frédéric

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Aug 11, 2015, 3:04:59 AM8/11/15
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Hi!

I'm testing my 32 channels servos cape, and I found a bad issue: when I plug the servos, the BBB does not boot anymore.

The problem comes from the fact I'm using some pins which are also used by the system to determine the boot sequence.

What I don't understand is that a servo in an input, and I though it would not cause any problem. But the input load is maybe too low? Any idea how I could solve this? Using a buffer with a tri-state mode, driven by the SYSRESET pin ?

Thanks,

Frédéric

Graham

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Aug 11, 2015, 3:32:39 PM8/11/15
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Frederic:

If you look at the diagrams in the System Reference Manual, the BBB uses 100K Ohm pull up and pull down resistors to tell the processor how to boot.  So any load low enough to cause a line with 100K Ohm pull up or pull down to change logic state will cause boot problems.  I would estimate that any load, less than 200 K Ohms can cause this problem, even though it is an "Input".  Also, inputs connected to unpowered ICs will clamp a line to ground, because of the ESD diodes in the IC.

So, either use powered buffer ICs that have only a CMOS input load, or a transmission gate as you described.  I think you can switch the transmission gate using the 3.3V rail coming out of the BBB, since it does not come up until the unit is finished booting.  Do not put an unpowered transmission gate on the GPIO lines, because of the ESD clamping I described.

--- Graham

==

Frédéric

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Aug 18, 2015, 1:20:18 PM8/18/15
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Le Tuesday 11 August 2015, Graham a écrit :

> If you look at the diagrams in the System Reference Manual, the BBB uses
> 100K Ohm pull up and pull down resistors to tell the processor how to
> boot. So any load low enough to cause a line with 100K Ohm pull up or
> pull down to change logic state will cause boot problems. I would
> estimate that any load, less than 200 K Ohms can cause this problem,
> even though it is an "Input". Also, inputs connected to unpowered ICs
> will clamp a line to ground, because of the ESD diodes in the IC.
>
> So, either use powered buffer ICs that have only a CMOS input load, or a
> transmission gate as you described. I think you can switch the
> transmission gate using the 3.3V rail coming out of the BBB, since it
> does not come up until the unit is finished booting. Do not put an
> unpowered transmission gate on the GPIO lines, because of the ESD
> clamping I described.

Thanks for the explanations! Didn't know about this ESD clamping
problem...

I started to modify my cape, adding 4x 74HC541; can you confirm they are
OK regarding the inputs? They will be powered up from the 3V3 rail.

--
Frédéric

Graham Haddock

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Aug 18, 2015, 11:11:48 PM8/18/15
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Hi Frederic:
You could make the 74HC541 work, since it has a CMOS input and should not load the BBB during boot, provided that it has power supplied the entire time the BBB is booting.

I was thinking more of something like the 74CBTLV3126 bus switch which would disconnect your existing circuits from the BBB, rather than buffer them like the 74HC541.

In both cases, the switching should be done from the 3.3 V bus, but you can not power the ICs from the 3.3V bus as you mentioned.  As I remember, on the BBB, the 3.3V bus rail on the P9 connector does not power up until AFTER the BBB has completed booting, so if you power the buffer or isolation switch ICs from the 3.3V rail, the ESD protection diodes in the IC will clamp the boot lines to ground, preventing the BBB from booting. You will need to power the ICs, whichever you choose to use, from a separate 3.3V regulator that provides power anytime the BBB has power applied.

I think the +5V rail is powered anytime the BBB is powered, so it could drive the separate +3.3V regulator.

A few Voltage measurements are appropriate, before you finish your re-design.

--- Graham

==

    Frédéric

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Frédéric

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Aug 19, 2015, 6:03:44 AM8/19/15
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Le Tuesday 18 August 2015, Graham a écrit :

> You could make the 74HC541 work, since it has a CMOS input and should not
> load the BBB during boot, provided that it has power supplied the entire
> time the BBB is booting.
>
> I was thinking more of something like the 74CBTLV3126 bus switch which
> would disconnect your existing circuits from the BBB, rather than buffer
> them like the 74HC541.

I see. Bus switch is interesting as it allows bi-directional
communication; unused outputs could be configured as inputs...

On another hand, buffer offers a better protection of the BBB pins.

> In both cases, the switching should be done from the 3.3 V bus, but you
> can not power the ICs from the 3.3V bus as you mentioned. As I
> remember, on the BBB, the 3.3V bus rail on the P9 connector does not
> power up until AFTER the BBB has completed booting, so if you power the
> buffer or isolation switch ICs from the 3.3V rail, the ESD protection
> diodes in the IC will clamp the boot lines to ground, preventing the BBB
> from booting. You will need to power the ICs, whichever you choose to
> use, from a separate 3.3V regulator that provides power anytime the BBB
> has power applied.
>
> I think the +5V rail is powered anytime the BBB is powered, so it could
> drive the separate +3.3V regulator.
>
> A few Voltage measurements are appropriate, before you finish your
> re-design.

I plan to add a 5V regulator on my cape, so the servos batteries (6V
Ni-mH) will power the BBB too; I'll also use a 3.7V Lipo battery managed
by the PMIC chip.

So no problem to have the ICs supplied before the boot sequence.

Thanks,

--
Frédéric

Frédéric

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Aug 24, 2015, 4:13:31 AM8/24/15
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Le 18/08/2015, Graham a écrit :

> I was thinking more of something like the 74CBTLV3126 bus switch which

Is the SN74CBT3245 (8 channels) OK too?

http://www.farnell.com/datasheets/1857534.pdf

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Frédéric

Frédéric

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Aug 24, 2015, 7:41:35 AM8/24/15
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Le 11/08/2015, Graham a écrit :

> If you look at the diagrams in the System Reference Manual, the BBB uses
> 100K Ohm pull up and pull down resistors to tell the processor how to
> boot. So any load low enough to cause a line with 100K Ohm pull up or
> pull down to change logic state will cause boot problems. I would
> estimate that any load, less than 200 K Ohms can cause this problem,
> even though it is an "Input".

I guess that only pull-up boot pins are concerned by a too low load?

Do you think I could add another resistor in // with the 100k of the BBB,
to try to avoir it?

--
Frédéric

Graham

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Aug 24, 2015, 11:05:20 AM8/24/15
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This switch is required to be powered from 5V, but then can handle 3.3 V bus, so probably OK.
Just make sure you have enough noise margin on the control signals, so motor and ground noise does not cause false control switching.
--- Graham

==

Graham

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Aug 24, 2015, 11:23:21 AM8/24/15
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There is a compromise between the value of the resistors used for boot programming,
and the permanent load they put on the I/O system during operational I/O.

So, yes, you can lower the value of the programming resistors, if it both solves your
boot problem, and does not disturb the way the I/O works when the system is in normal
operation.  At some point it will.  The output drive capability of the GPIO on the Sitara
is limited. Make sure you understand it.

And make sure you are allowing for noise margin on both the boot logic signals and your
operating logic signals.  A battery powered motor and servo system can have a lot of
electrical noise, both on the power and the ground system.  If you have system noise
getting into the boot and control logic, you end up with intermittent problems that
are extremely hard to debug.

--- Graham

==

Frédéric

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Aug 24, 2015, 1:28:19 PM8/24/15
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Le Monday 24 August 2015, Graham a écrit :

> There is a compromise between the value of the resistors used for boot
> programming,
> and the permanent load they put on the I/O system during operational I/O.
>
> So, yes, you can lower the value of the programming resistors, if it
> both solves your
> boot problem, and does not disturb the way the I/O works when the system
> is in normal
> operation. At some point it will. The output drive capability of the
> GPIO on the Sitara
> is limited. Make sure you understand it.
>
> And make sure you are allowing for noise margin on both the boot logic
> signals and your
> operating logic signals. A battery powered motor and servo system can
> have a lot of
> electrical noise, both on the power and the ground system. If you have
> system noise
> getting into the boot and control logic, you end up with intermittent
> problems that
> are extremely hard to debug.

Thanks for the advices! I'll make some tests.

--
Frédéric

Frédéric

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Aug 31, 2015, 3:18:32 AM8/31/15
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Le 24/08/2015, Graham a écrit :

> There is a compromise between the value of the resistors used for boot
> programming, and the permanent load they put on the I/O system during
> operational I/O.
>
> So, yes, you can lower the value of the programming resistors, if it
> both solves your boot problem, and does not disturb the way the I/O
> works when the system is in normal operation. At some point it will.

What is the minimum voltage I should have on the GPIO input so it is read
as 1 logic?

> The output drive capability of the GPIO on the Sitara is limited. Make
> sure you understand it.

I guess that I have to take the maximum current sink a GPIO can handle? I
cant find these values - only current source (4mA). Can I find the same
value for current sink?

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Frédéric

Graham Haddock

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Aug 31, 2015, 9:33:24 AM8/31/15
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What is the minimum voltage I should have on the GPIO input so it is read
as 1 logic?


For most CMOS the minimum input voltage guaranteed to be read as a one is 0.7 times Vcc.

But not always. Read the spec sheet for the part in use.  For instance, the
transmission gate you found was rated for Vcc of 5 V , but said that the gate
control was compatible with both 5V and 3.3V systems, which tells me the
Voltages are offset from standard.

I guess that I have to take the maximum current sink a GPIO can handle? I
cant find these values - only current source (4mA). Can I find the same
value for current sink?

Normally CMOS can sink more current than it can source, typically by a factor
of about three, if the device designer used the same geometries for the pull up
and pull down transistors. 
But not always. They could have used a smaller geometry for the sinks.
As usual, read the data sheet.  If you can't find the sink current, then I think
you must assume it is the same, in this case 4 mA.

--- Graham

==

Frédéric

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Aug 31, 2015, 9:39:00 AM8/31/15
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Le 31/08/2015, Graham a écrit :

> As usual, read the data sheet. If you can't find the sink current, then
> I think you must assume it is the same, in this case 4 mA.

Unfortunally, I didn't find the value for sink current in Sitara
datasheet...

--
Frédéric
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