Just a few thoughts ...
It is not possible to have a fully deterministic real-time operating system on a processor that uses instruction/data caches. ie you have to turn off the cacheing to achieve determinism and eliminate performance jitter (which then degrades the average performance).
It is not possible to have a fully deterministic real-time operating system on a processor that uses instruction/data caches. ie you have to turn off the cacheing to achieve determinism and eliminate performance jitter (which then degrades the average performance).
From what I understand PREEMPT_RT does not really improve the real-time performance of linux if you stick to user level applications. You have to start doing things at kernel level, which can get difficult and break many of the existing device drivers. Anyway, who said all embedded applications require a deterministic real-time performance? Soft real-time performance is generally good enough for a lot of applications.
For real-time, the PRU co-processors are the way to go.
Hi,
On Saturday, February 22, 2014 2:17:24 PM UTC+2, rchrd...@gmail.com wrote:Just a few thoughts ...
It is not possible to have a fully deterministic real-time operating system on a processor that uses instruction/data caches. ie you have to turn off the cacheing to achieve determinism and eliminate performance jitter (which then degrades the average performance).
Yep, but, that's the easy part. How about pipelines and instructions reordering done by the compiler and the processor? How about interrupts? How about multi-cores? How about the drift of the crystal you use as the clock source of your CPU? You might be shocked now, but as you can see it's impossible to have a hard real-time system with state of the art (multi-core) processors. Is it? I think that you need to come up with a realistic test suite to see if preempt-rt (with or without CPU isolation) is good enough, or if you need Xenomai (still you will see issues if Xenomai and Linux use the same caches), or some dedicated hardware like PRU. There is also some interesting work by Jan Kiszka - not yet on ARM.[1]
Regards,
Robert
[1] http://lwn.net/Articles/574273/
Shameless self promotion:
[2] http://www.reliableembeddedsystems.com/pdfs/2010_03_04_rt_linux.pdf
[3] http://www.embedded.com/design/operating-systems/4204740/Getting-real--time--about-embedded-GNU-Linux
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Hi,
For those interested in what the BBB can do in terms of interrupt latencies with PREEMPT-RT applied, OSADL actually has one in their Q&A racks;Most recent latency plot (under load) is here:
I have recently tested kernel 3.8.13-rt9 (https://github.com/beagleboard/kernel/tree/3.8-rt) using git://git.kernel.org/pub/scm/linux/kernel/git/clrkwllms/rt-tests.git. I am using Ubuntu 12.04.4. The load was created using stress –cpu 1 which generates a cpu load of about 100%. I then used cyclictest:
root@ubuntu-armhf:/home/ubuntu/rt-tests# ./cyclictest -l1000000 -m -n -t1 -p99 -i400 -q
# /dev/cpu_dma_latency set to 0us
T: 0 ( 770) P:99 I:400 C:1000000 Min: 14 Act: 19 Avg: 18 Max: 132
uname -a reports:
root@ubuntu-armhf:/home/ubuntu/rt-tests# uname -a
Linux ubuntu-armhf 3.8.13-rt9-00899-g160e771 #1 SMP PREEMPT Wed Jun 19 10:49:36 CEST 2013 armv7l armv7l armv7l GNU/Linux
I am absolutely surprised that the result is looking that good.
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