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Thank you very much! I will try to remove it and see if any luck with the spi0....
On Sat, Dec 3, 2016 at 1:09 AM, Joe Phaneuf <j...@verdigris.co> wrote:
Pretty confident it's not kernel version. Actually explored that line of thinking a little, but there's a u-boot spi tool you can use to test before the kernel even loads, and you can replicate this issue with that.FYI response from Seeed regarding the existence of the caps is that they're for EMC related to the UART on the Grove connector.This is the location of the spi0 capacitors (Should only need to remove the one on clock, but I removed both, forget which one is which). Near the sd card slot, underneath the grove connectors:
On Thursday, December 1, 2016 at 10:16:14 PM UTC-8, Buming Chen wrote:Thanks! Could you tell me where is the cap on the board? Already read the BBGW's SCH, but still couldn't figure it out....And do you think this is the problem caused by specific kernel versions (I'm using ubuntu 16.04, 4.4.12-ti-r30)? I assume using SPI0 for communication is really common among BBGW users, but after I searched the whole forum, just you and me encountered this CLK hardware design issue??
On Friday, December 2, 2016 at 12:43:24 AM UTC+8, Joe Phaneuf wrote:Howdy, correct, had to completely remove the cap on the spi0 clock. Hope that helps!
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--Buming Chen
It's not crosstalk, 2 capacitors are the answer - one on CLK line and one on D0 (MISO) line, used also as RX/TX of UART2 on Grove connector.
Here
are some more details and a picture with said capacitors marked, as the
one posted by Joe Phaneuf is no longer available:
https://stackoverflow.com/a/46351310/3217805
Just in case I'm also attaching the picture here.