Hey v8 devs,
The simulator, the disassembler and many header files in the v8 can benefit from an automation tool that transforms information from the spec, RISC-V Unified Database potentially, to the provided format.
Starting with the disassembler,
the code, for example, contains TODOs and might be refactored with macros that can be reused throughout the code. This refactoring can be easily generated using the RISC-V Unified Database (UDB), a proven, ongoing effort to unify the RISC-V specification.
The new sub-category feature in the unified spec also provides human-readable generation in the required control flow format.
Moreover, an automated codegen also proves its realibility with the development of various RISC-V extensions (AES, Zfa, CMOs, Scalar Crypto. etc.) The automation pipeline can also expand on the turbofan micro assembler /codegen for identifying optimization techniques.
What do you (the developers) think of subsituting some parts of the code with an automated system? Do you also believe it can this support v8's motives and its connection with the ecosystem? I can already identify the countless
TODOs in the disassembler that might help from the UDB.
With warm regards,
Yash