[PATCH v2 0/4] Allwinner H6 RSB support

[Samuel Holland]

The Allwinner H6 SoC contains an RSB controller. It is almost completely
undocumented, so it was missed when doing the initial SoC bringup.

This series adds the clock/reset, pin configuration, and device tree
node needed to use the RSB controller. Since RSB is faster, simpler, and
generally more reliable than the I2C controller IP in the SoC, switch to
using it where possible.

This was tested on an Orange Pi 3 and a Pine H64 model B. This series
does not switch the Pine H64 to use RSB, as doing so would prevent
accessing the external RTC that shares the I2C bus.

Changes v1->v2:
- Put the new values at the end of the DT binding headers

Samuel Holland (4):
clk: sunxi-ng: h6-r: Add R_APB2_RSB clock and reset
pinctrl: sunxi: h6-r: Add s_rsb pin functions
arm64: dts: allwinner: h6: Add RSB controller node
arm64: dts: allwinner: h6: Use RSB for AXP805 PMIC connection

.../dts/allwinner/sun50i-h6-beelink-gs1.dts | 38 +++++++++----------
.../dts/allwinner/sun50i-h6-orangepi-3.dts | 14 +++----
.../dts/allwinner/sun50i-h6-orangepi.dtsi | 22 +++++------
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 19 ++++++++++
drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c | 5 +++
drivers/clk/sunxi-ng/ccu-sun50i-h6-r.h | 2 +-
drivers/pinctrl/sunxi/pinctrl-sun50i-h6-r.c | 2 +
include/dt-bindings/clock/sun50i-h6-r-ccu.h | 2 +
include/dt-bindings/reset/sun50i-h6-r-ccu.h | 1 +
9 files changed, 67 insertions(+), 38 deletions(-)

--
2.26.2

[Samuel Holland]

On boards where the only peripheral connected to PL0/PL1 is an X-Powers
PMIC, configure the connection to use the RSB bus rather than the I2C
bus. Compared to the I2C controller that shares the pins, the RSB
controller allows a higher bus frequency, and it is more CPU-efficient.

Signed-off-by: Samuel Holland <sam...@sholland.org>
---

.../dts/allwinner/sun50i-h6-beelink-gs1.dts | 38 +++++++++----------
.../dts/allwinner/sun50i-h6-orangepi-3.dts | 14 +++----
.../dts/allwinner/sun50i-h6-orangepi.dtsi | 22 +++++------

3 files changed, 37 insertions(+), 37 deletions(-)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
index 7c9dbde645b5..3452add30cc4 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
@@ -150,12 +150,28 @@ &pio {
vcc-pg-supply = <&reg_aldo1>;
};

-&r_i2c {
+&r_ir {
+ linux,rc-map-name = "rc-beelink-gs1";
+ status = "okay";
+};
+
+&r_pio {
+ /*
+ * FIXME: We can't add that supply for now since it would
+ * create a circular dependency between pinctrl, the regulator
+ * and the RSB Bus.
+ *
+ * vcc-pl-supply = <&reg_aldo1>;
+ */
+ vcc-pm-supply = <&reg_aldo1>;
+};
+
+&r_rsb {
status = "okay";

- axp805: pmic@36 {
+ axp805: pmic@745 {
compatible = "x-powers,axp805", "x-powers,axp806";
- reg = <0x36>;
+ reg = <0x745>;
interrupt-parent = <&r_intc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
@@ -273,22 +289,6 @@ sw {
};
};

-&r_ir {
- linux,rc-map-name = "rc-beelink-gs1";
- status = "okay";
-};
-
-&r_pio {
- /*
- * PL0 and PL1 are used for PMIC I2C
- * don't enable the pl-supply else
- * it will fail at boot
- *
- * vcc-pl-supply = <&reg_aldo1>;
- */
- vcc-pm-supply = <&reg_aldo1>;
-};
-
&rtc {
clocks = <&ext_osc32k>;
};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
index 15c9dd8c4479..16702293ac0b 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
@@ -175,12 +175,16 @@ &pio {
vcc-pg-supply = <&reg_vcc_wifi_io>;
};

-&r_i2c {
+&r_ir {
+ status = "okay";
+};
+
+&r_rsb {
status = "okay";

- axp805: pmic@36 {
+ axp805: pmic@745 {
compatible = "x-powers,axp805", "x-powers,axp806";
- reg = <0x36>;
+ reg = <0x745>;
interrupt-parent = <&r_intc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
@@ -291,10 +295,6 @@ sw {
};
};

-&r_ir {
- status = "okay";
-};
-
&rtc {
clocks = <&ext_osc32k>;
};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi
index ebc120a9232f..23e3cb2ffd8d 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi
@@ -112,12 +112,20 @@ &pio {
vcc-pg-supply = <&reg_aldo1>;
};

-&r_i2c {
+&r_ir {
+ status = "okay";
+};
+
+&r_pio {
+ vcc-pm-supply = <&reg_bldo3>;
+};
+
+&r_rsb {
status = "okay";

- axp805: pmic@36 {
+ axp805: pmic@745 {
compatible = "x-powers,axp805", "x-powers,axp806";
- reg = <0x36>;
+ reg = <0x745>;
interrupt-parent = <&r_intc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
@@ -232,14 +240,6 @@ sw {
};
};

-&r_ir {
- status = "okay";
-};
-
-&r_pio {
- vcc-pm-supply = <&reg_bldo3>;
-};
-
&rtc {
clocks = <&ext_osc32k>;
};
--
2.26.2

[Chen-Yu Tsai]

Hi,

On Sun, Jan 03, 2021 at 04:00:03AM -0600, Samuel Holland wrote:
> The Allwinner H6 SoC contains an RSB controller. It is almost completely
> undocumented, so it was missed when doing the initial SoC bringup.
>
> This series adds the clock/reset, pin configuration, and device tree
> node needed to use the RSB controller. Since RSB is faster, simpler, and
> generally more reliable than the I2C controller IP in the SoC, switch to
> using it where possible.
>
> This was tested on an Orange Pi 3 and a Pine H64 model B. This series
> does not switch the Pine H64 to use RSB, as doing so would prevent
> accessing the external RTC that shares the I2C bus.
>
> Changes v1->v2:
> - Put the new values at the end of the DT binding headers
>
> Samuel Holland (4):
> clk: sunxi-ng: h6-r: Add R_APB2_RSB clock and reset
> pinctrl: sunxi: h6-r: Add s_rsb pin functions
> arm64: dts: allwinner: h6: Add RSB controller node
> arm64: dts: allwinner: h6: Use RSB for AXP805 PMIC connection

I queued up patches 1, 3, and 4 locally for v5.12. Obviously this won't
work unless the pinctrl patch is also queued up, so they won't be pushed
out until that happens.

Regarding patch 3, I replaced the clock and reset macros with raw
numbers to get rid of cross-tree dependencies. The following fix
will be posted for v5.12 later on during its RC cycle.

------------------------ >8 ------------------------

commit 0b4781666adc5e19c4d4fb4a2bff33883181cc39
Author: Chen-Yu Tsai <we...@csie.org>
Date: Mon Jan 4 16:19:17 2021 +0800

arm64: dts: allwinner: h6: Switch to macros for RSB clock/reset indices

The macros for the clock and reset indices for the RSB hardware block
were replaced with raw numbers when the RSB controller node was added.
This was done to avoid cross-tree dependencies.

Now that both the clk and DT changes have been merged, we can switch
back to using the macros.

Signed-off-by: Chen-Yu Tsai <we...@csie.org>

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index d897697849d6..b043beea8e6e 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -988,9 +988,9 @@ r_rsb: rsb@7083000 {
compatible = "allwinner,sun8i-a23-rsb";
reg = <0x07083000 0x400>;
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&r_ccu 13>;
+ clocks = <&r_ccu CLK_R_APB2_RSB>;
clock-frequency = <3000000>;
- resets = <&r_ccu 7>;
+ resets = <&r_ccu RST_R_APB2_RSB>;
pinctrl-names = "default";
pinctrl-0 = <&r_rsb_pins>;
status = "disabled";
------------------------ >8 ------------------------

>
> .../dts/allwinner/sun50i-h6-beelink-gs1.dts | 38 +++++++++----------
> .../dts/allwinner/sun50i-h6-orangepi-3.dts | 14 +++----
> .../dts/allwinner/sun50i-h6-orangepi.dtsi | 22 +++++------
> arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 19 ++++++++++
> drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c | 5 +++
> drivers/clk/sunxi-ng/ccu-sun50i-h6-r.h | 2 +-
> drivers/pinctrl/sunxi/pinctrl-sun50i-h6-r.c | 2 +
> include/dt-bindings/clock/sun50i-h6-r-ccu.h | 2 +
> include/dt-bindings/reset/sun50i-h6-r-ccu.h | 1 +
> 9 files changed, 67 insertions(+), 38 deletions(-)
>
> --
> 2.26.2
>

> --
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[André Przywara]

On 03/01/2021 10:00, Samuel Holland wrote:
> On boards where the only peripheral connected to PL0/PL1 is an X-Powers
> PMIC, configure the connection to use the RSB bus rather than the I2C
> bus. Compared to the I2C controller that shares the pins, the RSB
> controller allows a higher bus frequency, and it is more CPU-efficient.

But is it really necessary to change the DTs for those boards in this
way? It means those newer DTs now become incompatible with older
kernels, and I don't know if those reasons above really justify this.

I understand that we officially don't care about "newer DTs on older
kernels", but do we really need to break this deliberately, for no
pressing reasons?

Cheers,
Andre

P.S. I am fine with supporting RSB on H6, and even using it on new DTs,
just want to avoid breaking existing ones.

[Samuel Holland]

On 1/4/21 4:54 AM, André Przywara wrote:
> On 03/01/2021 10:00, Samuel Holland wrote:
>> On boards where the only peripheral connected to PL0/PL1 is an X-Powers
>> PMIC, configure the connection to use the RSB bus rather than the I2C
>> bus. Compared to the I2C controller that shares the pins, the RSB
>> controller allows a higher bus frequency, and it is more CPU-efficient.
>
> But is it really necessary to change the DTs for those boards in this
> way? It means those newer DTs now become incompatible with older
> kernels, and I don't know if those reasons above really justify this.
>
> I understand that we officially don't care about "newer DTs on older
> kernels", but do we really need to break this deliberately, for no
> pressing reasons?

That's a reasonable concern. I am fine if you want to delay or drop patch 4.

Cheers,
Samuel

[Maxime Ripard]

On Sun, Jan 03, 2021 at 04:00:03AM -0600, Samuel Holland wrote:

> The Allwinner H6 SoC contains an RSB controller. It is almost completely
> undocumented, so it was missed when doing the initial SoC bringup.
>
> This series adds the clock/reset, pin configuration, and device tree
> node needed to use the RSB controller. Since RSB is faster, simpler, and
> generally more reliable than the I2C controller IP in the SoC, switch to
> using it where possible.
>
> This was tested on an Orange Pi 3 and a Pine H64 model B. This series
> does not switch the Pine H64 to use RSB, as doing so would prevent
> accessing the external RTC that shares the I2C bus.
>
> Changes v1->v2:
> - Put the new values at the end of the DT binding headers
>
> Samuel Holland (4):
> clk: sunxi-ng: h6-r: Add R_APB2_RSB clock and reset
> pinctrl: sunxi: h6-r: Add s_rsb pin functions
> arm64: dts: allwinner: h6: Add RSB controller node
> arm64: dts: allwinner: h6: Use RSB for AXP805 PMIC connection

For the whole series,

Acked-by: Maxime Ripard <mri...@kernel.org>

Thanks!
Maxime

[Maxime Ripard]

On Mon, Jan 04, 2021 at 10:54:19AM +0000, André Przywara wrote:
> On 03/01/2021 10:00, Samuel Holland wrote:
> > On boards where the only peripheral connected to PL0/PL1 is an X-Powers
> > PMIC, configure the connection to use the RSB bus rather than the I2C
> > bus. Compared to the I2C controller that shares the pins, the RSB
> > controller allows a higher bus frequency, and it is more CPU-efficient.
>
> But is it really necessary to change the DTs for those boards in this
> way? It means those newer DTs now become incompatible with older
> kernels, and I don't know if those reasons above really justify this.
>
> I understand that we officially don't care about "newer DTs on older
> kernels", but do we really need to break this deliberately, for no
> pressing reasons?
>

> P.S. I am fine with supporting RSB on H6, and even using it on new DTs,
> just want to avoid breaking existing ones.

Doing so would also introduce some inconsistencies, one more thing to
consider during reviews, and would require more testing effort.

I'm not sure that stretching our - already fairly sparse - resources
thin would be very wise here, especially for something that we don't
have to do and for a setup that isn't really used that much.

Maxime

[Chen-Yu Tsai]

As soon as some software component starts running RSB, (which I assume
is what Samuel is planning to do in Crust?), there's a chance that it
doesn't switch the chip back to I2C. And then Linux won't be able to
access it.

So I'm for keeping things consistent and converting all users to RSB.


ChenYu

[Samuel Holland]

Crust can handle either way via a config option, which currently
defaults to I2C for H6. It must use the same selection as Linux, not
only because of the PMIC mode, but also because of the pinctrl.

TF-A is already converted to use RSB[1], and it does switch the PMIC
back to I2C before handing off to U-Boot[2]. So new TF-A + old Linux is
fine. However, Linux currently does not switch the PMIC back. So the
most likely problem from this patch is that, with new Linux + old TF-A,
TF-A will be unable to power down the board or access regulators after
an SoC reset.

I expect there will be a TF-A release between now and when 5.12 hits
stable, but people tend not upgrade their U-Boot/TF-A very often.

We could solve this by having the Linux RSB driver switch all child
devices back to I2C in .shutdown, or by dropping this patch and only
using RSB for new boards (which would also address Andre's concern).

Cheers,
Samuel

[1]: https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/7576
[2]: https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/7575

[Chen-Yu Tsai]

Could Crust be made to also handle pinctrl?

> TF-A is already converted to use RSB[1], and it does switch the PMIC
> back to I2C before handing off to U-Boot[2]. So new TF-A + old Linux is
> fine. However, Linux currently does not switch the PMIC back. So the
> most likely problem from this patch is that, with new Linux + old TF-A,
> TF-A will be unable to power down the board or access regulators after
> an SoC reset.
>
> I expect there will be a TF-A release between now and when 5.12 hits
> stable, but people tend not upgrade their U-Boot/TF-A very often.
>
> We could solve this by having the Linux RSB driver switch all child
> devices back to I2C in .shutdown, or by dropping this patch and only
> using RSB for new boards (which would also address Andre's concern).

This will work for most cases, except in a kernel panic or IIRC direct
reboot using sysrq. So it's not robust as we'd like it to be.

ChenYu

> Cheers,
> Samuel
>
> [1]: https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/7576
> [2]: https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/7575
>
> > So I'm for keeping things consistent and converting all users to RSB.
> >
> >
> > ChenYu
> >
>

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[Chen-Yu Tsai]

I also wonder what would happen when there are multiple RSB devices, and
we switch them back to I2C one by one. It's not like there's an option
to switch all of them back at the same time, unlike switching from I2C
to RSB. The A80 and A83T are the platforms that would be affected.

So I merged the previous patch, i.e. changes to the .dtsi, but I think
we should delay this one by a release. That would give us more time to
think about it, and let users upgrade U-Boot/TF-A.

ChenYu

[Maxime Ripard]

On Sun, Jan 03, 2021 at 04:00:07AM -0600, Samuel Holland wrote:
> On boards where the only peripheral connected to PL0/PL1 is an X-Powers
> PMIC, configure the connection to use the RSB bus rather than the I2C
> bus. Compared to the I2C controller that shares the pins, the RSB
> controller allows a higher bus frequency, and it is more CPU-efficient.
>
> Signed-off-by: Samuel Holland <sam...@sholland.org>

Applied, thanks

Maxime