Question on Pennylane gain

[Ravi Miranda]

Hi All,

Not sure if this is the right forum for this, but a good place to
start, I suppose.

I chanced upon this:
https://openhpsdr.org/wiki/images/3/31/Pennylanea1.pdf from K6JCA's
site https://k6jca.blogspot.com/2017/09/an-fpga-sdr-hf-transceiver-part-9-50-db.html

Considering the OPA2674 amplifier - Can someone explain how the gain
of the two stages can be calculated - wrt the Pennylane design and how
would this be validated? If I did load the output with 50ohms would
that be correct?

I'm trying to drive a pair of RD16HHF1s post this stage, so if this
stage does provide 1W out? Or better still would I get from 1mW to
1Watt?

Many thanks,

Best 73,

Ravi/G1RVI

--
I'm here to add more value to the world than I'm using up.

[Clifford Heath]

I calculate the voltage gain of this differential configuration as twice the gain of each side, which is the feedback resistor divided by half the resistor which couples the two inputs.

The first stage has a gain of 2*330/(150/2) or 8.8

The second stage has a gain of 2*470/(1800/2) or 1.04, a buffer stage.

Overall power gain is 19dB.

Maximum power output is limited by supply voltage and slew rate, I suspect, but you can check that. It will also depend on the baluns used. 

Clifford Heath 

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[Ravi Miranda]

Thank you, that is indeed helpful. 

So if I got this right, I would need another preamp before this to get another 10dbm.

So 1mW = 0dbm and I need 30dbm, this stage gives me about 20dbm, I could use a Mini circuits device to get me the additional gain required but add a correct attenuator. OR maybe just increase the gains of the OPA2674 as done by K6JCA.

Would this be the correct way to proceed?

Best 73,

Ravi/G1RVI

I'm here to add more value to the world than I'm using up.