Need Help with VFD Power supply

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Eric1180

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Aug 7, 2011, 2:02:10 PM8/7/11
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I plan on using a 555 or a AP34063 and i have a IRF510. But i don't know what to adjust to get the voltage down. I think the plans you use to make Nixie power supplies are called MK1.5 or MK2. it would be easier to figure out what to adjust if i have a IRF710 and and i could just tinker around till i find out what controls the voltage but since the IRF510 Transistor i have cant handle 170v i don't know what to adjust. 

Could some one point me in the right direction or tell me what to adjust. Thanks a lot.

Adam Jacobs

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Aug 7, 2011, 2:26:49 PM8/7/11
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On the MK1.5 circuit (and the MK2 circuit, since it is basically the same plus another transistor driver [I think.. I haven't looked lately])... It's easy. There is a resistor divider circuit that provides feedback from the power supply's output back to one of the pins on the MC34063(AP34063), I think it is the "sense" pin.. I can't find the schematic for this circuit because for some reason, Mike's skydrive nor the nixie file archive are crawlable by google. This is a big problem for the world at large! I'll figure out a way to get this schematic on google, no reason it shouldn't be [grumble,grumble - no wonder everyone thinks it is either 555 or MAX1771]..

Anyways, this pin sense pin is very simple. If it sees more than 1.25v, then it turns down the output, if it sees less than 1.25v it turns UP the output. So, you'll see a resistor divider circuit that is calculated to turn your target output voltage into 1.25v. Just adjust those 2 resistors so that your new target output voltage shows 1.25v to the sense pin on the MC34063. All done. No problem. I used the MC34063 for the powersupply in my VFD clocks as well, it was a breeze (thanks to Mike). I have no clue how this is accomplished with the 555 circuit, I'd guess either an advanced engineering degree or trial&error. [joking]. :)

I was up all last night getting my new 80m antenna working [g7fek], so I just woke up. Sorry for the strange sense of humor & attitude.

-Adam

On Sun, Aug 7, 2011 at 11:02 AM, Eric1180 <ericmer...@gmail.com> wrote:
I plan on using a 555 or a AP34063 and i have a IRF510. But i don't know what to adjust to get the voltage down. I think the plans you use to make Nixie power supplies are called MK1.5 or MK2. it would be easier to figure out what to adjust if i have a IRF710 and and i could just tinker around till i find out what controls the voltage but since the IRF510 Transistor i have cant handle 170v i don't know what to adjust. 

Could some one point me in the right direction or tell me what to adjust. Thanks a lot.

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Quixotic Nixotic

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Aug 7, 2011, 4:21:54 PM8/7/11
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On 7 Aug 2011, at 19:02, Eric1180 wrote:

> I plan on using a 555 or a AP34063 and i have a IRF510. But i don't
> know what to adjust to get the voltage down. I think the plans you
> use to make Nixie power supplies are called MK1.5 or MK2. it would

> be easier to figure out what to adjust if i have a IRF710 and...

I can tell you that the standard 555 circuit that works for nixies
works just fine for VFDs too, if you adjust those two feedback
divider resistors. I can look up what I used before for you, if needs
be.

Most VFD circuits end up being multiplexed in some way, but you may
be driving individual tubes of some unspecified kind, directly. You
don't always know what final voltage you need, so some variable
resistor in that feedback divider is very useful. Once you know what
values work for your setup, you could replace them with fixed values.
Unless you need to be able to adjust brightness to suit ambient
changes in lighting.

> ...and i could just tinker around till i find out what controls the

> voltage but since the IRF510 Transistor i have cant handle 170v i
> don't know what to adjust.

Sorry? What VFDs are you driving that need 170v? Most kick in at
around 25v, but often might need around 40v if you are multiplexing a
set of tubes, or one of the Russian IV-18 type 9-digits-in-one-tube
kind of a VFD setup.

As always, you will get more help from the group if you state what
exactly you have and are trying to do with the parts at your
disposal. This group is a mine of information, most of it very
useful, always entertaining.

The best idea I saw so far was one Chris 'Fixitsan' Barron came up
with. His concept used a PIC's PWM output to drive the FET. The
feedback voltage was measured by the PIC and the duty cycle of the
PWM pulse increased until the voltage was seen to decrease again,
indicating saturation of the FET. The mark/space duty cycle ratio is
then backed off a few pips and the system has thus self-optimised its
efficiency. This system could cater automatically for a range of
differing inductor values.

In fairness, and if my memory is correct, Nicko, our chief moderator,
suggested that driving a FET from a PIC output could stress the PIC
output gate in ways a PIC didn't ought to be stressed and that
current sensing and back EMF diodes should be incorporated. I am not
the right person to speak about such things but I for one would
appreciate a lesson from the experts in this group on such a topic.

In balance I should say that I have seen a variety of nixie clock
kits, pre-built or otherwise, driving FETs from a PIC gate so I
suspect they work just fine. Has anyone experience of these causing
long-term issues for the PIC in any way?

John S

Eric1180

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Aug 8, 2011, 12:10:57 AM8/8/11
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WoW funny i just went out on my own and made a adjustable PS using only 4 passive: capacitor inductor  resistor and diode. And 2 active: a transistor and Arduino. I think you misunderstood what i said about 170v. All i was saying was all of the plans i have found put out 170v and i was simply saying i couldn't even try to tinker around to find out what controls the voltage because the transistor i have is limited to 100v so.. 

i will be multiplexing i got all of that down i was just looking for some plans but now that i have figured out a easier way i think i am just going to use PWM from the Arduino and maybe i will make it self correcting eventually.
Thats funny that you brought up the method using the pic to control it because i hadn't heard of it before and when i tried mine out on my own and it worked i was like WoW this is a lot easier. 
So the one that i made so far takes 3 volts and puts out 45v and it is driving a spare VFD display i got from a calculator. 

Nick

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Aug 8, 2011, 12:32:15 AM8/8/11
to neonixie-l


On Aug 7, 9:21 pm, Quixotic Nixotic <nixot...@blueyonder.co.uk> wrote:

> In fairness, and if my memory is correct, Nicko, our chief moderator,  
> suggested that driving a FET from a PIC output could stress the PIC  
> output gate in ways a PIC didn't ought to be stressed and that  
> current sensing and back EMF diodes should be incorporated. I am not  
> the right person to speak about such things but I for one would  
> appreciate a lesson from the experts in this group on such a topic.

Its one of those cases where you may well get away with it for years,
or you may not!

Due to internal capacitances inherent in all transistor types,
negative going pulses will be induced onto the gate of the driving FET
when it turns on or off. When generating 40V or so for a VFD, this is
not generally an issue, but when generating 180V for nixies, these can
be many volts below GND. PICSs and AVRs are generally not good at
handling these incursions, so the addition of a small diode between
the gate and ground (cathode to the gate) will protect the uP port -
this is not the same as the ESD protection most (not all) uP ports
have.

Nick

jb-electronics

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Aug 8, 2011, 3:09:04 AM8/8/11
to neoni...@googlegroups.com, Nick

Nick,

> Due to internal capacitances inherent in all transistor types,

> negative going pulses will be induced [...]

Do you really mean capacitance and not inductance? I do not see how
capacitors would "induce" and kind of voltage. Or do you mean the
capacitors' parasitic inductances?

Regards,
Jens

Nick

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Aug 8, 2011, 4:35:20 AM8/8/11
to neonixie-l
No - its all to do with the FET and I really mean capacitance - there
are parasitic capacitances between the gate, drain & source of a FET -
these couple the switching transients back to the gate, where they can
cause problems for I/O ports. FET driver chips are specifically
designed to be protected against these transients - I/O ports of uPs
generally are not. You may get away with it. You may not.

The key FET capacitance modelling parameters are:
Cgs is the capacitance between gate & source.
Cgd is the capacitance between gate & drain.
Cds is the capacitance between drain & source.

Your FET data sheets quote:
Ciss which is Cgs in parallel with Cgd
Coss which is Cds in parallel with Cgd
Crss which is the same as Cgd.

Cgd is small compared with Cds, so Coss is almost the same as Cds

You can see that Cgd and Cgs have the capability to couple EMI back to
the gate. If you have a 'scope, stick it on the gate of the FET whilst
its generating 180V under load.

Correct engineering practice is not to "Muntz" the schematic!
(*) http://en.wikipedia.org/wiki/Madman_Muntz

Nick

Eric1180

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Aug 8, 2011, 3:37:54 PM8/8/11
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Thanks for explaining the resistor divider part to me i understand it now :D
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