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See my wiki article. Tx is same and rx is 8:1 with no center tap. Also, I skipped the rx filter. Not performing well.
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Was thinking that a measurement with hand wound toroids would be another data point.
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Perhaps the Q of the hand wound toroid is significant?
Perhaps the Q of the hand wound toroid is significant?
On Mon, Nov 23, 2015, 6:04 PM kf5kog <stewk...@gmail.com> wrote:
On Mon, Nov 23, 2015 at 6:53 PM, Glenn P <glen...@gmail.com> wrote:
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Glenn,
The total thickness is 1.6mm so your typical is correct. The layout is filters on top, copper on next, power on next and control traces on the bottom, for the most part.
for that pcb layup, the calculated track width for a 50R track is approx 20mils (0.5mm) . I doubt that at HF, though there is much to gain by changing it from whatever it is now.
In a past life at higher freqs we used to clear the layer down to reduce capacitance effects but I think the relatively small 'C' induced will be swamped by the filter values anyway in most cases.
Hello Stew,
why the TX out at 29 MHz reads out at about -7 dBm? Is
there an attenuation/offset in the readings that needs to be taken into
account?
For comparison I'm enclosing a couple of pictures taken
with my setup, which is slightly different than yours (for T1), hope
this does not add confusion:
H-L
with v1.2 Basic Frontend, TX transformer T1 there with a 4 turn
winding and a 6 turns with center tap on a BN-43-2402 core, 100 ohm
termination on the AD9866 IOUT output (R2) . TX output filter on the frontend board 100p, 330n, 200p, 390n, 200p, 330n, 100p, no ground braid added.
TX at 29.0 MHz, power output +10 dBm, which is slightly below the maximum I can get with this configuration.
Spectrum without the TX filter (directly at the T1 output):
As you can see, I have no 7.509 MHz spur, but I can see the 44.728 MHz one (and the 2.456 MHz is maybe a couple of db higher with the filter)...
73 de Claudio, IN3OTD / DK1CG
Hi Glen,Thanks for the ;measurements and reports. They are very informative.Do you think your ~150 MHz spur could be 73.728*2=147.456 MHz? In the full-duplex version, this clock is generated on the interface of the FPGA and may be radiating some. You could try shielding the Hermes-Lite. You could also try the half-duplex firmware as that runs on v 1.22 too.It is interesting that you see a reduction in the 2.4 MHz spur for power reduction. My experiment where I did not see reduction in this aliased back DAC spurs was for the 22.981 MHz spur when TX at 24.895. What behavior do you see at that frequency? Other differences are the 100 Ohm resistor, and the reconstruction LPF in place.With my build of the LPF (100p, 330nh,200p,390nH,200p,330nH,100p) using AIML inductors, I see losses in the filter from about 1 dB on 40 M to 4 dB on 10 M. It doesn't appear that others see this. Is that true? There may be a problem with my build.73,SteveKF7O
snipped:
OK Steve, the spur is not 2x 73.728. It appears to be the 3rd harmonic of the LAN interface xtal (50MHz) Touching around the xtal brings the level up and down.
I did a test at 24.895MHz and can see what appears to be your alias of 22.981MHz although the marker is a little out in reading freq. (but centre marker is ok so not sure) Dropping drive to reduce the wanted signal by 10dB also drops the '22.891' a like amount, or very close, 11dB
The closer in spurs appeared also at the 29MHz test and are approx +- 1MHz from wanted signal.
RE the reconstruction filter, i recall that doing an analysis of it using RFSim99 shows that this filter does have a fair degree of loss approaching 30MHz. Tolerances may affect this even more. My build uses a 390nH supplied by John and 330nH WW from my collection.
You may note that I actually get more output (+11dBm at 24.895MHz) than what I was getting in other tests at 29MHz which would confirm a roll-off higher up..
Hello,
I have measured the output level of some harmonics and
spurs/images when varying the fundamental output level. I have used the
Quisk routines for the "spot level" control to change the TX output from
0 to 1000, with the TX frequency fixed at 29 MHz. Level were recorded
without the TX output filter, i.e. just after the T1 transformer on the
V1.2 frontend.
With the spot level at 1000 I get around 13 dBm, while for having 10 dBm the level to use is around 665 here. As known, the output spectrum degrades rapidly when going towards the maximum output power.
Graphs and the full data file are also on my website.
I'll try to do the same graphs for the TxDAC output.
73 de Claudio, IN3OTD / DK1CG
Hi Glen,
Can't answer now, away from computer, but errata article is correct.
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yes, if I understood the code correctly, the spot level changes the DC level at baseband, right?
The TX power level was fixed at 255 but I can try to run a test varying it; I guess this control has a more limited range looking at the AD9866 datasheet
For the TxDAC testing, if I understood correctly, I need to change the AD9866 init code (the part done in MyHDL); last time I looked at that it was not so clear to me how it worked...
Hello,
by popular demand (hi), here are the fundamental, harmonics spurs, etc, vs the TX drive level (C1 byte for C0=0b00010011).
TX frequency was 29 MHz, spot level at max (1000). As before, the measurements were done
without the TX output filter, i.e. just after the T1 transformer on the
V1.2 frontend.
First graph is the fundamental alone, just to show the bigger step at the end (note the small downward slope there, initially I thought it was a thermal drift, but apparently it's not)
Hi Claudio,Thanks for the measurements. I always appreciate your clear graphs. I too would be interested in the differences when adjusting TX power versus DAC amplitude. The TX power range should be ~19 dB. If you alter ad9866.py, you have to "compile" and generate Verilog that Quartus consumes. You can also hack the verilog file ad9866.v.73,SteveKF7O
...sorry for the repeated postings,
I thought it was interesting to
show how the graphs look like when plotted in dBc, i.e. level of the
harmonics/products/spurs w.r.t the fundamental level.
It turns out
that the TxDAC is actually cleaner when at maximum gain (in general) (while increasing the IAMP gain causes a increase in the distortion, as expected):
Hello Jim,
I have now done some measurements on the TxDAC output, with the IAMP disabled, using a center-tapped 1:1 transformer, as described in your post and in the AD9866 datasheet. The TX frequency was 28.895 MHz this time. Indeed, the output of the TxDAC alone is much cleaner:
Hello Jim,
here is the TxDAC output vs. common-mode bias (on the transformer center tap).
The TX frequency was 24.895 MHz, output power at max (around 5 dBm), which is more than the 0.4 V peak you mentioned, but should give some margin, hi.
As you can see, the 2*fs-5*ftx spur is fine until about 0.6/0.7 V bias.