Hermes Lite V2 I/O Beta test`s Pictures
1.
The fan works correctly according to the temperature plan.
I cannot present the test results about temperature reduction in closed housing because other tests and the development of pure signal feedback are still underway.
But my suggestion is for the fan to turn off when it reaches 35 degrees (34.9) instead of 30 degrees as it is now. Because he spins and blows all the time. HL2 rarely goes below 30 degrees.
But the temperature between 30 and 35 degrees is very safe. There is no need to cool in this temperature range from 30 to 35 degrees Celsius. Therefore, setting the fan to turn off already at 35 degrees would be a good solution
PS. Fan control can be also very useful if somebody wants to implement a modular design (HL2 as one of the modules in a larger housing) Then this system can control the fan in this larger housing. This means HL2 in one larger casing with other devices (e.g. PA, SBC, etc.). Placed in such a way and so connected that after removing it is an independent device that can be taken into the field.
At the time, when HL2 is inserted into a larger housing together with other devices, it can control a larger fan that cools other devices (modules) inside.
2.
A small modification of the pure signal feedback board has been done.
holes have been drilled and the connector inside so there is no connection with the filter board and the plate can be aligned towards the filters. The goal was to slide it away from the power amplifier impedance transformer on LDMOS. Potentiometer installed in place of a 1 kOhm resistor (Pi configuration ) for the purpose of small experiments.
73 Jozef, LB1HIHi Steve and all in beta test group,
It is difficult to determine how the distance between the pure
signal/pre-distortion board and the transformer / LDMOS output
transistors has an impact on the internal feedback level, especially in
the higher bands, because internal feedback is so large that it "covers"
the perception of possible changes.
I plan to carry out tests with disconnected internal feedback
(de-soldered L10 and L11). Not only the difference between the sampler signals and internal feedback is concerned, but also the phase difference.
Nevertheless, placing a small PS board away from LDMOS since space is present seems logically reasonable.
Depending on the results, the next ones will look for possible other solutions. The first casual thought is the RF switch/relay between RF4 and
RF5. But I leave it for the next days only after completing the tests to
determine whether mixing the signal from local feedback with the signal
from the RF sampler has a significant impact on the operation of the
Pure signal algorithm (signal level/phase difference)
73,
Jozef, lb1hi
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Internal crosstalk coupling alone. PS on:
20-meter band- S-ATT jumps at 9 dB,
10-meter S-ATT automatically turns on 11dB attenuation.
Hi,
Internal crosstalk
feedback was not from the L10 and L11 low pass coils of the anti-alias filter.
Internal crosstalk feedback was not derived from proximity of small pure signal board or jumper header internal wiring. to the LDMOS PA transformer
Internal crosstalk
feedback comes from the K2 relay.
Temporarily
de soldering J1 diminished crosstalk dramatically.
How to fix
this problem? (with ensuring the receiving path)
73,
Jozef, lb1hi
Hi Steve,
Changes in the R4 value caused a change in the input impedance from the FPGA side. But there was no need to change and increase it because with a 1 kOhm resistor, the impedance was already about 300 Ohm in the 10 meter band which is sufficient to prevent the pure signal feedback from influencing the receiving line during RX. I stay at 1 kOhm and I will replace the potentiometer with an SMD resistor.
The S21 measurement gave a value of 20.5 dB attenuation. And with this value I remain. I will eventually change the ATT value for example, to 10dB Attenuation sometime in the future to have the possibility of adjusting attenuation it in the wider range with an external attenuator.
The small pure signal board works well and fulfills its role as it should. It gives us two options It gives two options for the signal delivery to rx ADC input (FPGA).. One option without any modification via the header jumper. And the second is to add a second SMA socket and lead the signal with a thin coax to the uFL RF5 connector. From my side, the beta test of the small PS board can be considered as already completed.
73, Joe, lb1hi
Pictures below
As a follow-up to the beta test. Additional tests are still planned to look for the best software settings and attenuation values, etc. For power levels of 50 watt and above. Previous tests were carried out barefoot. (5 Watt)
(e.g test for the effect of mixing the rf sampler signals with the internal crosstalk signal on the quality of pure signal/predistortion operation)
Steve, what to take next?