Alpha Release!

[Chris McClelland]

I have added a bunch of new features, some of which may be of immediate
interest to several people, so I made a quick "alpha"-quality release
(sorry only x86 & x64 architectures included):

http://www.swaton.ukfsn.org/bin/fpgalink-20130321/fpgalink-bin.tar.gz

The new features are:

* Support for FX2 chips (CY7C68013) as well as FX2LP (CY7C68013A).
* Support for Xilinx Slave Serial & Parallel (SelectMAP) programming.
* Support for Aessent AES220 FPGA module.
* Support JTAG using bits from several different ports.
* Can now reconfigure JTAG port lines at runtime.
* Low-level JTAG API exposed.
* More intuitive port configuration.
* The comm_fpga_fx2 module can now hold the FPGA design in RESET until
the host tells it to start.

Here's a quick demonstration of some of the new features:

http://pastebin.com/raw.php?i=jXDe8DgQ

Naturally I will properly document everything; in the meantime here are
a few hints as to the meaning of the flcli options:

-d D7+,D5-,D0/

This sets:
* PD7 as an output, driven high
* PD5 as an output, driven low
* PD0 as an input (i.e tri-stated)

-q A7A0A3A1

This queries the JTAG chain, using:
* TDO: PA7
* TDI: PA0
* TMS: PA3
* TCK: PA1

-p J:D0D2D3D4:fx2all-nexys2-1200.xsvf

This programs the FPGA using JTAG, using:
* TDO: PD0
* TDI: PD2
* TMS: PD3
* TCK: PD4

-p XS:D0D5D1D6A7:[D3/,B1+,B5+,B3+]:fx2all-aes220.bin

This programs the FPGA using Xilinx Slave Serial mode, using:
* PROG_B: PD0
* INIT_B: PD5
* DONE: PD1
* CCLK: PD6
* DIN: PA7
* DOUT: PD3 (tri-stated during configuration)
* M[2:0]: PB[1,5,3] ("111" [=slave serial] during configuration)

-p XP:D0D5D1D6A01234567:[B4-,D2-,D3/,B1+,B5+,B3-]:fx2all-aes220.bin

This programs the FPGA using Xilinx Slave Parallel (SelectMAP), using:
* PROG_B: PD0
* INIT_B: PD5
* DONE: PD1
* CCLK: PD6
* D[7:0]: PA[7:0]
* RDWR_B: PB4 (driven low during configuration)
* CSI_B: PD2 (driven low during configuration)
* DOUT: PD3 (tri-stated during configuration)
* M[2:0]: PB[1,5,3] ("110" [=slave parallel] during configuration)

There's still a fair bit of work outstanding, on the AVR firmware, docs,
etc. Apologies that this is not a polished release, but I thought it
would be more useful to get something out now. Give it a try, let me
know what you think.

Chris

[fitzsnaggle]

Hi Chris,

I have tried this version of flcli and it is working well.

I've been trying to get the python bindings for this release and 2012-12-21 to work on linux 32 bit.
However, when I import fpaglink2 I get an error that the libfpgalink.so has not been found.

LD_LIBRARY_PATH=../../lin.x86/rel python
>> from fpgalink2 import *
...
OSError: ../../lin.x86/rel/libusbwrap.so: undefined symbol: libusb_error_name

LD_LIBRARY_PATH=../../lin.x86/rel sudo python
>>> from fpgalink2 import *
...
OSError: libfpgalink.so: cannot open shared object file: No such file or directory

It seems that python is not finding the dlls in LD_LIBRARY_PATH - I have tried setting the env, putting the python files into the lin.x86/rel and setting LD_LIBRARY_PATH=$(pwd)

I also tried:
ldconfig -n ../../lin.x86/rel

I also tried putting the full path name into the python file.

if ( sys.platform == "linux2" ):
    cdll.LoadLibrary("/home/tom/libfpgalink-20130321/lin.x86/rel/libfpgalink.so")
 
which gives...
...
OSError: liberror.so: cannot open shared object file: No such file or directory

[Chris McClelland]

Given the "undefined symbol: libusb_error_name" error, I'm surprised you
managed to get flcli working on this system. It almost certainly means
you're using a version of libusb-1.0 prior to 1.0.9, when the
libusb_error_name() function was added. You should upgrade your
libusb-1.0 to at least 1.0.9. On a Debian-ish system, you can query the
installed version like this:

wotan$ dpkg-query -W libusb-1.0-0
libusb-1.0-0 2:1.0.9~rc3-2ubuntu1

For the 20130321 alpha, I forgot to update the Python binding to reflect
the API changes (mostly to support slave serial & selectmap
programming). I just checked in an updated Python binding which should
work (apologies this is lin.x64, I don't have a lin.x86 system to hand)
like this:

http://pastebin.com/raw.php?i=PR4rMzhE

Chris

[fitzsnaggle]

Thank you,

I tried what you are doing and have it working, but I'm not able to
verify that that fix it. Let me explain. I had version 1.0.8 of
libusb, which I removed with some stupid use of synaptic and
downloaded the .deb for libusb and libusb-dev 1.0.9 - identical to the
version you quote above. It still didn't work, so I decided to restart
- and it seems my window manager and some other things were now gone -
because of aformentioned stupid use of synaptic. So I decided to try
Fuduntu (a fedora variant, though it doesn't sound like - which is
pretty nice so far and it seems to work fine.)

Under the new system, flcli still works and I am able to import
fpgalink2 in python with no problems. When I enter flLoadStandard I
get an error that the device cannot be found. I get this error if I
run flcli without sudo as well. When I run python as sudo it cannot
find libfpgalink.so as before. Is there a way to register my device so
that I can access it without being a super user? I picked the users
group to register.

I think this issue is possibly related to these:
http://stackoverflow.com/questions/14026173/ld-library-path-with-sudo-python
http://askubuntu.com/questions/57915/environment-variables-when-run-with-sudo

I noticed a commit today to fix a problem with .so dependencies when
working with JNA. Maybe this will fix it?
https://github.com/makestuff/common/commit/40e25d8918dedae0e90c941fa0c755681ef32b9b

[Chris McClelland]

Making the device usable without sudo is covered in section 2.1 of the
manual. Be sure to use lowercase for the IDs (e.g 1d50:602b, not
1D50:602B). Also, if your device enumerates as 04b4:8613 on power-on, it
may be getting hijacked by the usbtest kernel module, which you can
disable[1].

Unfortunately I seem to be misinterpreting what you're saying. Initially
you said, "I tried what you are doing and have it working" (presumably
that means you replicated http://pastebin.com/raw.php?i=PR4rMzhE), but
then a bit later, "when I enter flLoadStandard I get an error that the
device cannot be found". Things will be much clearer for me if you make
a pastebin of the exact transcript of what you type and the results you
get.

Today's JNA fix affects loading of subsidiary shared libraries from
within a shared library that is loaded by the JVM. The fix was to avoid
the need to set LD_LIBRARY_PATH in addition to the java.library.path JVM
property. This can be avoided by embedding RPATH ORIGIN metadata in each
shared library, which tells the dynamic loader to look for subsidiary
libraries alongside. I very much doubt that it will affect the behaviour
of flcli (which already has RPATH ORIGIN metadata) or python (which is
overridden by LD_LIBRARY_PATH anyway).

[1]http://www.makestuff.eu/wordpress/disabling-the-usbtest-ko-kernel-module-on-ubuntu-10-04/

[Jenn]

Chris,

I have a question about the slave serial method of configuration. On my board the fpga is connected to the FX2 as follows:

prog_b = PA0
init_b = PD0
done = PD7
cclk = PD6
din = PD5

when I run flcli, it says that "for now prog_b, init_b and done must be on the same port". Will there be support for using arbitrary pins in the future?

Thanks,
Jennifer Holt

[Chris McClelland]

Jenn,

It's a pretty simple fix. Reading or writing one port requires one USB
command (e.g [1]). If the PROG, INIT and DONE pins on the FPGA are
connected to different FX2 ports, then two or perhaps three separate USB
commands will be necessary.

When I'm writing code in situations like this, rather than try to
anticipate what level of flexibility will be required in hypothetical
situations, I tend to implement a sane minimum level of flexibility and
then wait until someone actually asks for more.

I will try to get it implemented once I've completed my current task.
What host platform are you primarily using for testing (e.g Windows x86,
Linux x64, etc)? And out of interest what is the FPGA board to which you
refer?

Chris

[1]https://github.com/makestuff/libfpgalink/blob/master/prog.c#L430

On Sun, 2013-06-23 at 13:36 -0700, Jenn wrote:
>
> Chris,
>
> I have a question about the slave serial method of configuration. On
> my board the fpga is connected to the FX2 as follows:
>
> prog_b = PA0
> init_b = PD0
> done = PD7
> cclk = PD6
> din = PD5
>
> when I run flcli, it says that "for now prog_b, init_b and done must
> be on the same port". Will there be support for using arbitrary pins
> in the future?
>
> Thanks,
> Jennifer Holt
>
>

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[Jenn]

I primarily use x64 linux, and the board is a custom one I have designed to read a linear ccd for an optical spectrometer. When designing the board I just routed whatever was convenient to the FPGA. I can make a change to the board to put prog_b on PD4 with a bit of wire, and I will change the next board revision as well, but it still might be nice to have the flexibility.

Thanks,
Jenn 

[Chris McClelland]

Well, it would probably take several hours to add the fix, build a new
release and give it to you. If you had a commercial board that others
might be using or a production run of a custom board, I'd consider it a
worthwhile time investment. But I really need to tie up all the loose
ends and get a production release out, and I'm at the point now where I
really need to prioritize the crucial features. So if you *can* mod your
prototype to use PD4 I think that would be the best solution, at least
in the short term.

Alternatively, if you know C and have the time you could add the feature
yourself and send me a pull request on GitHub? I'd be happy to provide
guidance on the #fpgalink IRC channel on freenode.net.

Chris

[Jenn]

I'll go ahead and mod the board. Thanks for all your help!

Jenn

[Christopher Felton]

Chris M.

Great job, when I get a chance I will be trying out the different JTAG

port pins!

Regards,

Chris Felton