Meeting May 4, 2023

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Jeff Scheel

May 3, 2023, 12:16:01 PM5/3/23
to RISC-V Development Board Program

Our next meeting will be Thursday, May 4, 2023 at 12:00 UTC.  Local times:
  • 8 PM China
  • 5:30 PM India Standard Time
  • 2 PM Central European Time
  • 8 AM Eastern U.S.
  • 5 AM Pacific U.S.
Here's the meeting link:

The agenda will be a traditional program of program-centric status:
  1. Program updates from RISC-V
  2. Board and Project updates
  3. Review of Google Sites updates and drafts (Google Sites)
  4. What's cool? (time permitting)
Any topics, updates, or information can as always either be raised at the beginning of the meeting or by adding it to our agenda document, Dev Board Group Minutes.

Jeff Scheel (he/him/his)
Linux Foundation, RISC-V Technical Program Manager

Jeff Scheel

May 4, 2023, 11:25:28 AM5/4/23
to RISC-V Development Board Program
Another good session today despite Labour Day holidays in several geographies. As always, please pose comments, suggestions, questions, or corrections always appreciated either via email or in our Meeting document.

Here are my notes...

Attendees: Jeff, Huizhi, Weifu, Rafael, Thea, Daniel, Axel, Felix

Board Updates:

  • Milk-V

    • TH1520 [planning]

    • JH7110 [demo board ready]

    • Sophgo SG2042 [Pioneer] [In production]

    • Sophgo CV1800B [Duo] [In production]

Program Updates:

  • ArchLinux

    • Working to enable software stack with VisionFive V1

  • Fedora

    • Fedora 38 Image is ready for main archs & RISC-V!  Package number 18100/21130 [78%]

    • Start planning RV32 bootstrap [target on  K230] 

    • Go on maintain Fedora 37 for testing

  • SUSE

    • Working to build using QEMU builds for ALP

  • Android (AOSP)

    • Shadow Call Stack related changes(userspace part for riscv64), which impact toolchain, build system, bionic and ART, have been finished. This discussion also made a documentation changes on riscv psabi spec:

    • Continue working on ART and now starting changes for Nterp.

    • Berberis(a new dynamic binary translator project) made big progress, this will help testing riscv64 binaries on x86_64 machines.

  • R9

  • oreboot

    •  JH7110/VF2 DRAM init on pause due to issue hard to track down, likely around clocks

      • U-Boot reference code is hard to grasp, started debug printing

      • JH7110 SoC manual is still a draft, some pieces are missing or diverge from code

  • RISC-V

    • ICE-V program boards all shipped

      • 16 Academic, 4 Ecosystem

      • Used new site to simplify introduction to devboard-community: link

      • Will start monthly status in May

    • VisionFive V2 boards on order

      • Projects selected: 4 Academic, 18 Distro, 22 Ecosystem, 10 Labs, 26 boards ordered for inventory

      • Boards ordered and shipped to Distribution locations (China & US)

        1. China shipment request sent

        2. U.S. order in Customs, issue being worked

      • New call for remaining boards will be posted to webpage as soon as boards ship

    • Xcalibyte

      • No news

    • Updates to Program info

      • Wall of Fame published: link

      • Please let Jeff know if you have something to add to this page!

    • Review of pending DevBoards site updates:

    • Discussion:

      • What we would like to know about the Shakti processor initiative:

        1. Processor initiatives – overview, detail pointers, what markets

        2. Target OSs

        3. Manufacturing plans

        4. Documentation status, i.e. how much exists, vision for more, how much is available (proprietary chips, vague register definitions)

        5. Community forums, mailing lists, etc. exist for questions

        6. Status of peripherals

        7. How many “binary blobs” are required?

        8. DevBoard makers for Ecosystem – when and by whom

        9. Goals for the program, scope and breadth

        10. Any products for sale?

What’s cool?:


Jeff Scheel (he/him/his)
Linux Foundation, RISC-V Technical Program Manager

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