We updated RSD today!
We eliminated the dependency of RSD on Synopsys Synplify.
So now you can try RSD on an FPGA board using only Vivado (free)!
Note that Synplify+Vivado provided better operating frequency compared to Vivado only in our evaluation.
Therefore we still remain the option of using Synplify for users who have the license.
See the wiki page for the detail.
In addition, we added the support of post-synthesis simulation for FPGA.
This simulation is helpful for debugging when RSD runs correctly on the functional simulation but an FPGA.