PDP-6 vs Piper Cub [take two]
Alan H. Martin
>As I've said and John Everett has confirmed, the problem of
>maintaining a 32 year old PDP-6 is not lack of parts, it is
>lack of skilled technicians. ...
Could someone clear something up for me? If I recall correctly, Al
Blackington once told me years ago that the PDP-6 was a bitch to keep running
because, in marked contrast to all the -10's (and how many other PDP's?), it
was an *asynchronous* design. In particular, it was quite prone to wedge in
the middle of instructions waiting for a dropped signal that was never going
to arrive.
So, would one of the people who actually worked on the hardware like to
confirm, clarify or refute this for me?
/AHM/THX
--
Alan Howard Martin AMa...@TLE.ENet.DEC.Com
Alan H. Martin
>Alan> Could someone clear something up for me? If I recall correctly,
>Alan> Al Blackington once told me years ago that the PDP-6 was a bitch
>Alan> to keep running because, in marked contrast to all the -10's
>Alan> ... it was an *asynchronous* design.
>
>The KA-10 was definitely an asynchronous design.
Oh well, thanks for the info.
I couldn't easily check with AlB before posting, so my poor recall of what
he'd said isn't his fault.
Alan Bowler
>Alan> Could someone clear something up for me? If I recall correctly,
>Alan> Al Blackington once told me years ago that the PDP-6 was a bitch
>Alan> to keep running because, in marked contrast to all the -10's
>Alan> In particular, it was quite prone to wedge in the middle of
>Alan> instructions waiting for a dropped signal that was never going
>Alan> to arrive.
>
>The KA-10 was definitely an asynchronous design. As someone put it
>recently, it was a maintenance upgrade/reimplementation of the PDP-6,
>with VERY similar logic design. The asynchronous designs get a bad
>rap in terms of debugging, in my opinion. They were really quite easy
>to debug, and in some ways easier than a synchronous design. With the
>asynchronous design, you usually could locate the problem by looking
>at the lights, which would show what subroutine the logic was in, and
>thus, where the pulse had been lost.
>
Quite correct. Asynch designs were very good. When something did fail
the processor would often stop ("wedge in the middle of an instruction")
and clearly indicate that something was wrong. As Tom points out this
left the electronic equivalent of arrows pointing to te failed
component. It is true that synchronous designs did not fail in this
manner. Instead that just charged on and produced wrong answers.
I always much prefer to know about harwdare failures.
Asynch designs have some problems
1) They are harder to design and build. You have to plan for all those
additional "okay I'm done" signals. Also it does take time to
propagate and process those signals, so a sychronous design can
squeeze out a little more speed by "knowing" a function will be
completed at "clock tick N".
2) It you are trying to artificially produce a range of "models"
for marketing reasons, you can't just turn down the clock
to slow things down.
Bob Clements
>Could someone clear something up for me? If I recall correctly, Al
>Blackington once told me years ago that the PDP-6 was a bitch to keep running
>because, in marked contrast to all the -10's (and how many other PDP's?), it
>was an *asynchronous* design.
Well, the answer is "Yes and No". The PDP-6 was asynchronous.
But so were the PDP-10's (except for the KL-10). So not much marked
contrast there.
There were a number of reasons why the PDP-6 was hard to keep running,
but that wasn't particularly one of them. If the machine did hang in
the middle of an instruction, it was pretty easy to tell how far it
had gotten (all those lights were there for a reason) and thus pin
down what small section of logic must have failed.
I don't recall hangs in the middle of a processor sequence being that
common a failure mode. Memory cycles to the external busses, yes.
But not very often within the processor.
>Alan Howard Martin AMa...@TLE.ENet.DEC.Com
Bob Clements, K1BC, clem...@bbn.com, (w) +1 617 USE K1BC
[Erstwhile PDP-6 field engineer, later KA-10 project engineer]
Carl R. Friend
> Of course, we all know that the most important feature required for
> this type of debugging was the *lamp test* button - which the KA was
> not really equiped with (well, you could make them all light, but there
> wasn't a button to do it on mine (SN 9 and 44, maybe they added it later?))
> or, later, the upgrade LED's...
>
> Yes, lights are sorely missed. Of course, with the speed of current
> systems they would just be a blur anyway...
Yes, the lights would be a blur. Until the machine hung up someplace.
Of course, today, if the CPU breaks you simply buy another one and plug
it in.
I don't recall lamp test buttons on the KA. The KI had 'em though; saved
my butt several times. [insert smiley]
--
______________________________________________________________________
| | |
| Carl Richard Friend (UNIX Sysadmin) | West Boylston |
| Minicomputer Collector / Enthusiast | Massachusetts, USA |
| mailto:carl....@swec.com | |
| http://www.ultranet.com/~engelbrt/carl/museum | ICBM: N42:21 W71:46 |
|________________________________________________|_____________________|
John Everett
>
>
> Yes, the lights would be a blur. Until the machine hung up someplace.
>Of course, today, if the CPU breaks you simply buy another one and plug
>it in.
>
> I don't recall lamp test buttons on the KA. The KI had 'em though; saved
>my butt several times. [insert smiley]
>
>--
Even though the lights were a blur, there was lots of information to be
gleaned if you knew what to look for. Anyone else out there remember "pink
scheduling mode"?
--
jeve...@wwa.com (John V. Everett)
Bob Christiansen
hand was a SYNCHRONOUS machine, and MUCH harder to keep running.
John Everett
>
>Well, the answer is "Yes and No". The PDP-6 was asynchronous.
>But so were the PDP-10's (except for the KL-10). So not much marked
>contrast there.
>
>There were a number of reasons why the PDP-6 was hard to keep running,
>but that wasn't particularly one of them. If the machine did hang in
>the middle of an instruction, it was pretty easy to tell how far it
>had gotten (all those lights were there for a reason) and thus pin
>down what small section of logic must have failed.
>
>I don't recall hangs in the middle of a processor sequence being that
>common a failure mode. Memory cycles to the external busses, yes.
>But not very often within the processor.
>
>
>>Alan Howard Martin AMa...@TLE.ENet.DEC.Com
>
>Bob Clements, K1BC, clem...@bbn.com, (w) +1 617 USE K1BC
>[Erstwhile PDP-6 field engineer, later KA-10 project engineer]
In my earlier post regarding synchronous vs. asynchronous designs I said I
stood ready to be corrected by my betters. With respect to PDP-6/10 hardware
design Clements is certainly my better by a long shot. Thanks Bob, for
confirming what I remember about the design. Senility is held in abeyance for
yet another day.