Logic circuit: startup reset

[Eric]

Hi, in a logic circuit, I want to reset a counter when I put the power on.
I think we can do that with a capacitor, but I don't remember how?

[Spehro Pefhany]

the renowned Eric <ric...@videotron.ca> wrote:
> Hi, in a logic circuit, I want to reset a counter when I put the power on.
> I think we can do that with a capacitor, but I don't remember how?

IF it is a CMOS circuit then you can do this with a simple RC circuit. Try
the following:

1N4148

----|<|-----
| |
| |
+5V ---- 1M -------- 1K ----- Active high reset input (CMOS)
|+
--- 0.1uF (film or ceramic or electrolytic)
---
|
0V -------------

This will provide a pulse lasting roughly 0.1 second (a bit less,
typically) on turn-on.

Hope this helps.

=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=
Spehro Pefhany "The Journey is the reward"
sp...@interlog.com
Fax:(905) 271-9838 (small micro system devt hw/sw + mfg)
=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=

[David Rickey]

I think this will give you a power on pulse. The question is if you need a
high or low?

+ o-----||---+-----> reset pin
cap |
> resistor
>
|
___
-

[Spehro Pefhany]

the absent minded Spehro Pefhany <sp...@interlog.com> wrote:
> 1N4148

> ----|<|-----
> | |
> | |
> +5V ---- 1M -------- 1K ----- Active xxxxx reset input (CMOS)

> |+
> --- 0.1uF (film or ceramic or electrolytic)
> ---
> |
> 0V -------------

Oops, that should be "active low" (/reset), reverse things for active
high.

You can leave the diode out in many cases (it uses the protection diodes
in the CMOS circuit) but it is a good idea to include the series resistor
in case the power supply is shorted it limits the current into the chip.

--

[David Johnston]

It depends on how reliable you want the startup reset to be. An RC timer
will work on a clean power up, but won't cope well with temporary VCC
violations, or rapid pulsing of VCC.

Try a TL7705 (TI or SGS) or an econoreset(tm) (Dallas I think) for a proper
power on reset.

DJ

Spehro Pefhany wrote in message <785iuk$9i3$2...@news.interlog.com>...

>the renowned Eric <ric...@videotron.ca> wrote:
>> Hi, in a logic circuit, I want to reset a counter when I put the power
on.
>> I think we can do that with a capacitor, but I don't remember how?
>

>IF it is a CMOS circuit then you can do this with a simple RC circuit. Try
>the following:
>

> 1N4148
>
> ----|<|-----
> | |
> | |
>+5V ---- 1M -------- 1K ----- Active high reset input (CMOS)

> |+
> --- 0.1uF (film or ceramic or electrolytic)
> ---
> |
> 0V -------------
>

>This will provide a pulse lasting roughly 0.1 second (a bit less,
>typically) on turn-on.
>
>Hope this helps.
>
>=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=
-=

[RJPcorp]

If a logic 1 resets the counter......from the power supply connect a 10K 1/8W
to the + side of a 22uF cap...the negative side of the cap goes to
ground...also from the + side of the cap..connect it tothe input of 4069
inverter...the output of that inverter goes to your COUNTER-RESET.

How it works....when the power is first turned on....the cap will begin
charging....when the voltage at the cap is low...the output of the inverter
will be high...and therefore will reset your counter....as the cap charges and
goes high, the inverter will go low...allowing regular counting.

Rick

[Jonathan Bromley]

Peter wrote:
>
> The CMOS gate should be a schmitt trigger, otherwise the o/p will
> briefly oscillate around the transition.
>
> One can get the miniature SOT-23 VCC monitors which do this, down to
> about 30p in volume. Seiko Instruments (USA) do the cheapest ones,
> also many others e.g. Maxim.
>
> Nowadays I think that by the time one has paid a few p per component
> for pick/place, these SOT-23 devices are as cheap, and better because
> you get brownout protection also.
>

I'll second that. Whenever I've tried to cut corners on a reset
circuit, it's given me support and redesign hassle later. You
need to ship an awful lot of $2 power-monitor chips before they
start to outweigh the cost of one design respin and all the
support grief that led up to that respin.

BTW the same kind of argument applies to battery backup management
for SRAMs - only more so.

Jonathan Bromley