Static Timing Analysis

Project : sd_card_test
Build Time : 12/14/16 16:47:59
Device : CY8C5268LTI-LP030
Temperature : -40C - 85/125C
VDDA : 5.00
VDDABUF : 5.00
VDDD : 5.00
VDDIO0 : 5.00
VDDIO1 : 5.00
VDDIO2 : 5.00
VDDIO3 : 5.00
VUSB : 5.00
Voltage : 5.0
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+ Timing Violation Section
No Timing Violations
+ Clock Summary Section
Clock Domain Nominal Frequency Required Frequency Maximum Frequency Violation
CyILO CyILO 100.000 kHz 100.000 kHz N/A
CyIMO CyIMO 24.000 MHz 24.000 MHz N/A
CyMASTER_CLK CyMASTER_CLK 48.000 MHz 48.000 MHz N/A
CyBUS_CLK CyMASTER_CLK 48.000 MHz 48.000 MHz N/A
SD_CARD_Clock_1 CyMASTER_CLK 48.000 MHz 48.000 MHz 59.407 MHz
CyPLL_OUT CyPLL_OUT 48.000 MHz 48.000 MHz N/A
CyXTAL CyXTAL 24.000 MHz 24.000 MHz N/A
+ Register to Register Section
+ Setup Subsection
Path Delay Requirement : 20.8333ns(48 MHz)
Source Destination FMax Delay (ns) Slack (ns) Violation
\SD_CARD:SPI0:BSPIM:sR8:Dp:u0\/so_comb \SD_CARD:SPI0:BSPIM:mosi_pre_reg\/main_0 59.407 MHz 16.833 4.000
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell1 U(1,5) 1 \SD_CARD:SPI0:BSPIM:sR8:Dp:u0\ \SD_CARD:SPI0:BSPIM:sR8:Dp:u0\/clock \SD_CARD:SPI0:BSPIM:sR8:Dp:u0\/so_comb 5.360
Route 1 \SD_CARD:SPI0:BSPIM:mosi_from_dp\ \SD_CARD:SPI0:BSPIM:sR8:Dp:u0\/so_comb \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split\/main_3 2.315
macrocell1 U(0,5) 1 \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split\ \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split\/main_3 \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split\/q 3.350
Route 1 \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split\ \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split\/q \SD_CARD:SPI0:BSPIM:mosi_pre_reg\/main_0 2.298
macrocell13 U(0,5) 1 \SD_CARD:SPI0:BSPIM:mosi_pre_reg\ SETUP 3.510
Clock Skew 0.000
\SD_CARD:SPI0:BSPIM:sR8:Dp:u0\/so_comb \SD_CARD:SPI0:BSPIM:mosi_pre_reg\/main_1 59.464 MHz 16.817 4.016
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell1 U(1,5) 1 \SD_CARD:SPI0:BSPIM:sR8:Dp:u0\ \SD_CARD:SPI0:BSPIM:sR8:Dp:u0\/clock \SD_CARD:SPI0:BSPIM:sR8:Dp:u0\/so_comb 5.360
Route 1 \SD_CARD:SPI0:BSPIM:mosi_from_dp\ \SD_CARD:SPI0:BSPIM:sR8:Dp:u0\/so_comb \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split_1\/main_3 2.290
macrocell7 U(1,5) 1 \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split_1\ \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split_1\/main_3 \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split_1\/q 3.350
Route 1 \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split_1\ \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split_1\/q \SD_CARD:SPI0:BSPIM:mosi_pre_reg\/main_1 2.307
macrocell13 U(0,5) 1 \SD_CARD:SPI0:BSPIM:mosi_pre_reg\ SETUP 3.510
Clock Skew 0.000
\SD_CARD:SPI0:BSPIM:BitCounter\/count_3 \SD_CARD:SPI0:BSPIM:mosi_pre_reg\/main_0 67.299 MHz 14.859 5.974
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(0,5) 1 \SD_CARD:SPI0:BSPIM:BitCounter\ \SD_CARD:SPI0:BSPIM:BitCounter\/clock \SD_CARD:SPI0:BSPIM:BitCounter\/count_3 1.940
Route 1 \SD_CARD:SPI0:BSPIM:count_3\ \SD_CARD:SPI0:BSPIM:BitCounter\/count_3 \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split\/main_5 3.761
macrocell1 U(0,5) 1 \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split\ \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split\/main_5 \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split\/q 3.350
Route 1 \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split\ \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split\/q \SD_CARD:SPI0:BSPIM:mosi_pre_reg\/main_0 2.298
macrocell13 U(0,5) 1 \SD_CARD:SPI0:BSPIM:mosi_pre_reg\ SETUP 3.510
Clock Skew 0.000
\SD_CARD:SPI0:BSPIM:BitCounter\/count_3 \SD_CARD:SPI0:BSPIM:mosi_pre_reg\/main_1 67.322 MHz 14.854 5.979
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(0,5) 1 \SD_CARD:SPI0:BSPIM:BitCounter\ \SD_CARD:SPI0:BSPIM:BitCounter\/clock \SD_CARD:SPI0:BSPIM:BitCounter\/count_3 1.940
Route 1 \SD_CARD:SPI0:BSPIM:count_3\ \SD_CARD:SPI0:BSPIM:BitCounter\/count_3 \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split_1\/main_5 3.747
macrocell7 U(1,5) 1 \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split_1\ \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split_1\/main_5 \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split_1\/q 3.350
Route 1 \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split_1\ \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split_1\/q \SD_CARD:SPI0:BSPIM:mosi_pre_reg\/main_1 2.307
macrocell13 U(0,5) 1 \SD_CARD:SPI0:BSPIM:mosi_pre_reg\ SETUP 3.510
Clock Skew 0.000
\SD_CARD:SPI0:BSPIM:BitCounter\/count_3 \SD_CARD:SPI0:BSPIM:sR8:Dp:u0\/f1_load 68.785 MHz 14.538 6.295
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(0,5) 1 \SD_CARD:SPI0:BSPIM:BitCounter\ \SD_CARD:SPI0:BSPIM:BitCounter\/clock \SD_CARD:SPI0:BSPIM:BitCounter\/count_3 1.940
Route 1 \SD_CARD:SPI0:BSPIM:count_3\ \SD_CARD:SPI0:BSPIM:BitCounter\/count_3 \SD_CARD:SPI0:BSPIM:load_rx_data\/main_1 3.761
macrocell2 U(1,5) 1 \SD_CARD:SPI0:BSPIM:load_rx_data\ \SD_CARD:SPI0:BSPIM:load_rx_data\/main_1 \SD_CARD:SPI0:BSPIM:load_rx_data\/q 3.350
Route 1 \SD_CARD:SPI0:BSPIM:load_rx_data\ \SD_CARD:SPI0:BSPIM:load_rx_data\/q \SD_CARD:SPI0:BSPIM:sR8:Dp:u0\/f1_load 2.637
datapathcell1 U(1,5) 1 \SD_CARD:SPI0:BSPIM:sR8:Dp:u0\ SETUP 2.850
Clock Skew 0.000
\SD_CARD:SPI0:BSPIM:BitCounter\/count_0 \SD_CARD:SPI0:BSPIM:mosi_pre_reg\/main_0 68.866 MHz 14.521 6.312
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(0,5) 1 \SD_CARD:SPI0:BSPIM:BitCounter\ \SD_CARD:SPI0:BSPIM:BitCounter\/clock \SD_CARD:SPI0:BSPIM:BitCounter\/count_0 1.940
Route 1 \SD_CARD:SPI0:BSPIM:count_0\ \SD_CARD:SPI0:BSPIM:BitCounter\/count_0 \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split\/main_8 3.423
macrocell1 U(0,5) 1 \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split\ \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split\/main_8 \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split\/q 3.350
Route 1 \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split\ \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split\/q \SD_CARD:SPI0:BSPIM:mosi_pre_reg\/main_0 2.298
macrocell13 U(0,5) 1 \SD_CARD:SPI0:BSPIM:mosi_pre_reg\ SETUP 3.510
Clock Skew 0.000
\SD_CARD:SPI0:BSPIM:BitCounter\/count_4 \SD_CARD:SPI0:BSPIM:mosi_pre_reg\/main_1 68.880 MHz 14.518 6.315
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(0,5) 1 \SD_CARD:SPI0:BSPIM:BitCounter\ \SD_CARD:SPI0:BSPIM:BitCounter\/clock \SD_CARD:SPI0:BSPIM:BitCounter\/count_4 1.940
Route 1 \SD_CARD:SPI0:BSPIM:count_4\ \SD_CARD:SPI0:BSPIM:BitCounter\/count_4 \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split_1\/main_4 3.411
macrocell7 U(1,5) 1 \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split_1\ \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split_1\/main_4 \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split_1\/q 3.350
Route 1 \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split_1\ \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split_1\/q \SD_CARD:SPI0:BSPIM:mosi_pre_reg\/main_1 2.307
macrocell13 U(0,5) 1 \SD_CARD:SPI0:BSPIM:mosi_pre_reg\ SETUP 3.510
Clock Skew 0.000
\SD_CARD:SPI0:BSPIM:BitCounter\/count_0 \SD_CARD:SPI0:BSPIM:mosi_pre_reg\/main_1 68.890 MHz 14.516 6.317
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(0,5) 1 \SD_CARD:SPI0:BSPIM:BitCounter\ \SD_CARD:SPI0:BSPIM:BitCounter\/clock \SD_CARD:SPI0:BSPIM:BitCounter\/count_0 1.940
Route 1 \SD_CARD:SPI0:BSPIM:count_0\ \SD_CARD:SPI0:BSPIM:BitCounter\/count_0 \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split_1\/main_7 3.409
macrocell7 U(1,5) 1 \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split_1\ \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split_1\/main_7 \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split_1\/q 3.350
Route 1 \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split_1\ \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split_1\/q \SD_CARD:SPI0:BSPIM:mosi_pre_reg\/main_1 2.307
macrocell13 U(0,5) 1 \SD_CARD:SPI0:BSPIM:mosi_pre_reg\ SETUP 3.510
Clock Skew 0.000
\SD_CARD:SPI0:BSPIM:BitCounter\/count_2 \SD_CARD:SPI0:BSPIM:mosi_pre_reg\/main_1 68.927 MHz 14.508 6.325
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(0,5) 1 \SD_CARD:SPI0:BSPIM:BitCounter\ \SD_CARD:SPI0:BSPIM:BitCounter\/clock \SD_CARD:SPI0:BSPIM:BitCounter\/count_2 1.940
Route 1 \SD_CARD:SPI0:BSPIM:count_2\ \SD_CARD:SPI0:BSPIM:BitCounter\/count_2 \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split_1\/main_6 3.401
macrocell7 U(1,5) 1 \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split_1\ \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split_1\/main_6 \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split_1\/q 3.350
Route 1 \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split_1\ \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split_1\/q \SD_CARD:SPI0:BSPIM:mosi_pre_reg\/main_1 2.307
macrocell13 U(0,5) 1 \SD_CARD:SPI0:BSPIM:mosi_pre_reg\ SETUP 3.510
Clock Skew 0.000
\SD_CARD:SPI0:BSPIM:BitCounter\/count_2 \SD_CARD:SPI0:BSPIM:mosi_pre_reg\/main_0 68.951 MHz 14.503 6.330
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(0,5) 1 \SD_CARD:SPI0:BSPIM:BitCounter\ \SD_CARD:SPI0:BSPIM:BitCounter\/clock \SD_CARD:SPI0:BSPIM:BitCounter\/count_2 1.940
Route 1 \SD_CARD:SPI0:BSPIM:count_2\ \SD_CARD:SPI0:BSPIM:BitCounter\/count_2 \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split\/main_6 3.405
macrocell1 U(0,5) 1 \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split\ \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split\/main_6 \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split\/q 3.350
Route 1 \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split\ \SD_CARD:SPI0:BSPIM:mosi_pre_reg_split\/q \SD_CARD:SPI0:BSPIM:mosi_pre_reg\/main_0 2.298
macrocell13 U(0,5) 1 \SD_CARD:SPI0:BSPIM:mosi_pre_reg\ SETUP 3.510
Clock Skew 0.000
+ Hold Subsection
Source Destination Slack (ns) Violation
\SD_CARD:SPI0:BSPIM:BitCounter\/count_1 \SD_CARD:SPI0:BSPIM:state_1\/main_6 3.528
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(0,5) 1 \SD_CARD:SPI0:BSPIM:BitCounter\ \SD_CARD:SPI0:BSPIM:BitCounter\/clock \SD_CARD:SPI0:BSPIM:BitCounter\/count_1 0.620
Route 1 \SD_CARD:SPI0:BSPIM:count_1\ \SD_CARD:SPI0:BSPIM:BitCounter\/count_1 \SD_CARD:SPI0:BSPIM:state_1\/main_6 2.908
macrocell9 U(0,5) 1 \SD_CARD:SPI0:BSPIM:state_1\ HOLD 0.000
Clock Skew 0.000
\SD_CARD:SPI0:BSPIM:BitCounter\/count_1 \SD_CARD:SPI0:BSPIM:state_0\/main_6 3.528
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(0,5) 1 \SD_CARD:SPI0:BSPIM:BitCounter\ \SD_CARD:SPI0:BSPIM:BitCounter\/clock \SD_CARD:SPI0:BSPIM:BitCounter\/count_1 0.620
Route 1 \SD_CARD:SPI0:BSPIM:count_1\ \SD_CARD:SPI0:BSPIM:BitCounter\/count_1 \SD_CARD:SPI0:BSPIM:state_0\/main_6 2.908
macrocell10 U(0,5) 1 \SD_CARD:SPI0:BSPIM:state_0\ HOLD 0.000
Clock Skew 0.000
\SD_CARD:SPI0:BSPIM:cnt_enable\/q \SD_CARD:SPI0:BSPIM:cnt_enable\/main_3 3.539
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell17 U(0,4) 1 \SD_CARD:SPI0:BSPIM:cnt_enable\ \SD_CARD:SPI0:BSPIM:cnt_enable\/clock_0 \SD_CARD:SPI0:BSPIM:cnt_enable\/q 1.250
macrocell17 U(0,4) 1 \SD_CARD:SPI0:BSPIM:cnt_enable\ \SD_CARD:SPI0:BSPIM:cnt_enable\/q \SD_CARD:SPI0:BSPIM:cnt_enable\/main_3 2.289
macrocell17 U(0,4) 1 \SD_CARD:SPI0:BSPIM:cnt_enable\ HOLD 0.000
Clock Skew 0.000
\SD_CARD:SPI0:BSPIM:mosi_hs_reg\/q \SD_CARD:SPI0:BSPIM:mosi_hs_reg\/main_4 3.545
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell12 U(1,4) 1 \SD_CARD:SPI0:BSPIM:mosi_hs_reg\ \SD_CARD:SPI0:BSPIM:mosi_hs_reg\/clock_0 \SD_CARD:SPI0:BSPIM:mosi_hs_reg\/q 1.250
macrocell12 U(1,4) 1 \SD_CARD:SPI0:BSPIM:mosi_hs_reg\ \SD_CARD:SPI0:BSPIM:mosi_hs_reg\/q \SD_CARD:SPI0:BSPIM:mosi_hs_reg\/main_4 2.295
macrocell12 U(1,4) 1 \SD_CARD:SPI0:BSPIM:mosi_hs_reg\ HOLD 0.000
Clock Skew 0.000
\SD_CARD:SPI0:BSPIM:BitCounter\/count_1 \SD_CARD:SPI0:BSPIM:state_2\/main_6 3.547
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(0,5) 1 \SD_CARD:SPI0:BSPIM:BitCounter\ \SD_CARD:SPI0:BSPIM:BitCounter\/clock \SD_CARD:SPI0:BSPIM:BitCounter\/count_1 0.620
Route 1 \SD_CARD:SPI0:BSPIM:count_1\ \SD_CARD:SPI0:BSPIM:BitCounter\/count_1 \SD_CARD:SPI0:BSPIM:state_2\/main_6 2.927
macrocell8 U(1,5) 1 \SD_CARD:SPI0:BSPIM:state_2\ HOLD 0.000
Clock Skew 0.000
\SD_CARD:SPI0:BSPIM:BitCounter\/count_1 \SD_CARD:SPI0:BSPIM:ld_ident\/main_6 3.547
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(0,5) 1 \SD_CARD:SPI0:BSPIM:BitCounter\ \SD_CARD:SPI0:BSPIM:BitCounter\/clock \SD_CARD:SPI0:BSPIM:BitCounter\/count_1 0.620
Route 1 \SD_CARD:SPI0:BSPIM:count_1\ \SD_CARD:SPI0:BSPIM:BitCounter\/count_1 \SD_CARD:SPI0:BSPIM:ld_ident\/main_6 2.927
macrocell16 U(1,5) 1 \SD_CARD:SPI0:BSPIM:ld_ident\ HOLD 0.000
Clock Skew 0.000
\SD_CARD:SPI0:BSPIM:load_cond\/q \SD_CARD:SPI0:BSPIM:load_cond\/main_8 3.558
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell14 U(1,4) 1 \SD_CARD:SPI0:BSPIM:load_cond\ \SD_CARD:SPI0:BSPIM:load_cond\/clock_0 \SD_CARD:SPI0:BSPIM:load_cond\/q 1.250
macrocell14 U(1,4) 1 \SD_CARD:SPI0:BSPIM:load_cond\ \SD_CARD:SPI0:BSPIM:load_cond\/q \SD_CARD:SPI0:BSPIM:load_cond\/main_8 2.308
macrocell14 U(1,4) 1 \SD_CARD:SPI0:BSPIM:load_cond\ HOLD 0.000
Clock Skew 0.000
\SD_CARD:SPI0:BSPIM:mosi_from_dp_reg\/q \SD_CARD:SPI0:BSPIM:mosi_hs_reg\/main_5 3.561
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell15 U(1,4) 1 \SD_CARD:SPI0:BSPIM:mosi_from_dp_reg\ \SD_CARD:SPI0:BSPIM:mosi_from_dp_reg\/clock_0 \SD_CARD:SPI0:BSPIM:mosi_from_dp_reg\/q 1.250
Route 1 \SD_CARD:SPI0:BSPIM:mosi_from_dp_reg\ \SD_CARD:SPI0:BSPIM:mosi_from_dp_reg\/q \SD_CARD:SPI0:BSPIM:mosi_hs_reg\/main_5 2.311
macrocell12 U(1,4) 1 \SD_CARD:SPI0:BSPIM:mosi_hs_reg\ HOLD 0.000
Clock Skew 0.000
\SD_CARD:SPI0:BSPIM:BitCounter\/count_2 \SD_CARD:SPI0:BSPIM:state_2\/main_5 3.760
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(0,5) 1 \SD_CARD:SPI0:BSPIM:BitCounter\ \SD_CARD:SPI0:BSPIM:BitCounter\/clock \SD_CARD:SPI0:BSPIM:BitCounter\/count_2 0.620
Route 1 \SD_CARD:SPI0:BSPIM:count_2\ \SD_CARD:SPI0:BSPIM:BitCounter\/count_2 \SD_CARD:SPI0:BSPIM:state_2\/main_5 3.140
macrocell8 U(1,5) 1 \SD_CARD:SPI0:BSPIM:state_2\ HOLD 0.000
Clock Skew 0.000
\SD_CARD:SPI0:BSPIM:BitCounter\/count_2 \SD_CARD:SPI0:BSPIM:ld_ident\/main_5 3.760
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(0,5) 1 \SD_CARD:SPI0:BSPIM:BitCounter\ \SD_CARD:SPI0:BSPIM:BitCounter\/clock \SD_CARD:SPI0:BSPIM:BitCounter\/count_2 0.620
Route 1 \SD_CARD:SPI0:BSPIM:count_2\ \SD_CARD:SPI0:BSPIM:BitCounter\/count_2 \SD_CARD:SPI0:BSPIM:ld_ident\/main_5 3.140
macrocell16 U(1,5) 1 \SD_CARD:SPI0:BSPIM:ld_ident\ HOLD 0.000
Clock Skew 0.000
+ Input To Clock Section
+ SD_CARD_Clock_1
Source Destination Delay (ns)
\SD_CARD:miso0(0)_PAD\ \SD_CARD:SPI0:BSPIM:sR8:Dp:u0\/route_si 15.980
Type Location Fanout Instance/Net Source Dest Delay (ns)
Route 1 \SD_CARD:miso0(0)_PAD\ \SD_CARD:miso0(0)_PAD\ \SD_CARD:miso0(0)\/pad_in 0.000
iocell2 P2[1] 1 \SD_CARD:miso0(0)\ \SD_CARD:miso0(0)\/pad_in \SD_CARD:miso0(0)\/fb 7.219
Route 1 \SD_CARD:Net_16\ \SD_CARD:miso0(0)\/fb \SD_CARD:SPI0:BSPIM:sR8:Dp:u0\/route_si 5.261
datapathcell1 U(1,5) 1 \SD_CARD:SPI0:BSPIM:sR8:Dp:u0\ SETUP 3.500
Clock Clock path delay 0.000
+ Clock To Output Section
+ SD_CARD_Clock_1
Source Destination Delay (ns)
\SD_CARD:SPI0:BSPIM:state_1\/q \SD_CARD:mosi0(0)_PAD\ 30.407
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell9 U(0,5) 1 \SD_CARD:SPI0:BSPIM:state_1\ \SD_CARD:SPI0:BSPIM:state_1\/clock_0 \SD_CARD:SPI0:BSPIM:state_1\/q 1.250
Route 1 \SD_CARD:SPI0:BSPIM:state_1\ \SD_CARD:SPI0:BSPIM:state_1\/q \SD_CARD:Net_10\/main_1 4.833
macrocell3 U(1,4) 1 \SD_CARD:Net_10\ \SD_CARD:Net_10\/main_1 \SD_CARD:Net_10\/q 3.350
Route 1 \SD_CARD:Net_10\ \SD_CARD:Net_10\/q \SD_CARD:mosi0(0)\/pin_input 5.537
iocell1 P2[3] 1 \SD_CARD:mosi0(0)\ \SD_CARD:mosi0(0)\/pin_input \SD_CARD:mosi0(0)\/pad_out 15.437
Route 1 \SD_CARD:mosi0(0)_PAD\ \SD_CARD:mosi0(0)\/pad_out \SD_CARD:mosi0(0)_PAD\ 0.000
Clock Clock path delay 0.000
\SD_CARD:Net_22\/q \SD_CARD:sclk0(0)_PAD\ 23.117
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell18 U(1,5) 1 \SD_CARD:Net_22\ \SD_CARD:Net_22\/clock_0 \SD_CARD:Net_22\/q 1.250
Route 1 \SD_CARD:Net_22\ \SD_CARD:Net_22\/q \SD_CARD:sclk0(0)\/pin_input 6.080
iocell3 P2[2] 1 \SD_CARD:sclk0(0)\ \SD_CARD:sclk0(0)\/pin_input \SD_CARD:sclk0(0)\/pad_out 15.787
Route 1 \SD_CARD:sclk0(0)_PAD\ \SD_CARD:sclk0(0)\/pad_out \SD_CARD:sclk0(0)_PAD\ 0.000
Clock Clock path delay 0.000