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Heart Beat Counter Circuit

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REm...@gmail.com

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Dec 10, 2006, 12:28:02 PM12/10/06
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Hi All,

I am in DESPERATE need of some advice here. I am working on a project
for my basic electronics design class. Here is what I need to do...

Design a heartrate counter that
-uses 2 electrodes as the signal source, removes high frequency noise
- counts pulses for 15 seconds every minute
- displays the per minute heart rate for 45 seconds on a three-digit
digital display
- reset the count every 60 seconds and restart the counter

So far, I've got a heart rate pulse going into the counter for 15
seconds every minute. For the other 45 seconds of the minute, nothing
feeds into the counter. (This was done using filters, a comparator, a
15 second astable multivibrator, 2 bit counter, nor gate, and an and
gate)

So right now I need to figure out how to:
- reset the counter every 60 seconds
- connect the counter up to a three-digit digital display

I would be SO GREATFUL if someone could help me out with the counter
reset and display portion of this-

Thanks!
Rachel

Jan Panteltje

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Dec 10, 2006, 12:45:42 PM12/10/06
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On a sunny day (10 Dec 2006 09:28:02 -0800) it happened REm...@gmail.com
wrote in <1165771682.4...@n67g2000cwd.googlegroups.com>:

Use Microchip PIC microcontroller, you will have to proram it, learn ASM.
(or other micro processor) every other way probably needs more hardware.

REm...@gmail.com

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Dec 10, 2006, 12:50:21 PM12/10/06
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Oops- forgot to mention that its all in hardware- we're not allowed to
use software for this project!

Winston

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Dec 10, 2006, 12:52:50 PM12/10/06
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REm...@gmail.com wrote:

> Hi All,
>
(...)

> So right now I need to figure out how to:
> - reset the counter every 60 seconds

Is there room for a 3 bit counter on your board? You could increment it
during each 15 second interval and it would go to 0x100 at the end of
60 seconds. When the MSB goes high, reset both counters.

> - connect the counter up to a three-digit digital display

Look up 'seven segment decoder'.

--Winston

Leonard Lollobol

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Dec 10, 2006, 1:03:01 PM12/10/06
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On a sunny day (10 Dec 2006 09:50:21 -0800) it happened REm...@gmail.com
wrote in <1165773021....@l12g2000cwl.googlegroups.com>:

>Oops- forgot to mention that its all in hardware- we're not allowed to
>use software for this project!

Ok, homework, counter:

3 seven segment displays.
3 BCD to seven segment decoders / drivers
3 quad latches
3 74HC[T]90 decade counters with BCD output in series to count pulses.
1 555 timer running at some high frequency
1 binary divider so you get the last Q output high after 60 seconds,
this then triggers some one-shots that 1) latch the decade counter output,
2) reset the decade counters so the display is updated.
That was the part you did not know?
For better accuracy you could use a crystal (not a 555 timer).
All is available in 74HC range for 5V.

martin griffith

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Dec 10, 2006, 1:11:34 PM12/10/06
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On 10 Dec 2006 09:28:02 -0800, in sci.electronics.design
REm...@gmail.com wrote:

you didnt spec accuracy :-)
rough idea
555, at a 15 sec count
binary up counter 74 or CD4000 series
74hc138 will decode the lowest 3 lines of the counter into induvidual
lines

Thats a start, what would you do next?


martin

linnix

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Dec 10, 2006, 1:23:56 PM12/10/06
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Leonard Lollobol wrote:
> On a sunny day (10 Dec 2006 09:50:21 -0800) it happened REm...@gmail.com
> wrote in <1165773021....@l12g2000cwl.googlegroups.com>:
>
> >Oops- forgot to mention that its all in hardware- we're not allowed to
> >use software for this project!
>
> Ok, homework, counter:
>
> 3 seven segment displays.

Yes.

> 3 BCD to seven segment decoders / drivers
> 3 quad latches
> 3 74HC[T]90 decade counters with BCD output in series to count pulses.

1 CPLD.

> 1 555 timer running at some high frequency

Yes.

> 1 binary divider so you get the last Q output high after 60 seconds,

included in CPLD.

REm...@gmail.com

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Dec 10, 2006, 2:05:56 PM12/10/06
to

I have a few silly questions- I'm not too familar with all of this
stuff soo....

-are you saying I should use three decade counters together? how does
one set them up to count together?
- what is a binary divider? What is "Q" output? Would I set the "Q"
output to the reset terminal of the coutners to that they reset every
60 seconds?
- what are quad latches?

Sorry if I'm painfully novice at this! I'm just trying to imagine the
actual set up of this thing on our board and am not sure what some of
these components are!

Thanks again,
Rachel

> 1 binary divider so you get the last Q output high after 60 seconds,
> this then triggers some one-shots that 1) latch the decade counter output,
> 2) reset the decade counters so the display is updated.

REm...@gmail.com

unread,
Dec 10, 2006, 2:07:15 PM12/10/06
to
But how exactly does one reset the counters? Is it just a matter of
sending that pulse every 60 seconds to a reset terminal? Also, do you
have any suggestions for specific counters to use?

Thanks again!

John Fields

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Dec 10, 2006, 2:47:09 PM12/10/06
to

---
I'll be happy to help you, but I think you have a problem with that
15 second measurement in that you'll have to multiply it by four to
get the one minute rate and you'll lose some data in the units or
possibly even tens of beats per minute doing it that way. If the
design rules aren't fixed, I suggest that you count beats for a full
minute, then latch and display that data at the same time that you
reset the counter and start another count cycle. That way you'll
have new data coming in every minute and the counter will always be
working in the background. If you're interested, I can post a
schematic to alt.binaries.schematics.electronic, or email you one
since you can't access abse from Google.


--
JF

REm...@gmail.com

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Dec 10, 2006, 3:21:11 PM12/10/06
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That would be awesome! The problem is that we really do have to count
for only 15 seconds and then multiply by 4 to get the beats per minute.
My teacher suggested doing this by moving some of the wires over two
places(?) in the counter because that would multiply everything by
four. I'm not sure I truly understood his hint. I would love to post
the 2 schematics I have right now so you could see what I'm working on-
do you know where/how I could post these and would you even be willing
to take a look at them?

Thanks!

Rachel

John Fields

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Dec 10, 2006, 5:00:44 PM12/10/06
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On 10 Dec 2006 12:21:11 -0800, REm...@gmail.com wrote:

>That would be awesome! The problem is that we really do have to count
>for only 15 seconds and then multiply by 4 to get the beats per minute.
>My teacher suggested doing this by moving some of the wires over two
>places(?) in the counter because that would multiply everything by
>four. I'm not sure I truly understood his hint. I would love to post
>the 2 schematics I have right now so you could see what I'm working on-
>do you know where/how I could post these and would you even be willing
>to take a look at them?

---
Sure. Post them to a web page somewhere or, if you can't do that,
email them to me and I'll post them to abse so everybody can play.

That multiply-by-four is going to make things nasty, and there's no
need for it.

Here's what your instructor was talking about:

Lets say you measure beats for 15 seconds using an 8-bit binary
counter and you get:

0000 1111

which converts to decimal 15.

Shift the pattern one bit to the left:

0001 1110

and that becomes decimal 30.

Shift it once more and it becomes:

0011 1100

which is decimal 60, but it's been done in binary and it'll have to
be converted to Binary Coded Decimal (BCD) in order to be displayed
using easily available parts.

If it's your instructor's intention to have you learn to do binary
multiplication as well as binary-to-BCD conversion then, for your
application, doing the conversion would probably be easiest by
counting the beats for 15 seconds using a binary up/down counter in
'up' mode, wiring the Q outputs to the D inputs so that Q0 goes to
D2, Q1 goes to D3, Q2 goes to D4, and so on. Then, when the 15
second accumulation period ends, do a load. That will load a number
4 times greater than what the counter counted, back into itself.

Also, when the 15 second period ends, clear a BCD counter.

Now, reverse the counting direction of the binary counter and use a
convenient clock to simultaneously clock both the binary and the BCD
counter. Make it so that when the binary count gets to zero the Q
outputs of the BCD counter are loaded into BCD-to-seven-segment
decoder-drivers, and that'll cause the displays to show four times
the number of beats picked up in the previous 15 seconds.

The conversion and display can be done in microseconds so, unless
the one-reading-per-minute spec is cast in stone, for extra credit
you might want to think about doing more than just one
measure-convert-display cycle per minute.

--
JF

REm...@gmail.com

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Dec 10, 2006, 5:38:40 PM12/10/06
to
Cool. I just sent you an email with my current-state schematics. Thanks
for the description of the multiply by 4 hint- I totally get it now. I
also think that I understand theoretically how this could work now, but
still dont get how the BDC and the counter would actually fit into the
circuit? Just to clarify, is the counter just a series of JK flip
flops? Hmm...

R.

Joerg

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Dec 10, 2006, 7:04:00 PM12/10/06
to
REm...@gmail.com wrote:

> But how exactly does one reset the counters? Is it just a matter of
> sending that pulse every 60 seconds to a reset terminal? Also, do you
> have any suggestions for specific counters to use?
>

Please post at the bottom of messages, not at the top. Makes it easier
to read.

You can reset counters via a pulse on the reset line. Make sure to use
counters with unconditional reset, not some where the reset will only
happen upon the next clock.

--
Regards, Joerg

http://www.analogconsultants.com

Luhan

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Dec 10, 2006, 8:12:59 PM12/10/06
to

REm...@gmail.com wrote:
> Cool. I just sent you an email with my current-state schematics. Thanks
> for the description of the multiply by 4 hint- I totally get it now. I
> also think that I understand theoretically how this could work now, but
> still dont get how the BDC and the counter would actually fit into the
> circuit? Just to clarify, is the counter just a series of JK flip
> flops? Hmm...

What school are you attending where they teach you how to do outdated
designs??? Just glad the teacher didn't insist on you doing it all
with tubes and relays! Really, get with it dude and learn why we do
all this with microcontrollers today.

Luhan

REm...@gmail.com

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Dec 10, 2006, 8:26:11 PM12/10/06
to
haha, I KNOW! Not to mention, the teacher gave us this project just
recently and expects us to complete it all during exam week!

Rachel

Luhan

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Dec 11, 2006, 7:01:48 AM12/11/06
to

REm...@gmail.com wrote:
> haha, I KNOW! Not to mention, the teacher gave us this project just
> recently and expects us to complete it all during exam week!

They got you using hardware logic to do heart monitoring while I'm
using micros to do a yoyo.

http://members.cox.net/berniekm/yoyo.html

Luhan :)

jasen

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Dec 11, 2006, 4:42:55 AM12/11/06
to

I note you're not using a microcontroller, I'll assume there's a reason
for that.

some hints, look into using counters that can drive the display directly,
or maybe BCD counters and BCD-TO-7segent converter chips.

at the end of the 45 second period you need to send a reset pulse to the
counters. a R-C high-pass filter could be one way to do that.

Bye.
Jasen

jasen

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Dec 11, 2006, 5:00:58 AM12/11/06
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Chill! slow rate logic is good for teaching, you can debug it with a bunch
of LEDs.

Sure a micro coild solve this task with more accuracy and less hardware, but it
doesn't teach clocks, gates, counters, and latches.

Bye.
Jasen

jasen

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Dec 11, 2006, 4:50:42 AM12/11/06
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On 2006-12-10, REm...@gmail.com <REm...@gmail.com> wrote:
>
> I have a few silly questions- I'm not too familar with all of this
> stuff soo....
>
> -are you saying I should use three decade counters together? how does
> one set them up to count together?

have you looked at the data sheet for these parts?

> - what is a binary divider?

divide-by-two counter, eg: flip-flop with D wired to Q-bar

What is "Q" output?

non-inverting

Would I set the "Q"

> output to the reset terminal of the coutners to that they reset every
> 60 seconds?
> - what are quad latches?

google for a datasheet.


Bye.
Jasen

REm...@gmail.com

unread,
Dec 11, 2006, 9:33:50 AM12/11/06
to

Thanks for the input Jasen! So why do you say I should send a reset
pulse every 45 seconds? Wouldn't I want to do it every 60 seconds?
and...how would a high pass filter do the trick? Just have its cutoff
frequency at a 1/60 seconds?? I was thinking about sending a pulse
every 60 to the reset terminal using an astable multivibrator. Thoughts
on this?

Thanks again!

Rachel

Luhan

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Dec 11, 2006, 9:47:57 AM12/11/06
to

jasen wrote:

> > What school are you attending where they teach you how to do outdated
> > designs??? Just glad the teacher didn't insist on you doing it all
> > with tubes and relays! Really, get with it dude and learn why we do
> > all this with microcontrollers today.
>
> Chill! slow rate logic is good for teaching, you can debug it with a bunch
> of LEDs.
>
> Sure a micro coild solve this task with more accuracy and less hardware, but it
> doesn't teach clocks, gates, counters, and latches.

Should you still be teaching clocks, gates, counter etc when they are
not used in applications like this assignment? Is this is history
class? That wont teach you how to use micro's and debug the code.
Unless lesson assignment #2 is to do the same project with a micro.

My apologies to the OP for not providing an answer appropriate to the
question, but I quit doing any hardware logic over 10 years ago.

Luhan

Jan Panteltje

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Dec 11, 2006, 10:12:09 AM12/11/06
to
On a sunny day (11 Dec 2006 06:47:57 -0800) it happened "Luhan"
<luh...@yahoo.com> wrote in
<1165848477.6...@80g2000cwy.googlegroups.com>:

>
>My apologies to the OP for not providing an answer appropriate to the
>question, but I quit doing any hardware logic over 10 years ago.

It is hardware logic all over again in FPGA these days.
Although it is the difficult route, I think Altera has the 7400
series as HDL modules.


Luhan

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Dec 11, 2006, 10:27:25 AM12/11/06
to

My error. I went from hardware logic design to 8080/Z80/68000/8748/PIC
but never made the jump to FPGA. (still have not personally had any
need for them).

Luhan

sunji...@gmail.com

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Dec 11, 2006, 11:34:34 AM12/11/06
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Rachel, this is cheating! Im reporting you...just kidding, please share
anything you find out.

Thanks,
Dan

Jan Panteltje

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Dec 11, 2006, 11:49:16 AM12/11/06
to
On a sunny day (11 Dec 2006 07:27:25 -0800) it happened "Luhan"
<luh...@yahoo.com> wrote in
<1165850845.6...@f1g2000cwa.googlegroups.com>:

There are a few things where FPGA makes sense, speed is one of these.
The other thing is that you can do things in parallel.
The third is perhaps the incredible amount of IO pins and standards
supported.
The drawback is price, and the incredible amount of IO pins :-)
(that then translate to ballgrid packages).
There are more thing of course.
Yes I went the same path, but left out the 68000, did other processors,
but still have a 68000 laying about somewhere :-)

REm...@gmail.com

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Dec 11, 2006, 4:11:33 PM12/11/06
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I'll let ya know if I get anything useful!.....

Rachel

> > Rachel- Hide quoted text -- Show quoted text -

John Fields

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Dec 11, 2006, 4:51:03 PM12/11/06
to
On 10 Dec 2006 14:38:40 -0800, REm...@gmail.com wrote:

>Cool. I just sent you an email with my current-state schematics. Thanks
>for the description of the multiply by 4 hint- I totally get it now. I
>also think that I understand theoretically how this could work now, but
>still dont get how the BDC and the counter would actually fit into the
>circuit? Just to clarify, is the counter just a series of JK flip
>flops? Hmm...

---
Yeah. JK's or D's, but they're wired to output a pulse when they
overflow from 9 to 0 if they're counting up, and that pulse can be
used in a variety of ways to get the next counter upstream to
increment. Or for other stuff.

I found a neat way to do the multiply-by-four and I'll email you a
copy of the schematic as well as post it to abse with your
schematics so those interested can see it as well.

It'll be an hour or so...

--
JF

Rich Grise

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Dec 11, 2006, 8:27:29 PM12/11/06
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On Sun, 10 Dec 2006 09:28:02 -0800, REmmel8 wrote:
> I am in DESPERATE need of some advice here. I am working on a project
> for my basic electronics design class. Here is what I need to do...
>
> Design a heartrate counter that
> -uses 2 electrodes as the signal source, removes high frequency noise
> - counts pulses for 15 seconds every minute
> - displays the per minute heart rate for 45 seconds on a three-digit
> digital display
> - reset the count every 60 seconds and restart the counter
>
> So far, I've got a heart rate pulse going into the counter for 15
> seconds every minute. For the other 45 seconds of the minute, nothing
> feeds into the counter. (This was done using filters, a comparator, a
> 15 second astable multivibrator, 2 bit counter, nor gate, and an and
> gate)
>
> So right now I need to figure out how to:
> - reset the counter every 60 seconds
> - connect the counter up to a three-digit digital display
>
> I would be SO GREATFUL if someone could help me out with the counter
> reset and display portion of this-
>

I once worked with a system that used digital filters to recognize a
QRS, and just counted microseconds from one to the next and divided
(to go from rep time to rep rate; scaled, of course. :-) )

I think they kept a running average, so the rate didn't change
abruptly if there was variation in the time from one beat to the
next. Even with that, the display was more like real-time than
what you're suggesting.

However, if you're locked in, here are a couple of answers:

To reset the counter, you just need a timer/counter that issues a
"reset" pulse every 60 seconds.

To connect the counter to a display, you need a binary/BCD converter,
and 7-segment decoder/drivers, and the displays.

Good Luck!
Rich

jasen

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Dec 12, 2006, 2:42:23 AM12/12/06
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On 2006-12-11, REm...@gmail.com <REm...@gmail.com> wrote:

> jasen wrote:

>> some hints, look into using counters that can drive the display directly,
>> or maybe BCD counters and BCD-TO-7segent converter chips.
>>
>> at the end of the 45 second period you need to send a reset pulse to the
>> counters. a R-C high-pass filter could be one way to do that.

> Thanks for the input Jasen! So why do you say I should send a reset


> pulse every 45 seconds? Wouldn't I want to do it every 60 seconds?
> and...how would a high pass filter do the trick? Just have its cutoff
> frequency at a 1/60 seconds?? I was thinking about sending a pulse
> every 60 to the reset terminal using an astable multivibrator. Thoughts
> on this?

I meant the 45 that comes after the 15, that'd work.


I can't say for sure but I suspect there's marks given for meating the
specification exactly, so if you add features not in the specification
(like background counting) you'd better make them switchable.

the multiply by four can be done using a monostable that turns on an
astable long enough to let 4 pulses out.

Bye.
Jasen

John Fields

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Dec 12, 2006, 6:00:12 PM12/12/06
to
On 12 Dec 2006 07:42:23 GMT, jasen <ja...@free.net.nz> wrote:

>the multiply by four can be done using a monostable that turns on an
>astable long enough to let 4 pulses out.

---
Good idea; it's on abse. :)


--
JF

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