Wanted: LM-709 (Spice model) National Op-Amp
Neil
National semiconductor. I asked intusoft, cause they have a free model
service. I bought their entry level software ICAP/4 8.3.3 from a dealer
purchased in 2000. For reasons I won't mention, I was denied the
request from their sales department.
I was going to email National, but from what I read in Bob's book
"Troubleshooting Analog circuits" he doesn't like S.P.I.C.E.
and for good reason...........:)
Any help on this request would be great....
Thanks
Neil
Kevin Aylward
> Looking for a spice model or subcircuit netlist for the LM709 from
> National semiconductor.
Why?
Its a 30 year old part. No one in their right mind is going to use it.
>I asked intusoft, cause they have a free model
> service. I bought their entry level software ICAP/4 8.3.3 from a
> dealer purchased in 2000.
You have my sympathies.
>For reasons I won't mention, I was denied
> the request from their sales department.
>
> I was going to email National, but from what I read in Bob's book
> "Troubleshooting Analog circuits" he doesn't like S.P.I.C.E.
> and for good reason...........:)
He has no good reason. Spice is absolutely indispensable in analogue ic
design.
Those that don't use spice for general analogue design have simply
missed the boat. Times have moved on, unfortunately, it seems some
haven't.
Kevin Aylward
informati...@anasoft.co.uk
http://www.anasoft.co.uk
SuperSpice, a very affordable Mixed-Mode
Windows Simulator with Schematic Capture,
Waveform Display, FFT's and Filter Design.
Jim Thompson
So why is it that Intusoft won't support you, and why is it that you
haven't E-mailed National?
...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |
I love to cook with wine. Sometimes I even put it in the food.
Anton Erasmus
>Looking for a spice model or subcircuit netlist for the LM709 from
>National semiconductor. I asked intusoft, cause they have a free model
>service. I bought their entry level software ICAP/4 8.3.3 from a dealer
>purchased in 2000. For reasons I won't mention, I was denied the
>request from their sales department.
>
>I was going to email National, but from what I read in Bob's book
>"Troubleshooting Analog circuits" he doesn't like S.P.I.C.E.
>and for good reason...........:)
>
From what I can recall of Bob's arguments against spice, was the same
as someone saying they do not like Word Processors, becuase they read
a badly written novel. If one uses SPICE incorrectly, then one gets
bogus results, if one understands it's limits and uses it correctly,
then it is a valuable tool.
Regards
Anton Erasmus
Neil
have to ask him(Robert Pease, National Engineer),he has spoke openly
about his views on spice at seminars accross United States, I read some
of his articles, I tend to agree. May be you should read the book I
mentioned in my POST, and make your own opinion. I use to trust spice
too.......... I own a few of the SPICE software programs, it's great
tool for learning, however......I'm sticking my original POST the
search for the model LM709
Yes, Kevin the part I admit is obselete, but believe it or not have a
few of these in my junk drawer in the T0-99 Pkge. Why ? Analog
Enginners love this kind of stuff, I very fond analog myself, I perfer
it over digital. Digital takes all the work, and fun out of
Electronics!!
Neil
JeffM
>and make your own opinion.
Perhaps it was too subtle for you, so I'll highlight it for you.
http://groups.google.com/group/sci.electronics.cad/browse_frm/thread/fd9f4d78f037c5d1/c2037bd721acf107?q=anasoft+SuperSpice+Kevin-Aylward
Kevin is not only an engineer; not only a SPICE user;
he in fact PRODUCES a well-known variant.
Because he *maintains* it (read: bug reports),
he is very aware of the shortcommings of it
and he tweaks his software to adapt to those as they arise.
Neil
work. Funny I thought most models work in SPICE 3F5, I don't
understand that either. Then the issue with the serial number, they
might not have a record of it anymore, but yet I talked to Bill several
times in California through email, and he always gave me support. The
dealer where I bought it from went out of business, so now Intusoft has
cut them loose, sort of speak, and ALL ICAP/4 products they sold to
their customers are not supported anymore.
I suspect the company is under new management, a real problem
especially if you purchased your software more then 5 years ago, I just
work with what I have, it's good enough for me!!
I won't email National for the SPICE model cause the part is obsolete,
but you can still buy them if your willing pay $10 bucks per
amp. I remember 4 years ago oilfield compaines were paying upwards of
over $30 dollars for a Harris HA-2520 Op-Amp..............very rare,
hard to find, and I have 2 in my parts drawer...........:)
Neil
Neil
Neil
analogue design, but one must follow the Rules of spice, and adapt..
Convergence is very fragile...................
Neil
analog
Neil wrote:
> Looking for a spice model or subcircuit netlist for the LM709
> from National semiconductor.
Why don't you just enter the equivalent schematic from the data
sheet (page 3 of the pdf - National 1995)? It only has thirteen
each of transistors and resistors (wouldn't take more than about
thirty minutes to get something up and running).
And why aren't you using Linear Technology's LTspice? It's free,
unlimited, completely general purpose and is faster and works
better than either Pspice or ICAP.
http://www.linear.com/company/software.jsp
Before I found LTspice I was a die-hard fan of Pspice (I have no
affiliation with Linear Technology, btw).
Robert
> From what I can recall of Bob's arguments against spice, was the same
> as someone saying they do not like Word Processors, becuase they read
> a badly written novel. If one uses SPICE incorrectly, then one gets
> bogus results, if one understands it's limits and uses it correctly,
> then it is a valuable tool.
>
> Regards
> Anton Erasmus
Oh, it was a little more than that.
What he said finally drove him up a wall was he was trying to get a circuit
to converge with great frustration and IIRC he came in one morning and the
previous night's run had converged.
When he examined the netlist he found that he had (during the
troubleshooting effort) left in a couple of components (a resistor and
capacitor?) connected to ground with the other ends disconnected. They
should have had no effect on a real circuit.
That made it converge. Taking the components completely out of the circuit
caused the original non-convergence.
That kind of non-real World physical behavior, he calls it "lying", drives
him crazy.
Knowing a little bit about the algorithms of Spice I can perhaps guess that
leaving the circuit components in caused the circuit's Admittance Matrix to
be assembled in a not so ill conditioned State. But it would only be a
guess.
Robert
Kevin Aylward
> ha ha...ha, boat huh? you mean train don't you? Looks like your going
> have to ask him(Robert Pease, National Engineer),he has spoke openly
> about his views on spice at seminars accross United States,
Yes, I know all about Bob. He is misguided on this.
>I read
> some of his articles, I tend to agree. May be you should read the
> book I mentioned in my POST, and make your own opinion.
I have made my own opinion. Its based on being both an analogue ic and
board designer for er.. some years, and knowing how its actually done in
practise.
I use to
> trust spice too..........
Of courses Spice has its limitations, just as a screwdriver does.
However, this doesn't mean that Spice shouldn't be used as the
fundamental design tool for analogue design.
You are obviously a newbie on this so I'll point out one or two issues.
Lets take analogue ic design. How do you propose to design a 1000
transistor circuit? A 10,000 transistor circuit? What's the fab cost?
Turn around time? You reckon that you can solve the equations by hand?
This is the deal. 10,000s of analogue ic designers, that is *all* of
them use spice as *the* number one de-facto method of designing
circuits. Period. It cant be any other way, today. Its simply not
possible to reliably design such circuits without spice. The designs are
two large and complex and cost too way much to fab. Its typically a 40
hour day, 5 days a week of solid simulation. This *is* the way it is.
Its quite common for people to design large analogue circuits, and have
them work 100% with first pass silicon. Some even get a $50k bonus on
that condition. Those that suggest that Spice is a side line tool, are
on a par to claiming that a Bible is just a superficial add-on to the
x-tian religion. They are quite oblivious to what practising analogue ic
designers use as a matter of course on a daily basis.
For the most part, designs don't work because of simply neglecting to do
a specific simulation, rather then the simulation itself not reflecting
real life. Its hard to think of all operating conditions. However, most
spices have various feature that allow worst case analysis to be
performed and other such multyruns. One might typically do 10,000
variations of a circuit. How do you propose to do such checking in the
real world?
Spice is like anything else, GIGO. Realistically, there is no
alternative. Even a 1 transistor circuit has no exact analytical
solution. The key is getting good models, and understanding the model
failings and compensating for that in the design.
Of course designs have to be physically checked on the bench, but if you
do know what you are doing this checking can be very, very, minimal.
Down to just producing a data sheet for example. I am sure Jim T. could
give us a few examples of right first time:-)
Anton Erasmus
I think a great many (most ?) problems with SPICE and other simulation
programs in general are actually due to problems of the "Floating
Point" data type. AFAIK the total reason for being of the floating
point data type was to get a reasonable range and precision using as
little memory as possible. Today memory is not a problem anymore, and
one can use a fixed point number format with the desired range and
precision necessary for any simulation. A typical construct in many
simulations are:
(x0-x1)/k where x0 and x1 are almost equal. This causes problems in
floating point. If x0 an x1 are say 1.0 and 1.0001 then it is not a
problem. If it is 1000000000.0 and 1000000000.0001, then it bombs out.
I personally think that with todays systems, the use of floating point
should be banned, and in stead large fixed point numbers should be
used. The only disadvantage compared to floating point is that it uses
more memory. (And the little problem that almost no currently used
languages supports them as standard)
Regards
Anton Erasmus
Stuart Brorson
: Well..........The sales manager says the software is too old and won't
: work.
[. . . .]
: I suspect the company is under new management, a real problem
: especially if you purchased your software more then 5 years ago, I just
: work with what I have, it's good enough for me!!
Heh. Another reason why open-source EDA tools are preferable over
secret-source ones: No obsolescence. In particular, no obsolescence
based upon stupid political or marketing considerations.
http://geda.seul.org/
http://ngspice.sourceforge.net/
SDB
Stuart Brorson
: What he said finally drove him up a wall was he was trying to get a circuit
: previous night's run had converged.
: When he examined the netlist he found that he had (during the
: troubleshooting effort) left in a couple of components (a resistor and
: capacitor?) connected to ground with the other ends disconnected. They
: should have had no effect on a real circuit.
: That made it converge. Taking the components completely out of the circuit
: caused the original non-convergence.
: That kind of non-real World physical behavior, he calls it "lying", drives
: him crazy.
I'll add my $0.02 here; perhaps it is useful.
On the SPICE vs. no SPICE debate: Designing modern analog ICs [1]
would be well-neigh impossible without SPICE due to modern circuit
size and complexity. Other posters have already pointed this out.
Also, when designing an IC, you control nearly
all parameters of the components you use, and you have highly accurate
models of your transistors available. Therefore, SPICE can do a good
job predicting circuit behavior.
Designing analog boards, on the other hand, is different. Most of the
time, the models you have at your disposal are vendor macromodels,
which are not device-level models of the actual components you use.
Rather, they are idealizations which attempt to model the important
features of the device's performance in its operating region.
Vendors won't give you real device-level models of their components
because then you could reverse-engineer their circuits. Therefore,
the SPICE models you use in board design are generally useful, but are
not totally accurate.
Also, when designing boards, stray capacitances are not as well
understood or controlled as they are when designing ICs. (Perhaps if
you purchase a $100K tool from one of the big EDA vendors you can
extract the strays from a PCB layout, but I have never seen that done
in real life.) Therefore, the fabbed board will always act
differently from any SPICE simulation, particularly if your circuit is
sensitive to strays.
Therefore, for IC design, SPICE is indespensible. For board
design SPICE provides good guidance, but isn't the last word in
predicting circuit performance.
As for the issue of convergence mentioned above: My experience is
that if your SPICE simulation behaves strangely or doesn't converge,
it is likely that you have a fundamental problem with your circuit.
When a circuit doesn't converge, besides looking for floating nodes, I
always examine my circuit thoroughly looking for subtle mess-ups such
as two different current sources in series, or two different voltage
sources in parallel. More often than not, I find that I have
committed some kind of error.
Stuart
[1] Note bene: I am not an IC designer, so others can speak with
more authority about this. Nonetheless, my point is general enough to
not require detailed, expierential knowledge of IC design.
Helmut Sennewald
news:1126944635.5...@g44g2000cwa.googlegroups.com...
Hello Neil,
If you look with Google (uA709 spice) then you will find two
sources for a model.
One is in the library file "opamp.lib" from Microsim/Cadence.
It's a very old behavioral model and I have not tested it.
I don't have a PSPICE license and so I don't would use it.
In this "summer2000.pdf" is a netlist of a test circuit with
the LM/uA709. It's nothing else than an exact copy of the
schematic of the LM709 from National's datasheet.
http://www.spectrum-soft.com/down/summer2000.pdf
http://www.national.com/ds.cgi/LM/LM709.pdf
I used this datasheet and made my own model. I would be
interested to get some feedback about the parameters of my
"invented" transistor models. I have used the reference
designators from the the datasheet to make it easier to
modify the model if necessary.
THe model agrees very well with the performance of the datasheet.
It's a free model. Feel free to use/copy/modify.
I have also made a complete example for LTspice with
a schematic based on a nice symbol and a model file.
Additionally I have made a hierachical block design
which allows to probe down the hierarchy (in the schematic)
to every node of the LM709.
LTspice is free SPICE from www.linear.com .
http://ltspice.linear.com/software/swcadiii.exe
The LTspice user group:
http://groups.yahoo.com/group/LTspice
Download the files from here within the Yahoo group.
Files > Lib > LM709_uA709
Best regards,
Helmut
* LM709 SPICE Model
* Datasheet: http://www.national.com/ds.cgi/LM/LM709.pdf
* Helmut Sennewald
*
* Input compensation B (8) --------------------\
* Input compensation A (1) -----------------\ |
* Output compensation (5) --------------\ | |
* Output (6) -----------------------\ | | |
* Negative supply (4) ----------\ | | | |
* Positive supply (7) -------\ | | | | |
* Inverting input (2) ----\ | | | | | |
* non-inverting input(3) | | | | | | |
* | | | | | | | |
.subckt LM709 In+ In- V+ V- OUT COMP A B
Q7 v+ N001 N005 0 NPN1
R5 v+ N001 10k
Q3 N001 N006 N003 0 NPN1
Q4 N001 N003 N002 0 NPN1
R1 N005 N006 25k
R3 N003 N004 3k
Q15 N004 N004 N002 0 NPN1
R2 N005 A 25k
Q2 A in- N007 0 NPN1
Q1 N006 in+ N007 0 NPN1
Q5 B A N009 0 NPN1
R4 N009 N004 3k
Q6 B N009 N002 0 NPN1
R6 v+ B 10k
R8 N002 N011 3.6k
R10 N011 N010 10k
Q10 N010 N010 V- 0 NPN1
Q11 N007 N010 N008 0 NPN1
R11 N008 V- 2.4k
R9 N012 N011 10k
Q8 v+ B N013 0 NPN1
R7 N013 N012 1k
Q9 comp N002 N012 0 PNP1
R13 N014 V- 75
R12 comp N014 10k
Q12 N015 comp N014 0 NPN1
Q13 V- N015 out 0 PNP1
Q14 v+ N015 out 0 NPN1
R14 v+ N015 20k
R15 N012 out 30k
.MODEL NPN1 NPN (BF=100 VAF=50 RB=100 CJE=4P CJC=2P CJS=2P TF=0.5N TR=10N)
.MODEL PNP1 PNP (BF=15 VAF=50 CJC=4P CJE=8P RB=100 TF=20N TR=200N)
.ends LM709
Robert
"Stuart Brorson" <s...@cloud9.net> wrote in message
news:11iqrok...@corp.supernews.com...
>
> As for the issue of convergence mentioned above: My experience is
> that if your SPICE simulation behaves strangely or doesn't converge,
> it is likely that you have a fundamental problem with your circuit.
> When a circuit doesn't converge, besides looking for floating nodes, I
> always examine my circuit thoroughly looking for subtle mess-ups such
> as two different current sources in series, or two different voltage
> sources in parallel. More often than not, I find that I have
> committed some kind of error.
>
> Stuart
>
> [1] Note bene: I am not an IC designer, so others can speak with
> more authority about this. Nonetheless, my point is general enough to
> not require detailed, expierential knowledge of IC design.
Yes your point is general and has nothing to do with what I said.
Two passive components, a resistor and a cap, left in a netlist connected
to ground WITH the other end disconnected causes a circuit to converge when
without them it does not. Bob went on to say (tongue in cheek?) that perhaps
non-functioning components strewn randomly through a design could be an add
on Spice convergence feature.
That does not have anything to do with the type of errors you mentioned. And
the existence of such a problem points to deeper problems with Spice than
you mention.
It is quite possible it was a problem with an early Spice Algorithm in how
the numbers were crunched (ill conditioned Matrix were favorite weasel words
at one time).
Wouldn't know. Would know that the problem (if it is as I remembered) has
nothing to do with the problems you mention.
Robert
Jim Thompson
[snip]
>
>Two passive components, a resistor and a cap, left in a netlist connected
>to ground WITH the other end disconnected causes a circuit to converge when
>without them it does not. Bob went on to say (tongue in cheek?) that perhaps
>non-functioning components strewn randomly through a design could be an add
>on Spice convergence feature.
Though Bob Pease is a fellow classmate of mine at MIT, he is very
often quite full of it... a good portion of what he propounds is just
plain urban legend BS.
The way he typically spouts I often wonder if he's ever used Spice at
all.
>
>That does not have anything to do with the type of errors you mentioned. And
>the existence of such a problem points to deeper problems with Spice than
>you mention.
A good simulator will report floating nodes.
>
>It is quite possible it was a problem with an early Spice Algorithm in how
>the numbers were crunched (ill conditioned Matrix were favorite weasel words
>at one time).
>
>Wouldn't know. Would know that the problem (if it is as I remembered) has
>nothing to do with the problems you mention.
>
>Robert
>
>
>
>
Robert
"Jim Thompson" <thegr...@example.com> wrote in message
news:aksri1p5jplv8n72i...@4ax.com...
> On Sun, 18 Sep 2005 21:02:25 GMT, "Robert" <Rob...@yahoo.com> wrote:
>
> [snip]
>>
>>Two passive components, a resistor and a cap, left in a netlist connected
>>to ground WITH the other end disconnected causes a circuit to converge
>>when
>>without them it does not. Bob went on to say (tongue in cheek?) that
>>perhaps
>>non-functioning components strewn randomly through a design could be an
>>add
>>on Spice convergence feature.
>
> Though Bob Pease is a fellow classmate of mine at MIT, he is very
> often quite full of it... a good portion of what he propounds is just
> plain urban legend BS.
Sure. But I don't think he got such simple details wrong. And I don't think
he was just making up a story. Possible, but not likely.
> The way he typically spouts I often wonder if he's ever used Spice at
> all.
>
>>
>>That does not have anything to do with the type of errors you mentioned.
>>And
>>the existence of such a problem points to deeper problems with Spice than
>>you mention.
>
> A good simulator will report floating nodes.
Who said he had a good simulator? I imagine it was a company version of
Spice from back in the days when they were still working the kinks out. If
you want I can dig up the reference from my old copy of his book.
Robert
Stuart Brorson
: "Stuart Brorson" <s...@cloud9.net> wrote in message
[ . . . .]
: news:11iqrok...@corp.supernews.com...
:> As for the issue of convergence mentioned above: My experience is
:> that if your SPICE simulation behaves strangely or doesn't converge,
:> it is likely that you have a fundamental problem with your circuit.
:> When a circuit doesn't converge, besides looking for floating nodes, I
:> always examine my circuit thoroughly looking for subtle mess-ups such
:> as two different current sources in series, or two different voltage
:> sources in parallel. More often than not, I find that I have
:> committed some kind of error.
: Yes your point is general and has nothing to do with what I said.
: Two passive components, a resistor and a cap, left in a netlist connected
: to ground WITH the other end disconnected causes a circuit to converge when
: without them it does not. [. . . .]
You are dead wrong. Here's what I wrote above:
:> When a circuit doesn't converge, besides looking for floating
:> nodes . . . . More often than not, I find that I have
:> committed some kind of error.
A cap connected to GND with the other end open is a floating node.
Avoiding floating nodes is SPICE 101 knowledge.
In any line of work, if you want to use a tool, then you need to have
some idea about how it works. Or do you use a hammer to pound screws?
: That does not have anything to do with the type of errors you mentioned. And
: the existence of such a problem points to deeper problems with Spice than
: you mention.
My point is that SPICE is only as good as the models you use. The
models used for IC design are pretty good, whereas those used for
board design are useful but limited.
Your arguments about the problems with SPICE are vague,
general, and aren't based on any detailed knowledge of SPICE's methods
and limitations that I can see. They seem to be more of an objection
to computer simulation, and your only evidence is the opinion of Bob
Pease (whose job it is to make outre claims as part of
National's marketing effort). If you do have something specific and
knowledgable about SPICE's limitations to say, I'd be interested in
hearing it. Otherwise, I'll bid this thread adieu.
Anyway, you are welcome to not use SPICE in your design work -- if you
do design at all. Personally, I would like to see you explain to a
job interviewer that you are an electronics engineer who refuses to
use SPICE! *snort*
Stuart
BruceR
Hi Neil,
I was just looking through the samples that came with MicroCap 6.0.8
(w32) and found UA709.CIR & UA709.CKT. Perhaps these are what you want?
Regards, BruceR
Jim Thompson
He castigates Spice to this very day. When we were fellow students at
MIT he was a wee bit kooky (charging up flights of stairs like Teddy
Roosevelt in "Arsenic and Old Lace")... and he's still kooky.
Have you been to one of his "seminars"? I went to one last year that
was here in Phoenix, just to say "Hi". Technical content zero, funny
marketing presentation, yes.
His columns seem to have virtually no technical comment anymore, just
what vitamins he's taking, and how long he can go without taking a
leak ;-)
Chuck Harris
>
> He castigates Spice to this very day. When we were fellow students at
> MIT he was a wee bit kooky (charging up flights of stairs like Teddy
> Roosevelt in "Arsenic and Old Lace")... and he's still kooky.
Might it be that he liked the exercise (an unusual thing for a toolie to
to be sure)? I generally take stairs over elevators, or escalators, and
park in the distant spots in parking lots... Does that make me kooky?..
or perhaps just someone who searches for exercise where he can find it?
Now, if he sings marching songs, at the top of his lungs, as he mounts
the stairs, that would be kooky!
> Have you been to one of his "seminars"? I went to one last year that
> was here in Phoenix, just to say "Hi". Technical content zero, funny
> marketing presentation, yes.
>
> His columns seem to have virtually no technical comment anymore, just
> what vitamins he's taking, and how long he can go without taking a
> leak ;-)
Hmmm? Sounds thematically similar to some of your postings about
your colon, and stuff ;-)
-Chuck
Jim Thompson
<cf-NO-SP...@erols.com> wrote:
>Jim Thompson wrote:
>
>>
>> He castigates Spice to this very day. When we were fellow students at
>> MIT he was a wee bit kooky (charging up flights of stairs like Teddy
>> Roosevelt in "Arsenic and Old Lace")... and he's still kooky.
>
>Might it be that he liked the exercise (an unusual thing for a toolie to
>to be sure)? I generally take stairs over elevators, or escalators, and
>park in the distant spots in parking lots... Does that make me kooky?..
>or perhaps just someone who searches for exercise where he can find it?
I used to do that, now I'm into Post Polio Syndrome :-(
>
>Now, if he sings marching songs, at the top of his lungs, as he mounts
>the stairs, that would be kooky!
I don't remember if he screamed anything or not, but he sure drew a
lot of attention, all dressed out in lederhosen and roaring up the
stairs.
>
>> Have you been to one of his "seminars"? I went to one last year that
>> was here in Phoenix, just to say "Hi". Technical content zero, funny
>> marketing presentation, yes.
>>
>> His columns seem to have virtually no technical comment anymore, just
>> what vitamins he's taking, and how long he can go without taking a
>> leak ;-)
>
>Hmmm? Sounds thematically similar to some of your postings about
>your colon, and stuff ;-)
>
>-Chuck
I don't get paid :-(
Chuck Harris
>>Might it be that he liked the exercise (an unusual thing for a toolie to
>>to be sure)? I generally take stairs over elevators, or escalators, and
>>park in the distant spots in parking lots... Does that make me kooky?..
>>or perhaps just someone who searches for exercise where he can find it?
>
>
> I used to do that, now I'm into Post Polio Syndrome :-(
That's a major pisser! I have a cousin who went most of her life with
a brace on one knee, but otherwise ok, who entered Post Polio Syndrome,
and found that she could no longer do any kind of repetitive work with
her hands, or back... not even computer work... Her doctor told her that
basically, she has a certain number of movement cycles left in her hands
and back. When they are spent, she will be in full pain, full time.
As I understood things, the sheaths that surround the nerves in her body
are deteriorating. Those that are in areas with a lot of motion are going
faster. When the sheaths are gone, parts of the nerves that are never
supposed to be exposed are going to be fully exposed, and firing at will.
>
>
>>Now, if he sings marching songs, at the top of his lungs, as he mounts
>>the stairs, that would be kooky!
>
>
> I don't remember if he screamed anything or not, but he sure drew a
> lot of attention, all dressed out in lederhosen and roaring up the
> stairs.
Ok, now that is kooky! Lederhosen? Does anybody actually think that
lederhosen are in style for any occasion? ... well, other than during
Octoberfest, that is.
>>>Have you been to one of his "seminars"? I went to one last year that
>>>was here in Phoenix, just to say "Hi". Technical content zero, funny
>>>marketing presentation, yes.
>>>
>>>His columns seem to have virtually no technical comment anymore, just
>>>what vitamins he's taking, and how long he can go without taking a
>>>leak ;-)
>>
>>Hmmm? Sounds thematically similar to some of your postings about
>>your colon, and stuff ;-)
>>
>>-Chuck
>
>
> I don't get paid :-(
>
> ...Jim Thompson
You've got a point...
-Chuck
Robert
> Robert <Rob...@yahoo.com> wrote:
> : "Stuart Brorson" <s...@cloud9.net> wrote in message
> [ . . . .]
> : news:11iqrok...@corp.supernews.com...
> :> As for the issue of convergence mentioned above: My experience is
> :> that if your SPICE simulation behaves strangely or doesn't converge,
> :> it is likely that you have a fundamental problem with your circuit.
> :> When a circuit doesn't converge, besides looking for floating nodes, I
> :> always examine my circuit thoroughly looking for subtle mess-ups such
> :> as two different current sources in series, or two different voltage
> :> sources in parallel. More often than not, I find that I have
> :> committed some kind of error.
> [. . . .]
>
> : Yes your point is general and has nothing to do with what I said.
>
> : Two passive components, a resistor and a cap, left in a netlist
> connected
> : to ground WITH the other end disconnected causes a circuit to converge
> when
> : without them it does not. [. . . .]
>
> You are dead wrong. Here's what I wrote above:
>
> :> When a circuit doesn't converge, besides looking for floating
> :> nodes . . . . More often than not, I find that I have
> :> committed some kind of error.
You miss my point, again.
The circuit converged with the floating nodes. Or now that you've forced me
to go get the book and find his original comments they weren't floating
nodes.
They *were* a resistor and capacitor. And both were connected to one point
and from there tied to ground. Nothing else was connected to that one point
so they had no effect on the circuit action when they were left in.
Bob left them in, the circuit converged. Took them out and the circuit
didn't converge. He said they were originally in the circuit then commented
out. He accidentally removed the asterisk that commented them out. Pg 204 in
the Appendix G "More on Spice", Troubleshooting Analog Circuits, Copyright
1991.
That kind of non-physical behavior from Spice is what he was bitching about.
As well as a whole lot of other stuff that was less useful.
And yes, he was probably using an early version done by the company he
worked for.
> A cap connected to GND with the other end open is a floating node.
> Avoiding floating nodes is SPICE 101 knowledge.
[snip]
> My point is that SPICE is only as good as the models you use. The
> models used for IC design are pretty good, whereas those used for
> board design are useful but limited.
No. The example that I'm referring to from Bob has nothing to do with
models. Perhaps it has something to do with the early Spice Algorithms.
Don't know. And unlike you, I don't assume I know.
> Your arguments about the problems with SPICE are vague,
> general, and aren't based on any detailed knowledge of SPICE's methods
> and limitations that I can see. They seem to be more of an objection
> to computer simulation, and your only evidence is the opinion of Bob
> Pease (whose job it is to make outre claims as part of
> National's marketing effort).
No. His reported experience with a circuit that has noting to do with your
comments. He may have been wrong. Don't know. Don't think it's that likely
but it's certainly possible.
And no. I don't share his opinion of Spice or other Computer Simulation
tools. Wrong again. I am interested in what went wrong in his sim and what
that says about the algorithms of Spice. If it isn't completely different
from what he was working with.
>If you do have something specific and
> knowledgable about SPICE's limitations to say, I'd be interested in
> hearing it. Otherwise, I'll bid this thread adieu.
Bye.
>
> Anyway, you are welcome to not use SPICE in your design work -- if you
> do design at all. Personally, I would like to see you explain to a
> job interviewer that you are an electronics engineer who refuses to
> use SPICE! *snort*
Enjoy! You seem just as funny from this end.
Harmonic Balance simulators tend to be used more where I worked but the
company originally got PSpice to work on our RF circuits by doing our own
modeling. Spent many years with PSpice and Linear Simulators such as
Touchstone before moving into ADS.
> Stuart
>
Robert
>>
>
> He castigates Spice to this very day. When we were fellow students at
> MIT he was a wee bit kooky (charging up flights of stairs like Teddy
> Roosevelt in "Arsenic and Old Lace")... and he's still kooky.
>
> Have you been to one of his "seminars"? I went to one last year that
> was here in Phoenix, just to say "Hi". Technical content zero, funny
> marketing presentation, yes.
>
> His columns seem to have virtually no technical comment anymore, just
> what vitamins he's taking, and how long he can go without taking a
> leak ;-)
>
> ...Jim Thompson
Doesn't surprise me. Reminds me of people that took a life long aversion to
electronic calculators because slide rules were so much better.
Haven't been to any seminars. Did enjoy some of his technical articles on
Bandgaps and such on the National Web site. But they were mixed in with a
lot more non-technical stuff.
And as for "kooks", I've known a lot worse.
Robert
Anton Erasmus
I think a great many (most ?) problems with SPICE and other simulation
Anton Erasmus
Paul Rako
Bob Pease and Marcello, the guy that gets out National's
SPICE models I suppose I should toss in my two cents.
First, save any effort in contacting National.
We have better things to do then make SPICE models
for 30-year-old parts. It is interesting that just tonight
I was telling Bill Gross and Tim Regen from LT how the
709 was noisy-- I thought I had heard it from Pease
but Bill corrected me--the 741 was noisy, the 709 was
actually pretty good. And yeah, that is what Pease said
as well, I am geting old.
Next, it looks like a simple Google search would have
turned up something but thanks for this little tempest.
Next, there is a huge disconnect with people that use SPICE
for board-level and with people that use SPICE for IC design.
Yeah, just buy a UNIX workstation ($20k) buy Cadence (150k++)
and then run two departments-- one called "Process" and one
called "Modeling" ($5-10M) and yup, after 5 years or so you
will be able to get good results from SPICE. God bless you.
And, if you buy PSPICE for 10k and still spend the 5 or 10 million
those two departments, the modeling and process departments, you
can still get good results for transistor-level simulation. Linear Tech
uses PSPICE for IC design. I have been told that LT-Cad is just a
variant of PSPICE so I am somewhat baffled how people can claim it
works "better".
But, PSPICE will still have trouble converging and doing things with fast
edges or digital (mixed signal) stuff. That may be why National does not
release A to D converter SPICE models. Now with the transistor-level
models, Cadence and a weekend to run, an A to D can yield to SPICE, I
suspect that Thompson guy gets things to work.
But now I leave you IC designers.. .if you want, I can post the twenty
pages of emails I traded with Barrie Gilbert of Analog Devices over this
exact subject.
For board-level SPICE you have to be very careful. National's recent models
are very good. We even model noise-- just watch the Pease Show
(now called "Analog by Design") in a week or two. We just taped it yesterday.
We will show how you can check your models to see if the noise shows up
like in the real world. We will show National's WEBENCH filter designer SPICE
exactly matching Electronics Workbench MultiSim8 SPICE and a real-world
board I built, all agreeing within 1/2 dB. At 10kHz. Next I will build a
15MHz filter. That one will not do so well because all my board
strays will start effecting the circuit. Stay tuned.
But if you are pushing the edge (and why would you need to do
SPICE if you weren't), well, you better be very good to understand
all the limitations of board-level SPICE. You have to make sure
you have good models and test the models against the real world.
Next you have to model the board level stuff. Maybe buy Hyperlynx,
the 48 grand 2 1/2 D field-solver to see trace interaction.
Maxwell's Equations are always right. But you must build exact
3-D models of your circuit and have a lot of computer power.
And before you accuse Pease of being a hopeless curmudgeon, please
separate his "stage persona" from the real guy. I have seen him
tell a young guy who asked about SPICE the perfect response-- use
it carefully and a little at first and build on your correlations to
allow you to SPICE more and more stuff.
And Bob may be a "kook" but he is a truly brilliant man.
So is Barrie Gilbert.
And Jim Thompson.
I just want to get them together in a WWF ring one day.
Now this has been a great thread and it raises some truly great
issues for us at National Semiconductor. So when I go in tomorrow I
will be sure to get some answers to the question that seems most crucial:
"Bob, did you rally wear lederhausen in college?" And if the answer is
yes, "Were they lined with silk like the ones in the National Lampoon
Mr. Rogers' parody?"
Paul
Mike Engelhardt
> And, if you buy PSPICE for 10k and still spend the 5
> or 10 million those two departments, the modeling and
> process departments, you can still get good results for
> transistor-level simulation. Linear Tech uses PSPICE
> for IC design. I have been told that LT-Cad is just
> a variant of PSPICE so I am somewhat baffled how people
> can claim it works "better".
You don't know what you're talking about. First of all,
Linear has just about every SPICE simulator available.
The opamp people at Linear do tend to use PSPICE(the
Microsim/OrCAD/Cadence trademark) but that's because
opamps are simple IC's that don't need the best simulation
tools and have been done in PSPICE for very many years.
By LT-Cad, I assume you mean LTspice. The only way
that could be thought of a PSPICE variant would be
because we hired one of the founders of Microsim
at the start of the development of that project to
find out things like how much time and money it took
to develop. LTspice is otherwise a independently
developed version of SPICE and is the world's highest
performance SPICE with regard to speed, accuracy, and
robustness. Just because it runs the PSPICE syntax
extension doesn't mean it's a PSPICE variant. It is
fantastically more accurate that PSPICE. LTspice is
used internally as as upgrade from, e.g., both PSPICE
and hspice for internal IC design. My friends Bill
Gross and Tim Regen are application engineers and
won't know what the IC developers use to design LT
IC's besides possible opamps, not that I believe they
told you the misinformation you posted here.
--Mike
analog
Paul Rako wrote:
> Linear Tech uses PSPICE for IC design.
I have been told by Mike Engelhardt of LTC that this is simply untrue.
> I have been told that LT-Cad is just a variant of PSPICE[...]
I've use both and it most definitely is not.
> [...]so I am somewhat baffled how people can claim it works "better".
Obviously you have never tried it. :) 'Fess up now, how much actual
experience with which flavors of SPICE do you really have?
> But, PSPICE will still have trouble converging and doing things with
> fast edges or digital (mixed signal) stuff.
LTspice used properly has little problem with such things (but beware,
as always: garbage in - garbage out).
> That may be why National does not release A to D converter SPICE
> models.
Or maybe they are a bunch of hacks who should swallow their pride
and sign up for an LTspice seminar. :)
> But now I leave you IC designers.. .if you want, I can post the
> twenty pages of emails I traded with Barrie Gilbert of Analog
> Devices over this exact subject.
There recently was an interesting thread about Barrie Gilbert's AD534
on the LTspice Yahoo user's group.
> But if you are pushing the edge (and why would you need to do
> SPICE if you weren't), well, you better be very good to understand
> all the limitations of board-level SPICE. You have to make sure
> you have good models and test the models against the real world.
> Next you have to model the board level stuff. Maybe buy Hyperlynx,
> the 48 grand 2 1/2 D field-solver to see trace interaction.
> Maxwell's Equations are always right. But you must build exact
> 3-D models of your circuit and have a lot of computer power.
This is more bunk. All you need is a little plain old good engineering
judgment. I regularly get very good agreement with my board level
designs using just that and LTspice. It is fast and accurate, even for
for switching circuit (I rarely use LT models, btw, even though they
are excellent). Also, once one gets the knack (a few simple rules of
good practice and an occasional "trick" or two), LTspice can be made to
converge every time within short order. The methods are based on sound
reason, not magic floating components.
Regards -- analogspiceman
Jim Thompson
wrote:
>Wow. What a thread. Well, since I am a pal with both
>Bob Pease and Marcello, the guy that gets out National's
>SPICE models I suppose I should toss in my two cents.
>
[snip]
>
>And Bob may be a "kook" but he is a truly brilliant man.
>
>So is Barrie Gilbert.
>
>And Jim Thompson.
>
>I just want to get them together in a WWF ring one day.
>
[snip]
ROTFLMAO! I'll hit 'em with my cane ;-)
(Actually I've never met Barrie, though I've talked to him on the
phone a few times; and was a substitute speaker for him in Australia
back in 1986.)
Kevin Aylward
> Paul,
>
>> And, if you buy PSPICE for 10k and still spend the 5
>> or 10 million those two departments, the modeling and
>> process departments, you can still get good results for
>> transistor-level simulation. Linear Tech uses PSPICE
>> for IC design. I have been told that LT-Cad is just
>> a variant of PSPICE so I am somewhat baffled how people
>> can claim it works "better".
>
> You don't know what you're talking about. First of all,
> Linear has just about every SPICE simulator available.
> The opamp people at Linear do tend to use PSPICE(the
> Microsim/OrCAD/Cadence trademark) but that's because
> opamps are simple IC's that don't need the best simulation
> tools and have been done in PSPICE for very many years.
>
> By LT-Cad, I assume you mean LTspice. The only way
> that could be thought of a PSPICE variant would be
> because we hired one of the founders of Microsim
> at the start of the development of that project to
> find out things like how much time and money it took
> to develop. LTspice is otherwise a independently
> developed version of SPICE and is the world's highest
> performance SPICE with regard to speed, accuracy, and
> robustness.
What I will say here is that a work college, and myself on and off,
have been using LTSpice on some circuits very recently, like currently.
Sure, it converges most of the time when XSpice and Tanner spice, and
any others don't, however it still has problems on some circuits we have
been trying. This is to be compared with TISpice (internal Texas
Instruments spice). In a past life of 3+ years, it *never* failed to
converge, ever. It seemed to have 100 hundreds of algorithms to try
automatically. So, as far as robustness goes, I cant agree. Its good,
but not the best, imo. As for speed, I have never compared it to
TISpice.
Kevin Aylward
>
> And, if you buy PSPICE for 10k and still spend the 5 or 10 million
> those two departments, the modeling and process departments, you
> can still get good results for transistor-level simulation. Linear
> Tech uses PSPICE for IC design. I have been told that LT-Cad is just
> a variant of PSPICE so I am somewhat baffled how people can claim it
> works "better".
Well, not often I support Mike, but you way off base here. The LTSpice
engine is probably the best there is on PCs as far as simulation speed
and convergence goes. Its the GUI that leaves a lot to be desired.
Paul Rako
don't have the need to trash people, (even anonymously) that some
people do so I will not mention who. I certainly will yield to Mr.
Engelhardt on anything about LT SPICE because my LT friends say
he is THE MAN for this. After all, we know Swanson would rather
work to death one man rather then hire a department. Mike does the work
of two departments and I really respect that. LTSPICE is his baby and
he has a right to be proud of all that work.
Can he tell me the relationship between SwitcherCAD and LTSPICE?
Are they the same thing? And I was once told that LTSPICE does
not allow import of models from other vendors like ADI and National.
Sounds like bunk but it is a proprietary program after all.
BTW Mike, Bill Gross is a recently retired Vice-president and a former
IC designer so I will give him the complement tomorrow that you
consider him an apps guy like me. Swanson really must have you chained to a
workstation.
Now as to my SPICE experience-- well, Berkeley SPICE and Hollerith cards
yeah, a good bit of PSPICE, Intusoft ICAPs, at HP we had this thing
I think called DR Deautch or something that was supposed to converge
really well and my impression of all of them was they are crap.
But this was almost 10 years ago.
I will look for some of the oscillators and stuff that blow up or when
I get around to it publish a circuit I was using SPICE on a few months
ago and everyone can excoriate me just because I didn't know to set
abstol to something and put the .bs command in the deck. Well duh,
whenever I have to slow down edges or loosen up accuracies to get a
convergence it just seems like a real good time to put down the
mouse and pick up a soldering iron. Maybe I am just a scaredy-cat.
I would like to graduate past 7th grade and "you are full of sh1t"
comments so let us act like technical people and deal with facts.
Several years ago EDN magazine did a circuit and gave it to 6
SPICE vendors and Jim Williams at Linear Tech. If I remember about half
of the programs failed to converge and the rest gave wrong results, sometimes
wildly wrong compared to Jim's real board. Was there a memo I missed?
Have models and SPICE engines gotten that much better?
Can anyone really get any kind of mid-range SPICE to deal with non-linear
magnetics? Does anyone trust it to design a complex flyback converter?
Are there really A to D models that give the representative data output of
the real-world signals? Not just the math and correlations involving the
sampled-data theory but the real things going on in the analog and digital
sections? (All board-level models of course, not "real" transistor-level
models.) Does LT offer models of those new fast converters they make?
OK, the SPICE behind National's WEBENCH uses a later version of the SPICE
engine then PSPICE. I have heard one called level or stage two vs a three.
So what are the substantive differences? Does PSPICE suck as much as everything
else Cadence seems to ruin? Maybe I am complaining about my Model T when
everybody else in in a Prius.
I was at Arrowfest tonight where somebody said all SPICE does is solve a matrix.
That is what Berkeley SPICE is. What everyone else is doing is writing
code to try and get the solution to converge when the math blows up.
I had dinner with a guy from PSPICE years ago and he said all of their work is
doing code like that, to keep things from blowing up. How comforting. Is this
wrong?
When I was at HP we were designing automotive diagnostics. I defy anyone to
make a good model of a spark plug gap since most attempts had real trouble
converging and then you realize the flame-front and pressure in the cylinder
affects the signal. Did I miss that memo as well?
People, people, I am not being combative, I work in the on-line SPICE
group at National for crying out loud and really want to use it as much as
possible. Please don't jump on me like I am criticizing your religion or politics
or wife. It just seems like every time I wade into another type of complex circuit
with SPICE I soon feel like I need a CS degree and a month of trial and
it is just so much easier to just build the thing. Remember I am talking
board-level here, not something that you want to simulate to death since there
are 100k of masks at stake. That is why I like our WEBENCH tool. We have
a whole department including a couple of apps guys like me to insure that we
can give good results when we run a simulation. But we build the circuits with the
same exact components and make sure that the SPICE agrees with real-world
values so our customers don't have to. Is everybody out there designing
things with such similarity to their previous designs they know they can
trust the simulations?
Oh, if I have brought Kevin and Mike together then I guess there is
redemption in electronics after all.
Now to the important stuff, maybe I can get Pease to sign-up for Google
Groups but failing that I can at least post his reply to my lederhausen
question today:
=====================================================
*** Hello, Paul,
In reply to your comment.......
**** I do not recall ever wearing or owning Lederhosen, when I was in
college. I recall
specifically that I did not. But I did wear shorts. In the winter. When
bicycling. In the
snow. When I went winter-mountaineering, up in New Hampshire, I wore
shorts plus
long-johns. Red long-johns.
*** I know nothing about silk-lined Lederhosen, and I know nothing
about the Lampoon's parody.
*** Since I never had or wore Lederhosen, then I'm sure that some of the
ones I didn't wear were silk-lined, and
some of the ones I didn't wear were NOT silk-lined. / rap
============================================================
Hey Mike; Tim Regen's birthday tomoroow, come over to Bldg T (The Tastey
Subs on Lawrence Expressway by Arques) and I'll buy you a beer.
Paul
Damir
wrote:
snip
>Can he tell me the relationship between SwitcherCAD and LTSPICE?
>Are they the same thing?
Yes.
Regards,
Damir
Mike Engelhardt
> Can he tell me the relationship between SwitcherCAD and LTSPICE?
> Are they the same thing?
The name of the program is LTspice/SwitcherCAD III.
> And I was once told that LTSPICE does not allow import of
> models from other vendors like ADI and National.
More non-sense. Users can import models and since LTspice
knows most Pspice and hspice syntax, it can even run the
imported models without modification. LTspice's SMPS
products are models in a HDL that can't be run in other
SPICE programs because the HDL is above their heads.
> BTW Mike, Bill Gross is a recently retired Vice-president
> and a former IC designer...
Opps, I was thinking of Tom Gross, the apps guy, who works
in a somewhat closer capacity to Tim Regen, hence I jumped
to him instead of the guy that doesn't work here any more.
Bill Gross was an op amp designer and then VP of that group
that knows little about SPICE and nothing about LTspice.
Yes, do pay him my compliments and mention Boeing SPICE.
He'll tell you lots of non-sense about SPICE.
> I was at Arrowfest tonight where somebody said all SPICE
> does is solve a matrix. That is what Berkeley SPICE is.
You were at an Arrowfest and somebody said something. Wow.
Most physical simulators solve a matrix, that doesn't
make them varients of each other, it just means it's trying
to solve something. I would suggest that you don't dissertate
on topics that you aren't familiar instead of posting
garbage.
> OK, the SPICE behind National's WEBENCH uses a later
> version of the SPICE engine then PSPICE. I have heard
> one called level or stage two vs a three.
Yes, the people that sell the Webbench thing to National
told me that too. I laughed and walked away.
> **** I do not recall ever wearing or owning Lederhosen,
> when I was in college. I recall...
Thanks for posting this. I suspected that the Lederhosen
story wasn't true. I find that as my fame, for lack
of a better term, evolves, that there's ever increasing
strange storys about me that never happened or quotes
from me that I never said. The time will come when I'll
join Pease and not read Usenet posts anymore.
--Mike
analog
Paul Rako wrote:
> Well, it was an LT guy that told me LT-SPICE was a PSPICE variant
[cut thinly veiled trashing of various people]
> Several years ago EDN magazine did a circuit and gave it to 6 SPICE
> vendors and Jim Williams at Linear Tech. If I remember about half
> of the programs failed to converge and the rest gave wrong results,
> sometimes wildly wrong compared to Jim's real board. Was there a
> memo I missed? Have models and SPICE engines gotten that much
> better?
LTspice has improved models for inductors and capacitors that allow
realistic parasitics to be entered and computed as an integral part
of the element. This prevents the corresponding branch admittances
from going to zero or infinity for reduced time steps during a
transient analysis, greatly improving run time convergence.
I doubt you or anyone else has a legitimate circuit that would
trip up LTspice.
> Can anyone really get any kind of mid-range SPICE to deal with
> non-linear magnetics?
LTspice can without breaking a sweat. Download the program and
read the help file topic on L devices.
Regards -- analog
Jim Thompson
wrote:
[snip]
>
>=====================================================
>*** Hello, Paul,
>
>In reply to your comment.......
>
>
>**** I do not recall ever wearing or owning Lederhosen, when I was in
>college. I recall
>specifically that I did not. But I did wear shorts. In the winter. When
>bicycling. In the
>snow. When I went winter-mountaineering, up in New Hampshire, I wore
>shorts plus
>long-johns. Red long-johns.
>
>
[snip]
OK, Maybe it was shorts and long-johns :-)... but definitely very odd
in Massachusetts in wintertime... something about Bob's appearance
definitely stood out, otherwise I wouldn't have so distinctly
remembered just another tech "tool". I didn't even know his name
until I saw him at National.
Kevin Aylward
"Mike Engelhardt" <nos...@spam.org> wrote in message
news:alSYe.3498$Ba2...@newssvr27.news.prodigy.net...
> Paul,
>
>> Can he tell me the relationship between SwitcherCAD and LTSPICE?
>> Are they the same thing?
>
> The name of the program is LTspice/SwitcherCAD III.
>
>> And I was once told that LTSPICE does not allow import of
>> models from other vendors like ADI and National.
>
> More non-sense. Users can import models and since LTspice
> knows most Pspice and hspice syntax,
It don't know HSpice's "hdif" which is used to automatically calculate
AD, AS, PS, and PD. These are absolutely crucial for high speed work.
How come you missed this one? Oh, the last time I checked it didn't
handle Spice's tempcos for mesfets either. Some simulators I know of
handles these...
Tell, you what though, its rather irritating that LTSpice stops dead in
its tracks when it gets a .option it don't know. Like, I have a
floatdata option that simple tells the engine to save files as floats
instead of doubles. In 99% of cases that's all you need, and it halves
the file size. Same comment goes for include files it cant find. How
about just issuing a warning and proceeding on?
Oh..it would be handy if it also supported individual diode instances BV
on their netline to overide the .model data. Makes zeners easier to deal
with, and avoids me having to modify my netlists when I run SS ones
through LT.
Genome
"Paul Rako" <sp_a_m...@yahoo.com> wrote in message
news:fxQYe.3496$Ba2...@newssvr27.news.prodigy.net...
>
> Can anyone really get any kind of mid-range SPICE to deal with non-linear
> magnetics? Does anyone trust it to design a complex flyback converter?
>
Hmmmmm,
I could go further, but......
Hmmmmm,
DNA
Neil
> "Neil" <neilw...@hotmail.com> schrieb im Newsbeitrag
> news:1126944635.5...@g44g2000cwa.googlegroups.com...
> > Looking for a spice model or subcircuit netlist for the LM709 from
> > National semiconductor. I asked intusoft, cause they have a free model
> > service. I bought their entry level software ICAP/4 8.3.3 from a dealer
> > purchased in 2000. For reasons I won't mention, I was denied the
> > request from their sales department.
> >
> > I was going to email National, but from what I read in Bob's book
> > "Troubleshooting Analog circuits" he doesn't like S.P.I.C.E.
> > and for good reason...........:)
> >
> > Any help on this request would be great....
> >
> > Thanks
> > Neil
>
>
>
> If you look with Google (uA709 spice) then you will find two
> sources for a model.
> One is in the library file "opamp.lib" from Microsim/Cadence.
> It's a very old behavioral model and I have not tested it.
> I don't have a PSPICE license and so I don't would use it.
>
> In this "summer2000.pdf" is a netlist of a test circuit with
> the LM/uA709. It's nothing else than an exact copy of the
> schematic of the LM709 from National's datasheet.
> http://www.spectrum-soft.com/down/summer2000.pdf
>
> http://www.national.com/ds.cgi/LM/LM709.pdf
>
> I used this datasheet and made my own model. I would be
> interested to get some feedback about the parameters of my
> "invented" transistor models. I have used the reference
> designators from the the datasheet to make it easier to
> modify the model if necessary.
> THe model agrees very well with the performance of the datasheet.
> It's a free model. Feel free to use/copy/modify.
>
> I have also made a complete example for LTspice with
> a schematic based on a nice symbol and a model file.
> Additionally I have made a hierachical block design
> which allows to probe down the hierarchy (in the schematic)
> to every node of the LM709.
>
> LTspice is free SPICE from www.linear.com .
> http://ltspice.linear.com/software/swcadiii.exe
>
> The LTspice user group:
> http://groups.yahoo.com/group/LTspice
>
> Download the files from here within the Yahoo group.
>
> Files > Lib > LM709_uA709
>
> Best regards,
> Helmut
>
>
>
>
> * LM709 SPICE Model
> * Datasheet: http://www.national.com/ds.cgi/LM/LM709.pdf
> * Helmut Sennewald
> *
> * Input compensation B (8) --------------------\
> * Input compensation A (1) -----------------\ |
> * Output compensation (5) --------------\ | |
> * Output (6) -----------------------\ | | |
> * Negative supply (4) ----------\ | | | |
> * Positive supply (7) -------\ | | | | |
> * Inverting input (2) ----\ | | | | | |
> * non-inverting input(3) | | | | | | |
> * | | | | | | | |
> .subckt LM709 In+ In- V+ V- OUT COMP A B
> Q7 v+ N001 N005 0 NPN1
> R5 v+ N001 10k
> Q3 N001 N006 N003 0 NPN1
> Q4 N001 N003 N002 0 NPN1
> R1 N005 N006 25k
> R3 N003 N004 3k
> Q15 N004 N004 N002 0 NPN1
> R2 N005 A 25k
> Q2 A in- N007 0 NPN1
> Q1 N006 in+ N007 0 NPN1
> Q5 B A N009 0 NPN1
> R4 N009 N004 3k
> Q6 B N009 N002 0 NPN1
> R6 v+ B 10k
> R8 N002 N011 3.6k
> R10 N011 N010 10k
> Q10 N010 N010 V- 0 NPN1
> Q11 N007 N010 N008 0 NPN1
> R11 N008 V- 2.4k
> R9 N012 N011 10k
> Q8 v+ B N013 0 NPN1
> R7 N013 N012 1k
> Q9 comp N002 N012 0 PNP1
> R13 N014 V- 75
> R12 comp N014 10k
> Q12 N015 comp N014 0 NPN1
> Q13 V- N015 out 0 PNP1
> Q14 v+ N015 out 0 NPN1
> R14 v+ N015 20k
> R15 N012 out 30k
> .MODEL NPN1 NPN (BF=100 VAF=50 RB=100 CJE=4P CJC=2P CJS=2P TF=0.5N TR=10N)
> .MODEL PNP1 PNP (BF=15 VAF=50 CJC=4P CJE=8P RB=100 TF=20N TR=200N)
> .ends LM709
Very nice..........I will try it this weekend!!, That's great. I tried
that approach from the datasheet, like others mentioned to me. I used a
macro option inside my SPICE program with the common transistor which I
like to use is the 2N4401 and the 2N4403. It's unrealistic, and above
par, cause it has way more gain, higher CMRR, so the I scrapped the
macro, and started over, and I did, before posting to this group.
Thanks
Neil
Neil
sheet from national semiconductor which I been messing with, but thanks
anyway.
Neil
data2docSAFE at URLfastmail.com.au
They have a demo version, free, which has these files. Try
<http://www.micro-cap.co.uk>. I haven't been there for quite a while, so
this may have changed.
Regards, BruceR
Paul Rako
Thank god, a scientist. Coherent, I suppose, with the IEEE mail domain.
I will install LTspice/SwitcherCAD III and replicate some of my Orcad misery.
People:
The one complaint I heard tonight at Bldg T was that you
can't export the LTspice/SwitcherCAD III work to something that can lay-out a
circuit board. Based on the other buncombe, some of which I may
have inadvertently spouted, I will try it first and see. I guess
the best thing to do is to load the circuit from the EDN article
and see if will converge and correlate to the results Jim Williams
got.
Hey Mike:
Tom Gross was at bldg T tonight as well as Bill so that was a bit of a harmonic
convergence. Sorry about the "somebody said something" but the somebody
was a well-known engineer at a competing company to National and LT so I did
not have his permission to quote him at 3:00 AM last night and why mention any
competitors' companies? When I get sarcastic like that I say "Doh,
pass me a donut." Like the other writer is treating me like Homer Simpson.
I could see how that might apply to my "somebody" comment. I am a little sorry
to see you dismiss the SPICE engine underneath WEBENCH. Maybe it is marketing
jargon but a new release is significant if there was some significant
code-work that has been done. I suspect you rev LTspice/SwitcherCAD III
when you feel there is a significant advantage. I do agree if there is
no sanctioning body like IEEE or W3C or anybody to validate the claim for an
improved engine, one has to be more critical. How can one judge the advance
of proprietary standards unless you guys start opening up your code so the
community can see the difference in the source? Sorry if you feel I am posting
garbage, I am trying to be positive. We are building a 15 MHz 4th-order
low-pass filter to see if WEBENCH can nail that as well as it did the
10KHz filter on the Analog by Design show. Then I will feel pretty good
about it. Hey, maybe the SPICE engine under WEBENCH touts "Stage 3" to just
keep up with you and the "3" in your release.
Also Mike:
Well, the only stories I heard about you tonight is that somebody called you
"Panama Mike". Being a Leon Redbone fan I can understand that as a complement,
it sure sounded like one when she said it.
Kevin:
I have to admit I am a long way from worrying if LTspice/SwitcherCAD III
deals with HSPICE directives. But that did get me to check out your website
and if that SPICE can inter-operate on... oh-- I don't know, EDIF 2 0 0
well that would be pretty cool since I could do work in it and then stuff it
into Orcad or when I get creamed in Orcad I could jump into your SPICE.
As a matter of fact I would pay the price if only so I did not have to
start Orcad in the evil "Mixed Signal" mode where the part properties get
all goofy because PSPICE likes to call instantians "occurances" instead of
"instances" like Orcad does. Back-annotate into that mess once and
you might understand why PSPICE is under-used. Arbitrary handles are
a wonderful thing, please tell Orcad.
And Jim:
Don't call it a cane, call it a walking stick. Or a scepter. Like that
Saran Wrap guy from Lord of the Rings. I see the WWF analog smack-down
as you, Bob and Barrie in a Thunderdome type of deal. Tina Turner is
already signed. The dynamic is all three of you have to get in the dome
and any two can gang up on the third. Then those two face off after
enough personal liability and property damage have been heaped on the
other guy. Now that would be interesting. A prisoner's dilemma au troix.
Tagline: "Three men enter. One man leaves."
I am on vacation next week so I should have time to play with
LTspice/SwitcherCAD III and Kevin's SuperSpice stuff which is at
http://www.anasoft.co.uk/
and I have PSPICE and ICAP/4
And one of you guys has to do a release called "Habanero".
Now that is some hot spice.
And Panama Mike:
Sorry about the "LTspice/SwitcherCAD III is a PSPICE knockoff" crack. I asked
the source tonight and what he intended to say or I what I did not hear was:
"LTspice/SwitcherCAD III is a variant of SPICE."
Well, duh. Shakespeare is a variant of the dictionary. I knew that.
Paul
Helmut Sennewald
news:%R8Ze.3707$Ba2....@newssvr27.news.prodigy.net...
> analog:
> Thank god, a scientist. Coherent, I suppose, with the IEEE mail domain.
> I will install LTspice/SwitcherCAD III and replicate some of my Orcad
misery.
>
> People:
> The one complaint I heard tonight at Bldg T was that you
> can't export the LTspice/SwitcherCAD III work to something that can
lay-out a
> circuit board. Based on the other buncombe, some of which I may
> have inadvertently spouted, I will try it first and see. I guess
> the best thing to do is to load the circuit from the EDN article
> and see if will converge and correlate to the results Jim Williams
> got.
Hello Paul,
I am very interested in the article mentioned by EDN.
Could you provide me a link to it or send it to me via email.
I will then try on this circuit with LTspice and give my judgement.
I think we should let the professionals do it who know LTspice.
It's like if you have to judge about a Porsche car.
If you have never driven it, you shouldn't judge it.
Best regards,
Helmut
PS: I also have demo-versions of some other SPICEs to test this
circuit as well if it's not too big for them.
I am not an emplyee of LT.
Mike Engelhardt
>>> And I was once told that LTSPICE does not allow import
>>> of models from other vendors like ADI and National.
>>
>> More non-sense. Users can import models and since
>> LTspice knows most Pspice and hspice syntax,
>
> It don't know HSpice's "hdif" which is used to automa-
> tically calculate AD, AS, PS, and PD. These are
> absolutely crucial for high speed work.
The lack of hdif is deliberate. LTspice insists that
every dimension, area, and perimeter be explicitly stated
for every transistor. It's done because layout
verification tools and simulators can get confused about
this so I require that the schematic tools compute and
this for each instance so that no other tools can get
confused. When one designs against one's own fab, and
one has a schematic capture tool that can do all that
for oneself(which LTspice's schematic capture will do
but it will remain an undocumented feature), one gets to
do that: Simply once and for all resolve all the
transistor dimensions.
But if the every dimension, area, and perimeter is
instanced out for each transistor, LTspice will run most
hspice models with binning, single quote parameter
substitution and usually inline comments starting the a
'$' when it doesn't conflict this PSpice syntax.
> Tell, you what though, its rather irritating that
> LTSpice stops dead in its tracks when it gets a
> .option it don't know.
Part of having a polyglot simulator is the need to be
more error verbose/intolerant of incorrect SPICE syntax.
Correct hspice syntax is .options numdgt=N If N is
greater than 6, the waveform data or compression
coefficients are stored as double precision, otherwise
LTspice uses single precision. See the help file
(F1 key)=>LTspice=>Dot Commands=>.OPTIONS=>numdgt.
--Mike
Mike Engelhardt
> ...Simply once and for all resolve all the
> transistor dimensions.
I should mention that this is of course done according
to what the netlist extracted from the schematic targets,
layout or simulation, and with what process lot parameters
in light of how the model libraries were generated/defined.
--Mike
Mike Engelhardt
> I do agree if there is no sanctioning body like IEEE or
> W3C or anybody to validate the claim for an improved
> engine, one has to be more critical. How can one judge
> the advance of proprietary standards unless you guys
> start opening up your code so the community can see the
> difference in the source? Sorry if you feel I am posting
> garbage, I am trying to be positive.
Well, I'm not trying to be negative you do post garbage.
You can't evaluate a simulator's performance by looking at
the source code and you should know better. I don't know
if you're deliberately dishonest or ignorant. LTspice is
close to a half million lines of code. You have to compile
it and test the program to see its performance. I'm guessing
your comment is more dishonest than ignorant because it
appears to be an empty challenge to release the source code
of LTspice and trying to couple that challenge with a
challenge of proof of LTspice's performance, presumably
hoping one topic will drop with the other.
But it's not very hard to understand why LTspice runs faster
and is more accurate then other/earlier SPICE engines. I
occasionally give 4hr seminars that explain in some detail
what one needs to do to make a better SPICE engine. People
are surprised that I reveal all, but the trick is I tell what
one needs to do, not how to go about writing that code. There
is an arraingment with an officer of LTC that prevents loss
of any of the planet's intellectual property in the event of
my death so that how to implement this code is not lost when
I die. Anyway, in the seminar, I demonstrate the
fantastically improved accuracy of the core LTspice solvers
and the corresponding improvements in simulation speed with
live simulation runs. Anyway those with legitimate interest
in LTspice can contact your local LTC office and request
when/where the next seminars will be(please don't contact me,
I have people smarter than me that schedule them). The
seminars are worldwide.
--Mike
Neil
use the software I purchased from Beigebag Software and Intusoft
frequenctly. Another real disadvantage is that my Eng. comp doesn't
have a NIC, so I have no internet for this machine. It's strictly for
programming like C++, C and Basic, along with the Spice progarams I
mentioned.
I have to use another machine to access the net, but thanks for the
tip, I may try it.
Neil
Neil
First, save any effort in contacting National.
We have better things to do then make SPICE models
for 30-year-old parts.
True, Paul I wouldn't mind having the spice model from national for
it,just the same. I very fond of the of 301,709, and others, and
because they were designed many years ago, anyone interested in op-amp
design, can learn alot from these two SUPER Op-Amps!!
I know I have............:)
I'm hoping maybe NATIONAL SEMICONDUCTOER will change it's mind one day
to bring out the model for the LM709:)
One fellow gave me a spice netlist for his model of the LM709, which
I'm going to try today.
Neil
Neil
You are obviously a newbie on this...
Well, according to you, I'm not a expert on SPICE, never said I was,
but I think your missing the point of my POST Kev!! I'm not really
interested in Spice Programs per say, only the search for the model of
the 709 OP-Amp
cut and dry and that is it..............:)
How do you propose to design a 1000 transistor circuit?
Geez...... where did this come from? I'm only agreeing with bob's
quotes from his book. I'm a spice user myself. I wouldn't want to wager
on spice either, I'm almost confident that something will go wrong, if
I rely on it too much. Circuit temperature is one reason to use another
more practical approach, and this is not unrealistic, you can
understand what my reasons are for doing this. Even though this can be
done in spice, and It's a nice contribution and a big help, this where
I draw the line!! I have seen particular circuit behaviors, in which
spice is unable to predict very well. just my opinion.
A 10,000 transistor circuit?
Must be one hell of an OP-Amp!! huh? :)
Neil
Kevin Aylward
> Paul,
>
>> I do agree if there is no sanctioning body like IEEE or
>> W3C or anybody to validate the claim for an improved
>> engine, one has to be more critical. How can one judge
>> the advance of proprietary standards unless you guys
>> start opening up your code so the community can see the
>> difference in the source? Sorry if you feel I am posting
>> garbage, I am trying to be positive.
>
> Well, I'm not trying to be negative you do post garbage.
> You can't evaluate a simulator's performance by looking at
> the source code and you should know better. I don't know
> if you're deliberately dishonest or ignorant. LTspice is
> close to a half million lines of code. You have to compile
> it and test the program to see its performance. I'm guessing
> your comment is more dishonest than ignorant because it
I think you may be a bit paranoid here. It seems pretty clear that that
Paul was simply mistaken. I don't see that most people lie in this way,
for the most part it is always a genuine mistaken belief.
> But it's not very hard to understand why LTspice runs faster
> and is more accurate then other/earlier SPICE engines. I
> occasionally give 4hr seminars that explain in some detail
> what one needs to do to make a better SPICE engine. People
> are surprised that I reveal all, but the trick is I tell what
> one needs to do, not how to go about writing that code.
Why not post/write some papers, e.g ieee.
Kevin Aylward
> analog:
> Thank god, a scientist. Coherent, I suppose, with the IEEE mail
> domain.
> I will install LTspice/SwitcherCAD III and replicate some of my Orcad
> misery.
>
> Kevin:
> I have to admit I am a long way from worrying if LTspice/SwitcherCAD
> III
> deals with HSPICE directives. But that did get me to check out your
> website
> and if that SPICE can inter-operate on... oh-- I don't know, EDIF 2 0
> 0
> well that would be pretty cool since I could do work in it and then
> stuff it
> into Orcad or when I get creamed in Orcad I could jump into your
> SPICE.
I am playing with the idea of EDIF.
At my current day job we use Tanner Tools, well for layout anyway. I
personally only use my SS. Tanner cant do any digital except by analogue
means, so it got me into thinking that there is a market for a cheap ic
mixed-mode spice if it can interface better with pro-tools like Cadence.
> As a matter of fact I would pay the price if only so I did not have to
> start Orcad in the evil "Mixed Signal" mode where the part properties
> get
> all goofy because PSPICE likes to call instantians "occurances"
> instead of
> "instances" like Orcad does. Back-annotate into that mess once and
> you might understand why PSPICE is under-used. Arbitrary handles are
> a wonderful thing, please tell Orcad.
I am refining bits an bobs that I use for ic design. I actually missed
direct GUI support for the URC transmission line, i.e. it had to be in a
.subckt to be used. I have now adding a proper dialog set-up for it, but
not yet posted the update. This is really useful to support resisters
with distributed capacitance to a node. This acts differently for the
conventional T lines (LTRA and T).
Kevin Aylward
> Kevin,
>
>>>> And I was once told that LTSPICE does not allow import
>>>> of models from other vendors like ADI and National.
>>>
>>> More non-sense. Users can import models and since
>>> LTspice knows most Pspice and hspice syntax,
>>
>> It don't know HSpice's "hdif" which is used to automa-
>> tically calculate AD, AS, PS, and PD. These are
>> absolutely crucial for high speed work.
>
> The lack of hdif is deliberate. LTspice insists that
> every dimension, area, and perimeter be explicitly stated
> for every transistor. It's done because layout
> verification tools and simulators can get confused about
> this so I require that the schematic tools compute and
> this for each instance so that no other tools can get
> confused. When one designs against one's own fab, and
> one has a schematic capture tool that can do all that
> for oneself(which LTspice's schematic capture will do
> but it will remain an undocumented feature), one gets to
> do that: Simply once and for all resolve all the
> transistor dimensions.
This is quite a valid point. Its nice to have the actual data clearly on
the spice netline so one knows exactly what the simulator is seeing. SS
actually does this by the GUI. I only very recently added hdif to the
engine itself. It then actually introduced a minor bug that I have yet
not gotten around to fix. I have check boxes on the mos set-ups to
selectively enable Ad/As to account for butting devices. Now they don't
work as the get overridden in the engine...ahmmm...
>
> But if the every dimension, area, and perimeter is
> instanced out for each transistor, LTspice will run most
> hspice models with binning, single quote parameter
> substitution and usually inline comments starting the a
> '$' when it doesn't conflict this PSpice syntax.
I did notice that it handled single quotes as an alternative to {}. I
had to disable this in SS recently as I had a clash with xspice model
data having single quotes for state machine file names. I need to fix
that as well...
>
>> Tell, you what though, its rather irritating that
>> LTSpice stops dead in its tracks when it gets a
>> .option it don't know.
>
> Part of having a polyglot simulator is the need to be
> more error verbose/intolerant of incorrect SPICE syntax.
> Correct hspice syntax is .options numdgt=N If N is
> greater than 6, the waveform data or compression
> coefficients are stored as double precision, otherwise
> LTspice uses single precision. See the help file
> (F1 key)=>LTspice=>Dot Commands=>.OPTIONS=>numdgt.
Never noticed that. I'll see about changing SS then I would rather use a
standard syntax.
Hey, you also don't document that LTSpice supports
.dc temp 0 100 1
to sweep temperature.
It should be easy for you to add
.dc r1 10k 50k 1k
Saves me a bit more bother when I get a circuit XSpice don't converge
on.
Paul Rako
from the data-sheet. I was told by several people that doing that would
be pretty fruitless. You don't have the process models and the schematic
leaves out sub-circuits that would affect the results. I know of no semiconductor
vendor that would publish a schematic detailed enough to let you simulate
it since that would allow others to reverse engineer the part.
Hang on, yeah, I just went to National's website. The LM709 is obsolete.
It is not being sold as of last month. It is a pretty hard sell to
management to put resources into a product they don't sell anymore.
Pease wanted to know what the heck you were designing with this old
part anyway. National's website says to substitute a LM101 or a LM108,
you can still get both in hermetic packages.
Paul
Paul Rako
Well if you will have a garbage-posting dishonest creep
like me to your four-hour seminar I feel the least I can
do is attend. I'll talk to Gary Sapia in the local
sales office about the seminar. Thanks for the invite.
Look for the guy in the back row wearing a Nixon mask.
There are actually other people in the world competent
to evaluate well-written source code. I suspect several
read this group. And it is a well-accepted fact that
open-source projects always result in improved results.
I am not an open-source nut however. I will defend to the
death your right to maintain and sell proprietary code.
A half million lines of code. A half million lines of code.
Wow. And accepted software productivity is between 5 and
10 lines of debugged implemented code per day. 200 work days
in a year. So half a million line is what... 250 man-years
of code. Wow. I knew Swanson overworked his people and there
are all kinds of LT burnouts and walking-wounded here in the
valley but I had no idea how bad it was over there. My
software consultant buddies say that right around 600 or 700k
lines of code any program becomes un-maintainable so you still
have some room to grow if needed.
Lighten up Panama. And don't worry so much about protecting
your software and all the arcanities inside it. No one here
really cares about the indirect pointers to the linked lists
and malloc call recursive gobbledy gook. We just care if
it will give decent results on real-world circuits. Thanks
to two posters here in the group, (analog and Helmut),I think
we will soon know.
Mr. (Dr./Prof?) Thompson:
What do you use? I hope it is not some proprietary thing
like Analog Devices' internal SPICE. I hope you will serve as
judge jury and executioner in our little test. And remember
everyone-- in my opinion we are mis-applying SPICE. The
acronym stands for "Simulation Program with Integrated
Circuit Emphasis" It is not SPBLE. Spible would be
"Simulation Program with Board-Level Emphasis". This is
why there seems to be such passions aroused when us board
guys say we don't worship SPICE the way IC designers do.
BTW, Dave Tamura in the CAD department at National rolled his
eyes when I told him I said Process and Modeling departments
cost 5 or 10 million dollars a year for a big semiconductor
company. He hinted that tens times those numbers is not
unheard of. He also said that his CAD department is also
involved in making sure the models conform to reality.
Helmut:
I will take it upon myself to find the EDN article. Worse
comes to worse I will call Williams, he should remember it.
Then everybody can use it as a benchmark. I will also release
one of my schematics to the public domain to see how all these
packages do with it. I have to believe you guys when you say
LTspice is really good and fast. Like my brother says: "An
ounce of trial is worth a pound of opinion."
I just hope EDN didn't use an LM709 (;^o)-
And everybody: Watch the Tina-TI presentation on CMP's
EE Times webseminar to see how that SPICE did not predict
the real circuit results until they added caps to model board
strays. Of course they used a milled board and that is a
whole 'nuther thread.
It is archived and was shot on Sept 14th
http://cmpnetseminars.com/TSG/?K=On24&Q=265
And on a completely different subject:
Who wrote the Masstech layout program that Orcad bought and
incorporated into Orcad?
Paul
Jim Thompson
wrote:
[snip]
>
>Mr. (Dr./Prof?) Thompson:
"Mr.", I only have a MSEE.
>What do you use? I hope it is not some proprietary thing
>like Analog Devices' internal SPICE.
I use PSpice A/D v10.5, although I'm trying to make time to evaluate a
newcomer, TTSpiceWorks <http://www.trabucotechnologies.com/>. But it
seems, the older I get the busier I get ;-)
>I hope you will serve as
>judge jury and executioner in our little test.
What "little test" is it? I haven't been following this thread
closely.
>And remember
>everyone-- in my opinion we are mis-applying SPICE. The
>acronym stands for "Simulation Program with Integrated
>Circuit Emphasis" It is not SPBLE. Spible would be
>"Simulation Program with Board-Level Emphasis".
Indeed.
>This is
>why there seems to be such passions aroused when us board
>guys say we don't worship SPICE the way IC designers do.
In the IC world we "back-annotate" to add the strays that result from
layout. Do "board guys" have such a tool?
>BTW, Dave Tamura in the CAD department at National rolled his
>eyes when I told him I said Process and Modeling departments
>cost 5 or 10 million dollars a year for a big semiconductor
>company. He hinted that tens times those numbers is not
>unheard of. He also said that his CAD department is also
>involved in making sure the models conform to reality.
>
[snip]
And Win wonders why discrete MOSFET models are inadequate ;-)
analog
Helmut Sennewald wrote:
> Paul Rako wrote:
>> The one complaint I heard tonight at Bldg T was that you can't
>> export the LTspice/SwitcherCAD III work to something that can
>> layout a circuit board. Based on the other buncombe, some of
>> which I may have inadvertently spouted, I will try it first and
>> see.
Usually a design's simulation is segmented by functionality rather
than by circuit board boundaries and includes many simulation
specific elements not needed or wanted on a layout oriented
schematic. On the other hand, a circuit board layout needs things
like connectors, test points, unused gates and gate associations,
mounting holes, etc. Also, component secondary parameters required
for a board layout are completely different than for a simulation.
I really don't see the point of wanting or requiring a simulation
schematic to be board layout capable.
>> I guess the best thing to do is to load the [simulation test]
>> circuit from the EDN article and see if will converge and
>> correlate to the results Jim Williams got [from actually
>> testing the circuit in the lab].
In my experience, most convergence stubborn simulations turn
out to be examples of garbage in, garbage out. I have *never*
come across a meaningful simulation that didn't converge or
couldn't be made to converge in short order (my efforts over
at the LTspice usersgroup on Yahoo Groups in soliciting such a
mythical beast have all come up empty handed).
> I am very interested in the article mentioned by EDN.
> Could you provide me a link to it or send it to me via email.
I turned over a lot of rocks online looking for this, but couldn't
find it. Maybe, as Paul mentioned in another post, he could go
ask Jim Williams for a copy or a link to a copy.
> I will then try on this circuit with LTspice and give my
> judgement. I think we should let the professionals do it who
> know LTspice. It's like if you have to judge about a Porsche
> car. If you have never driven it, you shouldn't judge it.
Helmut, what's a mild mannered family man like you doing driving a
Porsche!?? :) But your observation is well taken so I'll have to
disqualify myself from judging sports cars, at least.
Here are my "driving tips" for LTspice:
Because of the differing strategies used to handle them, convergence
issues are best sorted into those relating to finding the initial dc
operating point and those occurring during a transient run.
At the dc operating point and with ideal elements, inductors become
shorts and capacitors become opens, whereas just the opposite occurs
with step-size compression during transient troubles. In one case,
delta time goes to infinity, whereas in the other, it approaches
zero. For transient convergence, spice depends on the fact that
realistically modeled nonlinear elements should approach finite,
linear, time invariant impedances as step size gets really small.
LTspice has improved models for inductors and capacitors that allow
realistic parasitics to be entered and computed as an integral part
of the element. This prevents the corresponding branch admittances
from going to zero or infinity for reduced time steps during a
transient analysis, greatly improving run time convergence. Also,
as I understand it, inductances (and voltage source) with series
resistance are more computationally efficient, because they can
then be directly "plugged" into the admittance matrix. Another
benefit of specifying realistic parasitic resistances is that it
avoids situations where unrealistic high frequency oscillations
drive the time step to a crawl (not really a convergence issue).
Bearing this in mind, LTspice transient convergence "fixes"/
(standard good practice) in order of "goodness", im my opinion,
are:
1) Specify series and parallel resistance parameters for capacitors
and inductors.
2) Use the current source version of elements whenever possible.
Note that specifying a series resistance for voltage sources
actually changes them into current sources internally. For
example, rather than behavioral voltage sources, use current
sources in parallel with a small capacitor (1nF or less) edited
to have a 1 ohm shunt resistance.
3) Make sure that all semiconductor junctions (and other nonlinear
elements) are modeled with realistic series resistances and
junction capacitances as well. The importance and effect of
something seemingly so mundane as this cannot be overemphasized,
for this is what forces linear behavior during time step
compression.
4) Use LTspice's built-in alternate solver for three plus decades
more numerical dynamic range (at a 2x speed penalty).
5) Use the Gear integration method to numerically dampen out "noise"
that should better be taken care of by step 1).
6) Add .options Tseed=<maxtimestep>/10 (thanks Helmut)
7) Increase "reltol" above the default .001 (going higher than about
.03 may be counter productive).
Solving Operating Point Convergence Problems
In addition to most of the steps above:
Examine your simulation circuit for behavioral sources or other
devices that may go highly nonlinear as the sources are stepped up
from zero. Splitting a very nonlinear element into several pieces
across several nodes can sometimes dilute the problem behavior to
the point where the solver no longer gets hung up on one very bad
element. In such cases, adding more nodes can actually make the
simulation run much faster.
If not already available somewhere in the circuit, a unity node may
be created by setting up an isolated dc voltage source equal to one
volt. Clearly, any expression may be multiplied by the voltage on
this node as many times as needed without changing the value of the
expression during an analysis. The only effect on such an expres-
sion occurs during source stepping while seeking the operating
point. Then, as this unity node is reduced to near zero, anything
multiplied by it is also forced to approach zero.
Bear in mind that unity node multiplication can be sprinkled
throughout a simulation wherever you suspect misbehavior.
Differencing circuits with a lot of dc and gain are always good
candidates as are abrupt limiters and behavioral expressions with
node voltages in their denominators such that when the sources go
to zero, the expressions blow up (something gone small / something
gone to zero => infinity). These types of expressions can be
multiplied by the unity node raised to whatever power required to
make them behave.
Regards -- analog
Helmut Sennewald
news:4336F7DD...@ieee.org...
>
> Helmut Sennewald wrote:
> > Paul Rako wrote:
>
> >> The one complaint I heard tonight at Bldg T was that you can't
> >> export the LTspice/SwitcherCAD III work to something that can
> >> layout a circuit board. Based on the other buncombe, some of
> >> which I may have inadvertently spouted, I will try it first and
> >> see.
>
> Usually a design's simulation is segmented by functionality rather
> than by circuit board boundaries and includes many simulation
> specific elements not needed or wanted on a layout oriented
> schematic. On the other hand, a circuit board layout needs things
> like connectors, test points, unused gates and gate associations,
> mounting holes, etc. Also, component secondary parameters required
> for a board layout are completely different than for a simulation.
>
> I really don't see the point of wanting or requiring a simulation
> schematic to be board layout capable.
Hello analog,
I can really second that. The more professional layout programs
allow a lot of control from the schematic. There are so many
properties on nets and components which you never get from another
schematic entry program. And finally postprocessing beyond layout
may be completely impossible without some special properties.
Btw, PSPICE has become harder to use since Cadence switched
to the ORCAD schematic interface which is intended for PCB designs.
This is ok for PCBs but you will need more time to make a
schematic for SPICE.
> ...
> > I will then try on this circuit with LTspice and give my
> > judgement. I think we should let the professionals do it who
> > know LTspice. It's like if you have to judge about a Porsche
> > car. If you have never driven it, you shouldn't judge it.
>
> Helmut, what's a mild mannered family man like you doing driving a
> Porsche!?? :) But your observation is well taken so I'll have to
> disqualify myself from judging sports cars, at least.
I have no Porsche, but when I think on LTspice I always think
LTSpice is the Porsche of the SPICE simulators.
It's very fast and precisely to control.
It requires a little bit practice and learning of course to
get this advantage.
I had posted a few days ago my tips about solving convergence
problems into the LTspice-Yahoo-group.
--- start
It's difficult to give a general help. I would try with the
following.
1. Set a useful maximum time step in the ".tran" line.
Try with some values.
Use/keep a maximum timestep regardless whether it still fails.
Most of the following settings are in the Control Panel.
Control Panel -> SPICE
If still not ok:
2. Try wth the Alternate solver
If srill not ok:
3. Back to Normal solver
Try with method: Gear
If still not ok:
4. Back to default settings.
Try with "startup" in the .TRAN setting .
If still not ok:
5. Back to default settings.
Try with Gmin, but not lower than 1e-10
Still not ok:
6. Back to default settings.
Try with Reltol=0.01
Still not ok:
7. Back to default settings.
Try with a combination of 6 and 7
Still not ok:
8. Back to default settings.
Try with .options Tseed=maxtimestep/10
Still not ok:
9. Have the components real values? Add a series resistor in the
capacitor(ESR) or inductor.
Still not ok:
10. Try with .ic and .nodeset
Still not ok:
11. Let try other people. :)
Don't under estimate hint 11.
--- end
"analog", I will add your tips to the FAQ in the LTspice-Yahoo group.
Best regards,
Helmut
Jim Thompson
<HelmutS...@t-online.de> wrote:
[snip]
>
>Btw, PSPICE has become harder to use since Cadence switched
>to the ORCAD schematic interface which is intended for PCB designs.
>This is ok for PCBs but you will need more time to make a
>schematic for SPICE.
>
[snip]
I don't understand your comment. As much as I despise Capture, as the
worst GUI creation ever known to man, it does interface to PSpice just
fine.
Helmut Sennewald
news:2h2ej1pq0n4s2g701...@4ax.com...
> On Sun, 25 Sep 2005 22:28:27 +0200, "Helmut Sennewald"
> <HelmutS...@t-online.de> wrote:
>
> [snip]
> >
> >Btw, PSPICE has become harder to use since Cadence switched
> >to the ORCAD schematic interface which is intended for PCB designs.
> >This is ok for PCBs but you will need more time to make a
> >schematic for SPICE.
> >
> [snip]
>
> I don't understand your comment. As much as I despise Capture, as the
> worst GUI creation ever known to man, it does interface to PSpice just
> fine.
Hello Jim,
My intention was to say that a schematic capture program intended
for a complex PCB-layout program adds complexity which isn't
required for a (P-)SPICE schematic.
Best regards,
Helmut
Jim Thompson
<HelmutS...@t-online.de> wrote:
>"Jim Thompson" <thegr...@example.com> schrieb im Newsbeitrag
>news:2h2ej1pq0n4s2g701...@4ax.com...
>> On Sun, 25 Sep 2005 22:28:27 +0200, "Helmut Sennewald"
>> <HelmutS...@t-online.de> wrote:
>>
>> [snip]
>> >
>> >Btw, PSPICE has become harder to use since Cadence switched
>> >to the ORCAD schematic interface which is intended for PCB designs.
>> >This is ok for PCBs but you will need more time to make a
>> >schematic for SPICE.
>> >
>> [snip]
>>
>> I don't understand your comment. As much as I despise Capture, as the
>> worst GUI creation ever known to man, it does interface to PSpice just
>> fine.
>
>
>Hello Jim,
>
>My intention was to say that a schematic capture program intended
>for a complex PCB-layout program adds complexity which isn't
>required for a (P-)SPICE schematic.
>
>Best regards,
>Helmut
>
That's why the "Simulation Only" designator you can place on
parts/pages that don't actually end up on the board, but are needed
for simulation.
But I still prefer "Schematics" as the PSpice frontend.
Paul Rako
layout package. I spent 25 years as a contractor/consultant. The
recent rate I charged was 80 to 100 dollars an hour. Believe me,
a client does not care about SPICE runs. He wants to see hardware,
little green boards. Only then does his blood-pressure drop. As
far as they are concerned even drawing a schematic seems silly as
well as the layout software. Maybe that is why so very many
companies seem to lose the schematic and layout files and want
me to improve or fix things with only a Gerber. Then it is off
to Protel (or some other package I tend not to enjoy) because it
can import a Gerber to the layout package and at least lets you
wing things from there.
Now in my mind the most important principle about ECAD is connectivity.
That what you draw on the schematic will show up as a flight line
in the rats nest and that any gate swaps or re-annotation done
in layout can be back-annotated. Having a separate SPICE schematic
violates this principle. Now you have something whose coherence is only
assured by human inspection.
Now I sure do appreciate the difficulty in making SPICE sources in a
schematic for layout or alternatively, connector parts for something
that will be SPICEed. And Jim, I think when people talk about the
the misery of using SPICE Orcad Capture it is the "occurances" vs
"instances" issues I mentioned. You are one of several hard-core
designers I have met that prefers PSPICE schematics to capture. There
are enough of you that Cadence still lets you download the PSPICE
capture program even for 10.5 release.
As to getting the board parasitics back, then you have to leave the
lumped element SPICE world and go to 2 or 3-D field solvers like
hyperlynx. This is generally referred to as signal integrity.
High-zoot hyperlynx that can handle lossy transmission lines is
48 grand or so. And good old Orcad has a hyperlynx output export,
even though Hyperlynx is now a Mentor tool.
Judging our test is just observing the schematic and what one has to
do to get good results. Pretty much just read the thread when
you get around to it and comment on the methodology and results.
We want to enter a schematic Jim Williams built many years go and
see how various SPICE packages do. I also have some PSPICE stuff that
did not converge and will post that and bear the withering criticism
that I did something stupid or had a bad model. But the group has
to understand it is not just about convergence-- it is about
having the real board agree with the SPICE results.
Paul
Mike Engelhardt
>> ...it's not very hard to understand why LTspice runs
>> faster and is more accurate then other/earlier SPICE
>> engines. I occasionally give 4hr seminars that explain
>> in some detail what one needs to do to make a better
>> SPICE engine[...]in the seminar, I demonstrate the
>> fantastically improved accuracy of the core LTspice
>> solvers and the corresponding improvements in simulation
>> speed with live simulation runs. Anyway those with
>> legitimate interest in LTspice can contact your local
>> LTC office and request when/where the next seminars
>> will be.
>
> Well if you will have a garbage-posting dishonest creep
> like me to your four-hour seminar I feel the least I can
> do is attend. I'll talk to Gary Sapia in the local
> sales office about the seminar. Thanks for the invite.
> Look for the guy in the back row wearing a Nixon mask.
No, you misunderstood that as an invite. You have no
legitimate interest in LTspice. You are just an analog
applications guy working on Webench for National Sem.
and a liar posting garbage about me, LTspice and Linear's
beloved CEO emeritus. IC companies target LTspice
all the time, you're just another source of misleading
and dishonest comments. Please be hereby advised, you
are not permitted to attend any LTspice seminar.
--Mike
Robert
<Since material top posted am cutting out previous>
"Having a separate SPICE schematic
> violates this principle. Now you have something whose coherence is only
> assured by human inspection."
Why do you assume this?
Aren't LVS or "Layout versus Schematics" tools known in your work?
Robert
Paul Rako
As I keep saying over and over and over I am concenred with board-level
tools, not what is available for ICs.
Paul
Paul Rako
Does this mean we can't be friends?
Oh well, let me assure you that your hot-headed
personality will not prevent me from singing the
praises of LTspice once someone can show me some
facts like solution time, convergence success and
conformance to real-world board results. Since
those results depend on the models I hope you can
convince somebody at LT to post A to D converter
models. I sure don't see them on the website.
So when I wrote:
>>That may be why National does not release A to D converter SPICE
>> models.
maybe analog's comment:
>Or maybe they are a bunch of hacks who should swallow their pride
>and sign up for an LTspice seminar. :)
Should be taken by LT IC designers as well. But if you
won't let me go to the seminar then I will
be a hack forever. Sigh.
And stop being so damn sensitive. If you think I
am hard on Swanson you should hear what I have to
say about Halla. And I don't work directly for
National anyway, I contract there. (But I do drink
beer with LT people so that should count for
something.)
Look, all I am trying to say is that board level
SPICE is far less useful to system-level designers
("just apps guys" in your parlance) then it is
to IC designers. I am not trying to be like my
pal Pease that says SPICE is useless. I am not
as smart as Bob and I need SPICE to calculate
closely spaced poles and to do worse-case tolerance
stackups on passive attenuator networks. But
kids who expect it to successfully predict the
performance of a complex signal chains are delusional.
When temperature effects and part corner-cases come
into play then counting on SPICE is really absurd
(board-level). Here is where I do agree with Bob:
A computer program, no matter how big and fancy
cannot replace human judgment and experience.
Hey Mike, I got a 64Mbyte USB stick at Arrowfest
from ST microcontrollers. Will you let me come
to the seminar if give it to you? Please? I
was just kidding about the Nixon mask. Sigh.
Paul
Ken Smith
Paul Rako <sp_a_m...@yahoo.com> wrote:
>Never heard of such a thing. Please name one or two and I will look them up.
>As I keep saying over and over and over I am concenred with board-level
>tools, not what is available for ICs.
There are a couple of nice programs that will check your PCB layout
program's netlist output against the spice net list to find errors. They
use some tricks to relate the net names to each other so that they will
find nets that are broken into two sections and nets that are shorted.
They are free to download and I was going to give you the link but since
you top posted I decided not to.
>
>> <Since material top posted am cutting out previous>
>>
>> "Having a separate SPICE schematic
>>
>>>violates this principle. Now you have something whose coherence is only
>>>assured by human inspection."
>>
>>
>> Why do you assume this?
>>
>> Aren't LVS or "Layout versus Schematics" tools known in your work?
>>
>> Robert
>>
>>
--
--
kens...@rahul.net forging knowledge
Paul Rako
client is set to reply first with your quotes underneath?
Geez, no 4 hour LT SPICE seminar and no LVS tools. Sigh.
Paul
Jim Thompson
(Ken Smith) wrote:
>In article <LdSZe.684$Fi3...@newssvr29.news.prodigy.net>,
>Paul Rako <sp_a_m...@yahoo.com> wrote:
>>Never heard of such a thing. Please name one or two and I will look them up.
>>As I keep saying over and over and over I am concenred with board-level
>>tools, not what is available for ICs.
>[....]
>There are a couple of nice programs that will check your PCB layout
>program's netlist output against the spice net list to find errors. They
>use some tricks to relate the net names to each other so that they will
>find nets that are broken into two sections and nets that are shorted.
>They are free to download and I was going to give you the link but since
>you top posted I decided not to.
>
>
[snip]
Come on! Tell us!
Chuck Harris
-Chuck
Ken Smith wrote:
> In article <LdSZe.684$Fi3...@newssvr29.news.prodigy.net>,
> Paul Rako <sp_a_m...@yahoo.com> wrote:
>> Never heard of such a thing. Please name one or two and I will look them up.
>> As I keep saying over and over and over I am concenred with board-level
>> tools, not what is available for ICs.
> [....]
Oh, be a pal and post the links!
-Chuck
> There are a couple of nice programs that will check your PCB layout
> program's netlist output against the spice net list to find errors. They
> use some tricks to relate the net names to each other so that they will
> find nets that are broken into two sections and nets that are shorted.
> They are free to download and I was going to give you the link but since
> you top posted I decided not to.
Oh, be a pal and post the links!
-Chuck
>>> <Since material top posted am cutting out previous>
>>>
>>> "Having a separate SPICE schematic
>>>
>>>> violates this principle. Now you have something whose coherence is only
>>>> assured by human inspection."
>>>
>>> Why do you assume this?
Oh, be a pal and post the links!
-Chuck
>>>
>>> Aren't LVS or "Layout versus Schematics" tools known in your work?
>>>
>>> Robert
Oh, be a pal and post the links!
-Chuck
Actually, just do a Google on the words: spice netlist checker
and you will get links to dozens of programs that should do the
trick.
-Chuck
Paul Rako
I have looked at Tanner's tool and others and they all seemed
geared to IC design or comparing two SPICE schematics.
I can see how it would be easy to compare the net-list
outputs of two programs but us board guys have a specific
problem: After we lay out the board we re-annotate so
that the reference designators ascend from left to right
and top to bottom. Now there needs to be yet another tool
so that the SPICE schematic can be back annotated. Naw,
enough trouble in the world-- I prefer to stick with Orcad
or Pads or Electronics Workbench that can do the layout
against one schematic. I will keep looking at the listings.
I did not know this type of tool existed.
PS: Use Opera web browser and you can plug-in the aspell
spell-checker to spell check any text box in the browser.
Works great in Google Groups.
Got a hold of Jim Williams and he will get the article out
tonight from his files. He said there were several circuits.
This should be fun.
Paul
analog
Paul Rako wrote:
> We want to enter a schematic Jim Williams built many years go and
> see how various SPICE packages do. I also have some PSPICE stuff
> that did not converge and will post that and bear the withering
> criticism that I did something stupid or had a bad model. But the
> group has to understand it is not just about convergence -- it is
> about having the real board agree with the SPICE results.
Hello Paul,
Please thank Jim Williams for passing along his test schematic and
post it here along with your own test circuits (or just email them
to me if size or format is an issue and I'll be happy to post them
for you over on alt.binaries.schematics.electronic). It's been a
few days now. Should we expect them tomorrow? ;)
Regards -- analog
Jim Thompson
I'm anxious to see them as well.
analog
Jim Thompson wrote:
> analog wrote:
>> Paul Rako wrote:
>>
>>> We want to enter a schematic Jim Williams built many years go and
>>> see how various SPICE packages do. I also have some PSPICE stuff
>>> that did not converge and will post that and bear the withering
>>> criticism that I did something stupid or had a bad model. But the
>>> group has to understand it is not just about convergence -- it is
>>> about having the real board agree with the SPICE results.
>>
>> post it here along with your own test circuits (or just email them
>> to me if size or format is an issue and I'll be happy to post them
>> for you over on alt.binaries.schematics.electronic). It's been a
>> few days now. Should we expect them tomorrow? ;)
>
I hope you aren't bating your breath, because after almost a week
of nothing, it sure looks like Paul Rako was all empty promise - in
other words, a loser troll.
I sure hope he gives me reason to take that back. I still would
love to have a look at the Jim Williams test circuit - or any other
legitimate circuit that supposedly gives spice convergence fits.
As mentioned earlier, my efforts over at the LTspice usersgroup on
Yahoo Groups in soliciting such a mythical beast have all come up
empty handed. In my experience, most convergence stubborn
simulations turn out to be examples of garbage in, garbage out.
I have *never* come across a meaningful simulation that didn't
converge or couldn't be made to converge in short order.
Regards -- analog
Jim Thompson
Same here. EVERY simulation I've tried that failed initial
convergence either had no Ground (node 0), or was truly a screwed-up
circuit.
Kevin Aylward
I have. On many occasions.
I have to disagree. Sure, by and large LTSpice does deal with
convergence very well. However, pretty much any Spice3/XSpice based
spice can have problems (EWB, CM, VisualSpice, Tina, etc.), especially
with cmos cascode current mirrors. I know. I have such a mythical
beastie *right now*. Tanner Spice also cannot converge on them.
These circuits are *real* circuits with no design faults. Most board
level design don't really deal with large transistor count, high
impedance circuits, and so don't usually came up against these sort of
problems. In ic design its the norm.
Charlie Edmondson
Well, I can say that I have seen several designs that thwarted PSpice
convergence, that I couldn't fix, but then, there were several common
characteristics...
First, liberal use of ABM models to represent some portion of the
device, like VSwitches for FETs, or Evalues to do DC to DC conversion,
or other simplifications in the circuit, usually with no representation
of the parasitics or other 'realities' inherent in the represented device.
Second, 'interesting' references to ground, often through high
resistances (or occasionally, low resistances) that confuse the issue of
where to reference the voltages. While these, in and of themselves,
shouldn't be fatal, it does make traking down the problem more
difficult. Also, you can get order-of-magnitude errors from them, as
you get very high currents and very low currents in the same simulation.
This is also what makes SMPS simulations so difficult. They often run
into dynamic range problems, as on the one hand they have very high
current sections, on the other, they have pico-amp sections in the
control logic. Spice only has so much dynamic range to play with, and
transients can 'overload' the simulator!
Charlie
JosephKK
> Looking for a spice model or subcircuit netlist for the LM709 from
> National semiconductor. I asked intusoft, cause they have a free model
> service. I bought their entry level software ICAP/4 8.3.3 from a dealer
> purchased in 2000. For reasons I won't mention, I was denied the
> request from their sales department.
>
> I was going to email National, but from what I read in Bob's book
> "Troubleshooting Analog circuits" he doesn't like S.P.I.C.E.
> and for good reason...........:)
>
> Any help on this request would be great....
>
> Thanks
> Neil
I Googled for it using "LM709 spice model" and found on the first page of
results i found:
http://www.macs.ece.mcgill.ca/~rfic/EC2/SPICE_MODEL_LIB.htm
Does that serve your needs?
--
JosephKK