Index: src/SIMH/PDP8/pdp8_fpp.c
==================================================================
--- src/SIMH/PDP8/pdp8_fpp.c
+++ src/SIMH/PDP8/pdp8_fpp.c
@@ -23,10 +23,12 @@
    used in advertising or otherwise to promote the sale, use or other dealings
    in this Software without prior written authorization from Robert M Supnik.
 
    fpp          FPP8A floating point processor
 
+   05-Jan-22    RHM     Fix fencepost error in FP multiply for extended
+                        precision
    03-Jan-10    RMS     Initialized variables statically, for VMS compiler
    19-Apr-09    RHM     FPICL does not clear all command and status reg bits
                             modify fpp_reset to conform with FPP
    27-Mar-09    RHM     Fixed handling of Underflow fix (zero FAC on underflow)
                         Implemented FPP division and multiplication algorithms
@@ -1176,11 +1178,12 @@
 for (i = 0; i < cnt; i++) { 
     if ((i % 12) == 0) {
         wc++;                                       /* do another word */
         lo--;                                       /* and next mpyr word */
         fpp_fr_algn (c, 24, wc + 1);
-        c[wc] = 0;
+        if (wc < FPN_NFR_MDS)                       /* Don't assume guard word */
+            c[wc] = 0;
         c[0] = c[1] = fill;                         /* propagate sign */
         }
     if (b[lo] & FPN_FRSIGN)                         /* mpyr bit set? */
         fpp_fr_add(c, a, c, wc);
     fill = ((c[0] & FPN_FRSIGN) ? 07777 : 0);       /* remember sign */
@@ -1366,11 +1369,12 @@
     fpp_fr_fill (a, sign, cnt);
     return;
     }
 while (sc >= 12) {
     for (i = cnt - 1; i > 0; i--)
-        a[i] = a[i - 1];
+        if (i <= FPN_NFR_MDS)                       /* Don't overwrite if EP */
+            a[i] = a[i - 1];
     a[0] = sign;
     sc = sc - 12;
     }
 if (sc == 0)
     return;