FireSim

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Welcome! This forum provides support for FireSim, an FPGA-Accelerated hardware simulation platform. Find out more about FireSim at https://fires.im

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Jun 13

Firesim Sim makefile only supporting F1

Hello! In the makefile (firesim/sim/MakeFile), there is a line of code like this: # The host-platform

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Firesim Sim makefile only supporting F1

Hello! In the makefile (firesim/sim/MakeFile), there is a line of code like this: # The host-platform

Jun 13

Jan T., Junho Yeom3

Jun 13

Network Connection on RocketChip

check below link https://groups.google.com/g/firesim/c/qCPLK9xbs0U On Monday, June 10, 2024 at 3:24:

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Network Connection on RocketChip

check below link https://groups.google.com/g/firesim/c/qCPLK9xbs0U On Monday, June 10, 2024 at 3:24:

Jun 13

Jun 13

stuck in 'screen -r fsim0' (Running a Single Node Simulation using VCU118)

it's because of verilator version conflict. (since I add VERILATOR _ROOT to environment PATH, it

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stuck in 'screen -r fsim0' (Running a Single Node Simulation using VCU118)

it's because of verilator version conflict. (since I add VERILATOR _ROOT to environment PATH, it

Jun 13

Jun 12

Simulating my own Chisel code on U280

Hello everyone, I'm pretty new to FireSim so I'd appreciate some help for getting everything

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Simulating my own Chisel code on U280

Hello everyone, I'm pretty new to FireSim so I'd appreciate some help for getting everything

Jun 12

Jun 12

Measure execution time without trace file.

Hi everyone. I want to measure the execution time (cycle counts) of some tasks on fedora linux. ( I

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Measure execution time without trace file.

Hi everyone. I want to measure the execution time (cycle counts) of some tasks on fedora linux. ( I

Jun 12

Anjelica Bian, Nikolaos Charalampos Papadopoulos3

Jun 9

Bitstream build error: board_part definition was not found

Thank you so much! This problem is resolved, but when I try to run the program again, another issue

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Bitstream build error: board_part definition was not found

Thank you so much! This problem is resolved, but when I try to run the program again, another issue

Jun 9

Jun 7

Using Other Vivado versions to build my own hardware designs

Hello! I am working through the guide to set up my computer to build and simulate my own hardware

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Using Other Vivado versions to build my own hardware designs

Hello! I am working through the guide to set up my computer to build and simulate my own hardware

Jun 7

Charles Han, … Junho Yeom4

Jun 7

meet 'NoRegionError' when run firesim enumeratefpgas

Check it. it's not caused by deploy/config_hwdb.yaml, but deploy/config_runtime.yaml.

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meet 'NoRegionError' when run firesim enumeratefpgas

Check it. it's not caused by deploy/config_hwdb.yaml, but deploy/config_runtime.yaml.

Jun 7

Ton Nguyen SInh, … Manchem Chandana Sai Sri ee19b0938

Jun 1

Issue with Detecting Xilinx PCIe Device in VCU118 FPGA Installation

Hi Yeom Junho, The issue with detecting pci slot was rectified, even after setting the sw16 pins of

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Issue with Detecting Xilinx PCIe Device in VCU118 FPGA Installation

Hi Yeom Junho, The issue with detecting pci slot was rectified, even after setting the sw16 pins of

Jun 1

Connor Sullivan

May 31

Questions abou DRAM model

Hi all, I am trying to better understand all of the possibilities for the DRAM model in FireSim.

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Questions abou DRAM model

Hi all, I am trying to better understand all of the possibilities for the DRAM model in FireSim.

May 31

Connor Sullivan

May 16

Downgrade Marshal kernel version

Has anyone else tried this before? I've come across an issue when using FireMarshal inside of

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Downgrade Marshal kernel version

Has anyone else tried this before? I've come across an issue when using FireMarshal inside of

May 16

Connor Sullivan

May 9

CSR counter read issues

Hello, Has anyone else had issues reading boom/rocket csr counters when simulating build-root Linux?

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CSR counter read issues

Hello, Has anyone else had issues reading boom/rocket csr counters when simulating build-root Linux?

May 9

Apr 23

Failed to detect config BAR

When doing "insmod xdma.ko" I always get this error: [ +0.000004] xdma:is_config_bar: BAR 2

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Failed to detect config BAR

When doing "insmod xdma.ko" I always get this error: [ +0.000004] xdma:is_config_bar: BAR 2

Apr 23

Wenzel Pünter, Gon Solo4

Apr 23

Cannot reproduce documented Nitefurry II-based FireSim environment due to XDMA Errors

When flashing the fpga with the project that comes with the Nitefury II, the "config BAR"

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Cannot reproduce documented Nitefurry II-based FireSim environment due to XDMA Errors

When flashing the fpga with the project that comes with the Nitefury II, the "config BAR"

Apr 23

Apr 18

Estimating effort to support other closely-related FPGAs

I understand the Xilinx VCU118 is officially supported by FireSim, but is there an (expected to be)

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Estimating effort to support other closely-related FPGAs

I understand the Xilinx VCU118 is officially supported by FireSim, but is there an (expected to be)

Apr 18

Kamalavasan Kamalakkannan

Apr 17

Xilinx U280: Cattrip pin D32 must be driven to '0'

Hi Everyone, I am trying to do firesim FPGA accelerated simulation on Xilinx alveo U280 and came

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Xilinx U280: Cattrip pin D32 must be driven to '0'

Hi Everyone, I am trying to do firesim FPGA accelerated simulation on Xilinx alveo U280 and came

Apr 17

Manchem Chandana Sai Sri ee19b093

Mar 18

Printf and assertion sythesis of verilog statements in custom core in FireSim

Hello everyone, I want to synthesize assertion and display statements in our custom core which are

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Printf and assertion sythesis of verilog statements in custom core in FireSim

Hello everyone, I want to synthesize assertion and display statements in our custom core which are

Mar 18

Mar 14

lspci/setpci error related to 'firesim enumeratefpga'

Hello, I previously asked a question related to "firesim enumeratefpgas" and thought the

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lspci/setpci error related to 'firesim enumeratefpga'

Hello, I previously asked a question related to "firesim enumeratefpgas" and thought the

Mar 14

Manchem Chandana Sai Sri ee19b093

Feb 29

DRC errors after changes in TracedInstruction module and TracerVmodules

Dear Sagar, I've added an extra signal whose width is 210 bits to trace bundle, the compilation

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DRC errors after changes in TracedInstruction module and TracerVmodules

Dear Sagar, I've added an extra signal whose width is 210 bits to trace bundle, the compilation

Feb 29

Connor Sullivan

Feb 29

I am trying to use the mempress traffic generator from Chipyard. When trying to run the workload in

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I am trying to use the mempress traffic generator from Chipyard. When trying to run the workload in

Feb 29

Connor Sullivan

Feb 22

Metasimulation assertions

Hi all, I am working to debug my simulation and had a question. If there is an assertion that fires

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Metasimulation assertions

Hi all, I am working to debug my simulation and had a question. If there is an assertion that fires

Feb 22

임준수, … jin yuan7

Feb 22

[u250 on-prem] hello, I got a problem when i tried to run "firesim enumeratefpgas"

Thank you for your response. I tried modifying the contents of the installed generate-fpgas-db.py

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[u250 on-prem] hello, I got a problem when i tried to run "firesim enumeratefpgas"

Thank you for your response. I tried modifying the contents of the installed generate-fpgas-db.py

Feb 22

Feb 21

AWS CopyFpgaImage Denied when building custom designs

As it turns out, it was because of `copy_afi_to_all_regions` in `aws_create_afi`. It contains eu and

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AWS CopyFpgaImage Denied when building custom designs

As it turns out, it was because of `copy_afi_to_all_regions` in `aws_create_afi`. It contains eu and

Feb 21

Feb 20

configurations enabling read_cycles

Hello, I try to record how many clock cycles one app running in the br-base linux takes to finish its

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configurations enabling read_cycles

Hello, I try to record how many clock cycles one app running in the br-base linux takes to finish its

Feb 20

Connor Sullivan

Feb 8

Simulated clock freuqency

Hi all, I am trying to understand what the default simulated clock frequency is. Based on the

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Simulated clock freuqency

Hi all, I am trying to understand what the default simulated clock frequency is. Based on the

Feb 8

Zhe Jiang, jin yuan2

Jan 24

"sudo:yum:command not found" when running build-setup.sh

Hi Zhe, The only place where a sudo yum command is used is inside the "if wget -T 1 -t 3 -O /dev

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"sudo:yum:command not found" when running build-setup.sh

Hi Zhe, The only place where a sudo yum command is used is inside the "if wget -T 1 -t 3 -O /dev

Jan 24

Jan 19

-bash: /deploy/awstools/aws_setup.py: No such file or directory

Hi , I am trying to follow AWS EC2 F1 Getting Started Guide Initial Setup/Installation and i am

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-bash: /deploy/awstools/aws_setup.py: No such file or directory

Hi , I am trying to follow AWS EC2 F1 Getting Started Guide Initial Setup/Installation and i am

Jan 19

12/21/23

firesim generated synthesis xdc

Updates for the parameter of BUFGCE. I found that we can parameterize the generated BUFGCE in firesim

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firesim generated synthesis xdc

Updates for the parameter of BUFGCE. I found that we can parameterize the generated BUFGCE in firesim

12/21/23

Manchem Chandana Sai Sri ee19b093

12/19/23

No content in TRACEFILE-C0

Hi, I am trying to capture the trace of the instructions while running linux workload on firesim

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No content in TRACEFILE-C0

Hi, I am trying to capture the trace of the instructions while running linux workload on firesim

12/19/23

Jan T., Paul Genssler3

12/14/23

RoCC Area Utilization Report

Hi Paul, that works, thanks for your help! Best, Jan Paul Genssler schrieb am Freitag, 8. Dezember

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RoCC Area Utilization Report

Hi Paul, that works, thanks for your help! Best, Jan Paul Genssler schrieb am Freitag, 8. Dezember

12/14/23

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