Re: Digest for electricvlsi@googlegroups.com - 2 updates in 1 topic

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Alexandre Rusev

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Mar 24, 2017, 9:28:42 AM3/24/17
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Amount of requests likes "let's design real chip with  real process PDK using Electric and fabricate it then" is growing?

Can we get support from some factory or at least from IP-core design company?
I encounted Electric prsentation in Imagination Thech presentation on their MIPS cores, recently.



On Fri, Mar 24, 2017 at 9:35 AM, <electr...@googlegroups.com> wrote:
"Maurício Carvalho" <mauric...@gmail.com>: Mar 23 09:15AM -0700

Hi everyone,
 
I would like to develop a full open source RISCV-based System-On-Chip
making use of free VLSI tools and PDKs (possibly making everything freely
available). I have been playing with electric vlsi for some years but I
never did anything serious with it besides playing with small designs and
doing simple tests. On industry standard tools, however, I have been doing
a couple of serious professional works and I have a reasonable
understanding of the digital and analog flow.
 
I have a few questions regarding electric and my goal:
 
1) I'd like to know if electric could work well with distributed computing
for physical synthesis and other computing intense work. For example, If I
have a powerful workstation including several CPUs and such, would it
correctly make use of the system's resources?
 
2) I have found some open source PDKs, but I could never find an answer
whether they can produce a reliable layout and the relative foundry where
it can be actually manufactured. I presume someone has already manufactured
a design, possibly with MOSIS PDKs, using Electric? Any other suggestions
are welcome. I have found a .18 library, but I would like to use sub-micron
technologies 90nm, 65nm and 45nm. I guess listing as many open source PDKs
related to a specific Foundry as I can would also help.
 
3) What about automated DFT in electric? Sure we can manually add some
blocks at the RTL, but scan chains can be quite difficult to implement
without useful information from the synthesized circuit. What about ATPGs?
Are there any possibility to integrate these tools on electric? Or, are
there any open source Test Tools? I've asked for the Lifting fault
simulation tool but never got an answer back from the developers.
 
4) Is there an SDC equivalent for Electric during logic and physical
synthesis?
 
5) Does anyone know where I can find an open source memory cell? Or a very
cheap one which would include models for logic and electrical simulations?
 
I'm sure there are many other questions I'd like to add to this post, but
it is best to keep it short for now.
 
Hope someone can help!
 
Regards,
Mauricio De Carvalho
"Luís Vitório Cargnini" <lvcar...@gmail.com>: Mar 23 10:49AM -0700

Hi Mauricio,
 
Regarding OpenPDKs, what you have are synthetic PDKs, they cannot be
fabricated. If you take FreePDK45 and Nangate OpenCell 45nm, or FreePDK15
and OpenCell16 (FinFet) you have your openPDKS, you can publish, discuss
widely open, but you cannot fabricate. SIAM32 from Synopsys also add on top
of that (28nm) the memory banks.
 
You can download the Synopsys on University connection, OpenCell 16nm is a
1k fee one-time for universities, 45nm is open to download at Si2.
 
Regarding memory, in general, you would get the memory compiler from the
foundry for the specific process or design your own, e.g., Qualcomm has an
entire division designing SRAM banks.
 
1) No, you have to modify and add this capability in the tool;
2) MOSIS had an internal lambda system where you would design in 'MOSIS'
process and they would translate to partner foundries at the time, nowadays
you get the process of the specific foundry trough MOSIS after signing the
NDAs. You may still be able to use the Lambda system embedded on
ElectricVLSI, however, I believe 200nm is the limit, below that is foundry
and process specific;
3)No idea, I believe you would need a 3rd party to load your electric made
design insert the ATPG and then reload it within Electric, or you can
create a tool and embed it on Electric (why not);
4)I'm not sure
5)There is none as far as I know, you have to design your own or use the
one supplied by the foundry (lib,lef,gdsII)
 
Regards,
Vitorio.
 
 
On Thu, Mar 23, 2017 at 9:15 AM, Maurício Carvalho <mauric...@gmail.com>
wrote:
 
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