VHDL/Verilog/Ada & software/hardware patent equivalence
Gregory Aharonian
software that I will be presenting at a Patent Office hearing in San Jose
the week of Jan 24th. It is based on the ability to map VHDL and Ada into
each other, amongst other things.
I would appreciate any critiques from people in the hardware design
world, and a chance to visit some of the Bay Area CAE firms that week.
Thanks, Greg Aharonian
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PATENT EQUIVALENCE OF SOFTWARE AND HARDWARE
Comments for the upcoming hearing
Gregory Aharonian
Internet Patent New Service
P.O. Box 404, Belmont, MA 02178
617-489-3727 pat...@world.std.com
Jan. 12, 1994
I argue that current hardware circuit design
tools that allow software algorithms to be
used to generate integrated circuits, also
provide sufficient cause under the Doctrine
of Equivalents to eliminate any distinction
between hardware and software.
At the end of this month, the US Patent and Trademark Office is holding
hearings in San Jose to solicit comments on perceived and actual problems with
the issuance of software patents. Many issues will be addressed: should
software patents be issued, should algorithms be patented, what is 'novel'
and 'obvious' in the software world, etc.
Noticeably missing from most software patent discussions is whether or
not, in the eyes of the court, there is any legal distinction between hardware
and software. For example, the Federal Register announcement of the software
patent hearings, about 6000 words, only uses the word 'hardware' once. It is
as if in the information world, that mind-body dualism is valid: there is mind
(software) and body (hardware), separate.
I argue that this is not so, and that any attempts to correct the problems
of software patenting without treating hardware in parallel will not change
patenting activities one iota: there will be large loopholes to circumvent
any additional rules that might be imposed. These loopholes arise from
current developments in circuit design technology, where traditional software
algorithms can be automatically converted into hardware devices and where
traditional hardware schematics can be automatically converted into software
algorithms.
My case: a potentially patentable algorithm, while physically expressed in
two different syntactical forms (digital circuit assemblies and programming
language instructions), has one underlying semantic representation according
to the circuit design tools, and properly argued, in the eyes of the courts
under the Doctrine of Equivalents.
--------
In the accompanying diagram, a variety of existing software and hardware
technologies are depicted, linked by arrows depicting transformations that
can be automatically accomplished with existing software tools.
WHAT IS SOFTWARE
The top of the diagram depicts 'traditional' software technologies. The
focal point here is the traditional software algorithm written in a computer
language such as C, Ada, Pascal, Basic or Fortran. Such algorithms, and more
broadly software systems, are then compiled and linked and turned into an
executable software application. [Most of the following discussion is based
on personal computer (PC) technology, but applies to all others hardware
platforms such as workstations and mainframes].
In parallel, there are simulation language technologies such as STELLA
in which algorithms can be expressed, eventually resulting in programs that
produce graphical or numerical output. And in recent years, there has been
somewhat of a blur between traditional programming languages in graphical
environments and simulating programming languages.
Despite many expressions of these technologies, few will dispute that it
all is classified as software, and indeed most of the 11,000+ software patents
that have been issued by the USPTO have been developed and expressed using
these technologies.
WHAT IS HARDWARE
The bottom of the diagram depicts 'traditional' hardware technologies
such as digital I/O specifications that are turned into digital circuits that
are turned into integrated circuits. For many years, these transitions were
done manually with great labor and with specialized tools that were not very
user friendly (try SPICEing the Pentium by hand), but in recent years firms
such as Mentor and Cadence have produced very useful and very powerful tools.
The problem that faces the patent community is the gradual convergence of
the technologies used by these two supposedly different domains. The middle
of the diagram, the "?" section, depicts the newer hardware design technology,
in the boxes labelled "Circuit Design CAE Tool" and "Net Lists/Foundry".
With these software tools, circuit diagrams can be drawn on the display, the
circuit analyzed and simulated, the corresponding integrated circuit laid out
and connections routed, and finally foundry information needed to generate an
integrated circuit. While this capability in a totally integrated environment
is very new, and faces years of improvement and enhancement, it is a viable
capability.
VHDL
At the heart of most of these tools is a digital circuit representation
language, either an open standard such as VHDL or a proprietary language such
as Verilog (which is now open). I will focus on VHDL, though these arguments
are independent of the representation language. VHDL (the VLSIC Hardware
Desciption Language) was created by the Department of Defense, and allows the
structure of any digital system to be represented in the notation of a
programming language.
Using VHDL as a foundation allows a variety of circuit design tools to use
a common representation to exchange information. Circuit-schematic graphical
manipulation programs may on the display screen manipulate conventional images
of digital hardware devices, but internally represent hardware devices with
VHDL, though in many tools both representations are presented on the screen
simultaneously.
Other representation languages include Verilog HDL, a formerly proprietary
representation language from Cadence Design Systems, which was placed in the
public domain by Cadence. Verilog and VHDL dominate the tool market, though
other representation languages are used. Much of what is said about VHDL in
formal arguments will hold for Verilog - they are mappable onto each other.
And while this argument only considers digital hardware, the DoD is developing
an AHDL - Analog Hardware Description Language, which will allow these
arguments to be carried over into the analog design world.
So far nothing mentioned appears to lead to any overlapping of hardware
and software. While the hardware design tools are software technologies, they
are still used within the confines of the hardware world. Much like software
patents have rely on software development tools, most tool-developed hardware
circuits have rely on these hardware development tools. But to date, the tools
have had little in common when being used.
VHDL <=> ADA
The hardware/software overlap arises from the nature of VHDL specifically,
and generally the nature of hardware description languages. VHDL is similar
syntactically to Ada, a traditional programming language not surprisingly also
created by the Department of Defense, a similarity that is apparent when you
lay side-by-side the BNF grammars for the two languages (or if you type into a
computer the BNF grammars for the two languages). Stanford's DIANA tools for
Ada could be a good basis for mapping between Ada and VHDL.
Consider then a simple signal processing algorithm an inventor wishes to
receive a patent for, say an algorithm for determining the difference in time
between the only two peaks that appear in a signal (very old submarine mine
patents actually used such algorithms). The inventor could write an Ada
program that implements the algorithm (assuming that the system on which the
program will execute supplies a digitized signal as input, a Unix pipe for
example), test the algorithm, compile the software and turn it into a software
application. All of this is "software" concepts, and valid materials for
obtaining a software patent (and I have seen many cases of algorithms as
trivial as this being granted software patents).
The inventor could also write a VHDL description of the same algorithm
(assuming that the system on which the resulting device will be used supplies
a digitized signal as input), simulate the resulting hardware device, and
using hardware design tools, prepare and produce the corresponding integrated
circuit. All of this is "hardware" concepts, and valid materials for
obtaining a hardware patent (and I have seen many cases of algorithms as
trivial as this being granted hardware patents).
The problem for patent law is that the Ada algorithm and the VHDL
description can be proved logically equivalent, by the use of translation
tools between the two languages. If so, then anything derived from Ada,
"software", is equivalent to anything derived from VHDL, "hardware".
DOCTRINE OF EQUIVALENTS
Quoting from West's Nutshell Series on Intellectual Property, page 125,
on patent infringement vis-a-vis the Doctrine of Equivalents, we have:
"The doctrine of equivalents dispenses with any requirement"
of literality and hold that each element of an invention need
not be indentically present in the accused infringement.
Instead of absolute identity, all that is required is a
substantial equivalent. Something is substantially equivalent
if the skilled practitioner would know of the practical
interchangeability of the accused infringer's elements with
those specifically identified in the patent specification.
The doctrine of equivalents is limited, however, by the
doctrine of file wrapper estoppel. To the extent that an
inventor has limited his invention is a particular way before
the Patent Office, he will not be allowed later to broaden
the claims through the doctrine of equivalents if that
broadening will have the effect of nullifying the limitations
to which the inventor agreed before the examiner."
By representing the patentable algorithm either in VHDL or Ada, and using
automated tools to translate between the two languages, any hardware element
derived from a part of the VHDL specification is substantially equivalent to a
software element derived from the Ada translation of the VHDL, and vice-versa,
an equivalence known to skilled practitioners. This is grounds for invoking
the Doctrine of Equivalents as a basis for a patent infringement lawsuit.
With VHDL-based circuit design tools and VHDL/Ada translation tools,
a circuit diagram and a software algorithm, while expressed with different
syntaxes, have provably-equivalent semantics (proved through the mappings of
the translation tools) to justify claims of infringement under the Doctrine
of Equivalents, for any inventor patenting one form (say software) but wishing
to challenge someone using the other form (hardware).
A nice paper on this subject is "A Framework for Hardware/Software Codesign"
by Sanjaya Kumar, James Aylor (j...@virgina.edu), Barry Johnson and William
Wulf of the University of Virginia, appearing in IEEE Computer December 1993,
page 39-45. Also, "Codesign from Cospecification", IEEE Computer January 1994,
page 42, and "Program Implementation Schemes for Hardware-Software Systems",
IEEE Computer January 1994, page 48.
The limitation of file wrapper estoppel can be anticipated and dealt with
by dependent claims mentioning hardware and software separately, which is
discussed below. However, for existing patents not prepared with this
equivalence of hardware and software in mind, claim infringement probably
can't be invoked, because of file wrapper estoppel.
TURING MACHINE
The ability to translate VHDL into Ada, and vice versa (and through other
software tools, translating VHDL to other languages such as C++), or these
other languages into VHDL, means that "software" and "hardware" no longer are
nouns (just as "wave" and "particle" are no longer nouns in the quantum world)
but are adjectives, implying there is some underlying conceptual structure
to which the patent laws must be applied.
As the "Framework" article points out, the use of design tools and ASICs
(application-specific integrated circuits) allow complex algorithms to be
implemented quickly and cheaply as hardware. Equivalently, RISC (reduced
instruction-set computers) let much hardware functionality to be transferred
to software. The implementation choice increasingly is no longer functionality
based, but rather driven by economics. So for the patent hearings to be
productive requires examining the issue of "software" patents in the broader
context of "software/hardware" patents.
One way to do so is to discard the terms "hardware" and "software" for
the term "Turing-machine equivalent". The formal theory of algorithms, a
formal theory very compatible with patent law theory, uses the terminology
and mathematical mechanisms of automata, one instance being Turing machines.
Since mathematicians and computer scientists don't bother in their analyses
to worry about how their concepts are implemented (as hardware or software),
why should the patenting system make a distinction? For example, a unified
set of patent laws so based could read:
1) Any device equivalent to a Turing machine is patentable.
2) To be novel, a new device must not be Turing-equivalent to, or
a Turing-subset of, any existing publicly known device.
3) To be nonobvious, a new device must be Turing-different from
any existing publicly known device by a socially agreed upon
minimum number of states and transitions.
(And if I knew more about automata theory, I could state this a lot better).
In this way, hardware and software can be logically treated in an unambiguous
way in deciding matters of patentability, though for those who have ever coded
a Turing machine, not very practically. Still the formal mechanisms used by
mathematicians and computer scientists could be used to shape patent law.
This would be good practice for the eventual introduction of genetic sequences
and structures into these discussions, which are also Turing-machines.
GENERATING PATENTS FROM VHDL TOOLS
One way this equivalence is unavoidable is if any of the hardware design
tool companies add capabilities to their tool sets to generate a patent
application. After all, the ability to lay out the floor plan and netlists
of an integrated circuit from a VHDL description and user requests, is no less
of a complex process than preparing a patent application. In existing hardware
patents there are identifiable common specification frameworks that can be
used as a model for an automatically generated patent application, in terms of
specification style and gross structure of the patent claims. Acceptable claim
clauses can be extracted from existing hardware/software patents and put into
patent claim clause "cell-libraries".
Of course such an application would have to be reviewed by a patent lawyer
to be truly broad when issued, and to complete what the design tool can only
do partially, but subtantially. The hardware design tool can automatically
prepare at least one broad independent claim that mentions neither hardware
nor software, with at least one dependent claim specifying a hardware
implementation and one dependent claim specifying a software implementation.
Such a claim structure would satisfy all patent regulations while laying a
foundation for prosecuting infringement under the Doctrine of Equivalents.
It is important for the patent to have some dependent claims that are
hardware specific, and some that are software specific. In this way, a
defendant in a patent infringement lawsuit cannot ask for dismissal based on
file wrapper estoppel. This is important since the Federal Circuit is using
file wrapper estoppel to prevent the Doctrine oòEquivalents from being used
to overly generalize the scope of original patent claims.
And if any hardware design tool companies are looking for a consultant to
generate patent application generation modules for the design tools, you have
my email address :-) Seriously, it's about time automated processes are
brought to the aid of patent application preparation, as much as patent law
dinosaurs might consider this to be heresy.
RELATED TECHNOLOGIES
One may object to this scenario as being a specific context in which a few
tools can be used to create an equivalence between software and hardware by
translations between VHDL and Ada. However the diagram includes boxes with
technologies that show that the above scenario relates to a variety of other
technologies involved with software and hardware activities, so that my
proposed scenario (which admittedly has not been tested in the courts) is not
contrived.
For example, under the PC operating system Windows, I can create links
between a "software" application and a hardware representation in VHDL by
using technologies such as DLLs and DDEs (go ask Microsoft) or by embedding
VHDL fragments inside of objects via SOM (go ask IBM) and accessing these
VHDL fragments from object oriented programming environments (see the position
of the "DLL/DDE/SOM" box in the diagram). This mixes hardware and software
in the software application domain.
Tools from the world of automatic theorem proving, where knowledge is
represented and manipulated using predicate logic, not only allow digital
circuits to be manipulated by design programs, but for simple circuits, allow
the computer to automatically design the circuit using nothing more than a
list of the digital input and outputs to the circuit. So not only can I start
with a hardware circuit schematic and eventually end up with a software
algorithm, but also I can even forget about the circuit and start with an
input/output specifications to end up with software. This ability in theory
(since you practically can't design a microprocessor this way, only simpler
digital circuits) reinforces the legal argument of the common underlying
representation of hardware and software (given that predicate logic is most
definitely a "software" type of concept). From the theorem prover I can
generate both VHDL and Ada.
A related representation language, SPICE, used for circuit simulation,
can also be mapped into theorems, VHDL and simulation languages, and in turn
is used as a representation language for descriptions of physical systems
(potentially broadening the duality of algorithm hardware/software to some
universality of all devices - but I will let all of our children worry about
that headache, along with the headache of algorithms implemented in genetic
sequences and mechanisms, which are Turing machines).
One of the first areas where this overlap of hardware and software will
be a practical issue is in the area of neural network patents. It was in
reading many neural network patents over the past few years that I came to
realize (along with other studies) the irrelevance of software/hardware
distinctions. Also, there have been some very trivial software and hardware
patents issued over the past few years for which I could put together a set
of existing tools and demonstrate the various chains of mappings depicted in
the diagram.
HARDWARE AND SOFTWARE MUST BE TREATED TOGETHER
Thus to discuss and treat "software" patents in isolation from "hardware"
probably will have a marginal impact on the problems for which the hearings
are being called. Current software and hardware design tools render such
distinctions irrelevant - to treat one aspect leaves loopholes through the
other aspect. This affects not only the nature of patents, but also broadens
the scope of any efforts to prepare comprehensive software prior art databases
to better determine novelty and obvious, such databases being the most
immediate solution to start treating these problems (though this is my bias
based on nature of the "hammer" that I own).
One problem that patent community will have to address is how to deal with
many loosely associated technologies as they apply to patent issues. VHDL,
Ada, Turing machines, predicate logic, automated translation, digital circuit
analysis, operating system utilities, automata theory, and the doctrine of
equivalents and others all have to be considered simultaneuously in treating
the patent laws. I am not sure if there is enough Jolt Cola to do so :-)
TURING MACHINE
There is no formal distinction between hardware and software for patent
discussions - they are two aspects of one underlying concept, that of formal
automata and Turing-machine equivalent computable devices. The patent laws
should reflect this.
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What follows is a Postscript file for the diagram referred to in the above
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gs
n
406.441 424 M
406.680 423.762 L
406.922 423.520 L
407.160 423.520 L
407.398 423.762 L
407.641 424 L
407.641 424.238 L
404.762 430.238 L
404.520 430.480 L
404.281 430.719 L
404.039 430.719 L
403.801 430.480 L
403.559 430.238 L
403.559 430 L
cp
f
gr
gs
n
324.602 468.879 M
324.359 468.879 L
324.121 469.121 L
323.879 469.121 L
323.641 468.879 L
323.398 468.641 L
323.398 468.398 L
323.641 468.160 L
326.762 462.641 L
327 462.398 L
327.238 462.398 L
327.480 462.641 L
327.719 462.879 L
327.719 463.121 L
327.719 463.359 L
cp
f
gr
gs
n
324.602 468.160 M
324.602 468.398 L
324.602 468.641 L
324.359 468.879 L
324.121 469.121 L
323.879 469.121 L
323.641 468.879 L
320.520 463.359 L
320.281 463.121 L
320.281 462.879 L
320.520 462.641 L
320.762 462.398 L
321 462.398 L
321.238 462.641 L
321.480 462.641 L
cp
f
gr
n
164.039 501.762 M
241.801 501.762 L
s
241.801 501.762 M
241.801 467.922 L
s
241.801 467.922 M
164.039 467.922 L
s
164.039 467.922 M
164.039 501.762 L
s
190.922 476.801 M
4.078 4.563 4.559 3.121 5.277 a
(Prover)h
185.398 487.840 M
4.078 3.121 4.559 4.082 4.797 5.523 a
(Theorem)h
n
202.680 424 M
202.680 467.922 L
s
202.680 467.922 M
205.320 462.398 L
s
202.680 467.922 M
200.039 462.879 L
s
59.160 501.762 M
136.441 501.762 L
s
136.441 501.762 M
136.441 468.398 L
s
136.441 468.398 M
59.160 468.398 L
s
59.160 468.398 M
59.160 501.762 L
s
69.480 487.840 M
4.078 2.641 3.840 4.320 4.801 5.277 2.402 4.078 4.563 2.637 4.320
6.961 a
(Naive Physics)h
66.840 476.801 M
2.641 4.801 4.559 5.520 2.402 4.078 2.641 4.320 4.078 2.641 4.801
4.082 3.117 5.281 a
(Predicate Logic)h
n
97.801 424.238 M
97.801 468.398 L
s
97.801 468.398 M
100.680 462.879 L
s
97.801 468.398 M
95.160 462.879 L
s
164.039 485.199 M
136.441 485.199 L
s
136.441 485.199 M
141.961 487.840 L
s
136.441 485.199 M
141.961 482.320 L
s
147.480 587.441 M
329.641 587.441 L
s
329.641 587.441 M
329.641 545.922 L
s
329.641 545.922 M
147.480 545.922 L
s
147.480 545.922 M
147.480 587.441 L
s
14.953 /Times-Roman SF
183.480 563.441 M
7.438 4.082 4.078 4.801 7.199 7.199 4.082 10.320 3.598 3.602 8.398
10.563 10.320 10.559 a
(VHDL Algorithm)h
n
202.680 501.762 M
202.680 545.922 L
s
202.680 545.922 M
205.559 540.398 L
s
202.680 545.922 M
200.039 540.398 L
s
gs
301.320 501.762 M
301.559 501.520 L
301.801 501.281 L
302.039 501.281 L
302.281 501.520 L
302.520 501.762 L
302.520 502 L
302.520 546.160 L
302.281 546.398 L
302.039 546.641 L
301.801 546.641 L
301.559 546.398 L
301.320 546.160 L
301.320 545.922 L
cp
f
gr
gs
302.520 545.922 M
302.520 546.160 L
302.281 546.398 L
302.039 546.641 L
301.801 546.641 L
301.559 546.398 L
301.320 546.160 L
298.680 540.641 L
298.680 540.398 L
298.922 540.160 L
299.160 539.922 L
299.398 539.922 L
299.641 540.160 L
299.879 540.398 L
cp
f
gr
gs
302.520 546.398 M
302.281 546.398 L
302.039 546.641 L
301.801 546.641 L
301.559 546.398 L
301.320 546.160 L
301.320 545.922 L
301.559 545.680 L
304.441 540.160 L
304.680 539.922 L
304.922 539.922 L
305.160 540.160 L
305.398 540.398 L
305.398 540.641 L
305.398 540.879 L
cp
f
gr
164.039 502 M
130.680 531.520 L
s
130.680 531.520 M
130.680 687.039 L
s
130.680 687.039 M
135 681.281 L
s
130.680 687.039 M
126.840 681.520 L
s
37.078 651.039 M
108.840 651.039 L
s
108.840 651.039 M
108.840 617.922 L
s
108.840 617.922 M
37.078 617.922 L
s
37.078 617.922 M
37.078 651.039 L
s
12.570 /Times-Roman SF
209.160 632.559 M
6.238 3.359 5.520 3.363 4.797 6.242 5.520 4.078 7.441 a
(Translator)h
gs
n
239.398 617.922 M
239.398 618.160 L
239.160 618.398 L
238.922 618.641 L
238.680 618.641 L
238.441 618.398 L
238.199 618.160 L
238.199 587.680 L
238.199 587.441 L
238.441 587.199 L
238.680 586.961 L
238.922 586.961 L
239.160 587.199 L
239.398 587.441 L
cp
f
gr
gs
n
239.398 617.922 M
239.398 618.160 L
239.160 618.398 L
238.922 618.641 L
238.680 618.641 L
238.441 618.398 L
238.199 618.160 L
235.559 612.641 L
235.559 612.398 L
235.801 612.160 L
236.039 611.922 L
236.281 611.922 L
236.520 612.160 L
236.762 612.398 L
cp
f
gr
gs
n
239.398 618.398 M
239.160 618.398 L
238.922 618.641 L
238.680 618.641 L
238.441 618.398 L
238.199 618.160 L
238.199 617.922 L
238.441 617.680 L
241.320 612.160 L
241.559 611.922 L
241.801 611.922 L
242.039 612.160 L
242.281 612.398 L
242.281 612.641 L
242.281 612.879 L
cp
f
gr
55.078 632.320 M
8.160 4.078 6.961 6.723 a
(SPICE)h
n
108.840 617.922 M
147.480 579.281 L
s
108.840 617.922 M
108.840 612.398 L
s
108.840 617.922 M
114.359 617.922 L
s
75.719 501.762 M
75.719 617.922 L
s
75.719 617.922 M
73.078 612.398 L
s
75.719 617.922 M
78.602 612.398 L
s
360.121 651.039 M
420.840 651.039 L
s
420.840 651.039 M
420.840 617.922 L
s
420.840 617.922 M
360.121 617.922 L
s
360.121 617.922 M
360.121 651.039 L
s
364.199 636.641 M
8.879 8.879 3.359 7.441 7.441 8.879 a
(DLL/DDE)h
n
329.641 587.441 M
360.121 617.922 L
s
393.238 651.039 M
393.238 687.039 L
s
393.238 687.039 M
390.359 681.520 L
s
393.238 687.039 M
395.879 681.520 L
s
360.121 617.922 M
360.121 612.398 L
s
360.121 617.922 M
354.602 617.922 L
s
37.078 640 M
36.840 640.480 L
36.602 640.719 L
36.359 640.961 L
36.121 641.199 L
35.641 641.441 L
35.398 641.680 L
35.160 641.922 L
34.922 642.160 L
34.680 642.398 L
34.441 642.641 L
34.199 642.641 L
33.961 642.879 L
33.719 643.121 L
33.480 643.359 L
33.238 643.602 L
33 643.840 L
32.520 644.078 L
32.281 644.320 L
32.039 644.559 L
31.801 645.039 L
31.559 645.281 L
31.320 645.762 L
31.078 646.238 L
30.602 646.719 L
30.359 647.441 L
30.121 647.922 L
29.879 648.641 L
29.398 649.359 L
28.922 651.039 L
28.441 652.238 L
28.441 653.199 L
28.199 654.398 L
27.961 655.121 L
27.719 656.078 L
27.719 657.039 L
27.480 657.762 L
27.238 658.480 L
27.238 659.199 L
27.238 659.922 L
27 660.641 L
27 661.359 L
27 662.078 L
26.762 662.801 L
26.762 663.520 L
26.762 664.238 L
26.762 664.961 L
26.762 665.680 L
26.520 666.641 L
26.520 667.359 L
26.520 668.320 L
26.520 669.281 L
26.520 670.238 L
26.520 671.199 L
26.281 672.160 L
26.281 673.359 L
26.281 674.559 L
26.281 676 L
26.039 678.879 L
26.039 680.320 L
26.039 681.762 L
25.801 683.199 L
25.801 684.398 L
25.801 685.602 L
25.801 686.801 L
25.559 687.762 L
25.559 688.719 L
25.559 689.680 L
25.559 690.641 L
25.559 691.602 L
25.559 692.320 L
25.559 693.281 L
25.320 694 L
25.320 694.961 L
25.320 695.680 L
25.320 696.398 L
25.320 697.359 L
25.320 698.078 L
25.320 698.801 L
25.559 699.762 L
25.559 700.480 L
25.559 701.441 L
25.559 702.398 L
25.559 703.359 L
25.801 704.559 L
25.801 705.520 L
25.801 706.719 L
26.039 709.359 L
26.281 710.320 L
26.281 711.520 L
26.520 712.238 L
26.762 713.199 L
27 713.922 L
27 714.641 L
27.238 715.359 L
27.238 716.078 L
27.480 716.559 L
27.719 717.039 L
27.719 717.520 L
27.961 718 L
28.199 718.238 L
28.199 718.719 L
28.441 718.961 L
28.441 719.441 L
28.680 719.680 L
28.922 719.922 L
29.160 720.398 L
29.160 720.641 L
29.398 721.121 L
29.641 721.359 L
29.879 721.840 L
30.121 722.320 L
30.359 722.801 L
30.602 723.281 L
30.840 723.762 L
31.078 724.480 L
31.559 725.922 L
31.801 726.641 L
32.039 727.121 L
32.281 727.840 L
32.520 728.320 L
32.762 728.801 L
33 729.281 L
33.238 729.762 L
33.480 730.238 L
33.719 730.719 L
33.961 730.961 L
33.961 731.441 L
34.199 731.680 L
34.441 732.160 L
34.680 732.398 L
34.680 732.641 L
34.922 732.879 L
35.160 733.121 L
35.160 733.359 L
35.398 733.840 L
35.398 734.078 L
35.641 734.320 L
35.879 734.559 L
35.879 734.801 L
36.121 735.039 L
36.359 735.281 L
36.359 735.520 L
36.602 736 L
36.840 736.238 L
37.078 736.961 L
s
37.078 736.961 M
31.559 734.078 L
s
37.320 736.719 M
38.281 730.961 L
s
9.977 /Times-Roman SF
403.559 574 M
3.121 4.320 6.961 4.801 3.117 4.320 6.723 a
(Hardware)h
405 563.199 M
3.121 4.320 6.961 2.641 2.879 4.559 5.281 a
(Software)h
410.520 552.160 M
4.801 4.078 2.641 4.320 5.281 a
(Patent)h
n
453.480 564.879 M
453.480 564.398 453.480 564.398 453.480 564.879 c
453.480 581.441 440.039 594.879 423.480 594.879 c
406.922 594.879 393.719 581.441 393.719 564.879 c
393.719 548.320 406.922 534.879 423.480 534.879 c
440.039 534.879 453.238 548.320 453.480 564.879 c
s
328.441 501.762 M
401.879 544 L
s
401.879 544.238 M
400.922 541.121 L
s
401.641 544 M
398.762 544.238 L
s
gs
153 688 M
152.762 688 L
152.520 687.762 L
152.281 687.520 L
152.281 687.281 L
152.520 687.039 L
152.762 686.801 L
237.719 650.559 L
237.961 650.559 L
238.199 650.801 L
238.441 651.039 L
238.441 651.281 L
238.199 651.520 L
237.961 651.762 L
cp
f
gr
gs
152.762 687.762 M
152.520 687.520 L
152.281 687.281 L
152.281 687.039 L
152.520 686.801 L
152.762 686.559 L
153 686.559 L
160.441 687.520 L
160.680 687.762 L
160.922 688 L
160.922 688.238 L
160.680 688.480 L
160.441 688.719 L
160.199 688.719 L
cp
f
gr
gs
153.480 687.520 M
153.238 687.520 L
153 687.762 L
152.762 687.762 L
152.520 687.520 L
152.281 687.281 L
152.281 687.039 L
152.520 686.801 L
157.078 681.281 L
157.320 681.039 L
157.559 681.039 L
157.801 681.281 L
158.039 681.520 L
158.039 681.762 L
158.039 682 L
cp
f
gr
gs
237 650.801 M
237.238 650.559 L
237.480 650.559 L
237.719 650.801 L
237.961 651.039 L
237.961 651.281 L
237.961 651.520 L
234.602 658 L
234.359 658 L
234.121 658.238 L
233.879 658.238 L
233.641 658 L
233.398 657.762 L
233.398 657.520 L
233.641 657.281 L
cp
f
gr
gs
237 650.559 M
237.238 650.559 L
237.480 650.801 L
237.719 651.039 L
237.719 651.281 L
237.480 651.520 L
237.238 651.762 L
227.398 653.441 L
227.160 653.441 L
226.922 653.199 L
226.680 652.961 L
226.680 652.719 L
226.922 652.480 L
227.160 652.238 L
cp
f
gr
12.570 /Times-Roman SF
365.398 623.199 M
8.879 6.719 3.121 3.121 3.121 a
( SOM)h
n
21.238 669.520 M
21.238 668.320 L
25.078 667.121 L
28.680 667.121 L
32.520 668.320 L
34.922 670.480 L
41.160 671.680 L
45.961 672.879 L
47.160 673.840 L
52.199 675.039 L
54.602 675.039 L
58.441 676.238 L
59.641 675.039 L
60.840 673.840 L
64.441 670.480 L
69.480 669.520 L
71.879 669.520 L
75.719 669.520 L
76.922 669.520 L
80.520 669.520 L
81.719 667.121 L
82.922 666.160 L
85.559 662.559 L
86.762 662.559 L
91.559 662.559 L
99 664.961 L
102.840 666.160 L
108.840 667.121 L
112.680 668.320 L
118.680 669.520 L
122.520 669.520 L
122.520 668.320 L
123.719 667.121 L
124.922 667.121 L
127.320 667.121 L
134.762 667.121 L
138.602 668.320 L
146.039 669.520 L
147.238 669.520 L
148.441 668.320 L
149.641 664.961 L
150.840 663.762 L
152.039 663.762 L
153.238 666.160 L
158.281 668.320 L
160.680 668.320 L
163.320 668.320 L
170.520 668.320 L
171.961 668.320 L
173.160 668.320 L
175.559 668.320 L
180.602 669.520 L
190.441 670.480 L
192.840 671.680 L
195.238 671.680 L
196.441 670.480 L
197.641 669.520 L
200.281 669.520 L
202.680 669.520 L
210.121 668.320 L
216.359 667.121 L
217.559 667.121 L
219.961 666.160 L
222.359 664.961 L
225 662.559 L
229.801 661.602 L
232.199 661.602 L
238.441 663.762 L
242.281 666.160 L
248.281 668.320 L
253.320 668.320 L
254.520 668.320 L
256.922 664.961 L
259.559 661.602 L
260.762 661.602 L
265.559 661.602 L
270.602 663.762 L
278.039 666.160 L
280.441 667.121 L
281.641 667.121 L
282.840 664.961 L
287.879 663.762 L
290.281 663.762 L
298.922 666.160 L
307.559 667.121 L
309.961 667.121 L
315 667.121 L
317.398 664.961 L
319.801 664.961 L
328.441 664.961 L
340.922 664.961 L
349.559 668.320 L
351.961 669.520 L
353.160 669.520 L
354.359 668.320 L
355.801 667.121 L
359.398 664.961 L
366.840 664.961 L
370.441 666.160 L
377.879 670.480 L
381.719 670.480 L
386.520 670.480 L
392.762 667.121 L
395.160 666.160 L
397.559 664.961 L
400.199 663.762 L
417.480 660.398 L
427.320 660.398 L
430.922 660.398 L
433.320 661.602 L
434.762 662.559 L
437.160 663.762 L
440.762 663.762 L
443.398 663.762 L
449.398 663.762 L
452.039 663.762 L
461.879 663.762 L
466.680 664.961 L
467.879 664.961 L
469.320 664.961 L
472.922 663.762 L
475.320 662.559 L
480.359 661.602 L
482.762 661.602 L
490.199 666.160 L
498.840 669.520 L
502.441 670.480 L
503.879 670.480 L
505.078 670.480 L
505.078 669.520 L
506.281 667.121 L
508.680 667.121 L
516.121 666.160 L
520.922 667.121 L
529.559 672.879 L
532.199 672.879 L
533.398 672.879 L
535.801 669.520 L
538.199 666.160 L
542.039 663.762 L
545.641 663.762 L
548.281 666.160 L
555.480 669.520 L
556.922 669.520 L
559.320 669.520 L
561.719 668.320 L
562.922 668.320 L
569.160 668.320 L
576.602 668.320 L
577.801 668.320 L
576.602 668.320 L
575.398 668.320 L
574.199 668.320 L
574.199 669.520 L
s
gs
26.281 454 597 440.320 box
clip n
26.281 448.238 M
27.480 447.281 L
31.078 444.879 L
37.320 441.520 L
42.359 440.559 L
43.559 440.559 L
47.160 443.922 L
51 446.078 L
55.801 450.641 L
59.641 451.840 L
60.840 451.840 L
64.441 451.840 L
68.281 449.441 L
74.281 446.078 L
78.121 443.922 L
80.520 443.922 L
84.121 444.879 L
89.160 447.281 L
91.559 448.238 L
96.602 448.238 L
99 447.281 L
105.238 446.078 L
111.480 444.879 L
116.281 444.879 L
121.320 444.879 L
122.520 444.879 L
123.719 444.879 L
127.320 443.922 L
131.160 442.719 L
135.961 442.719 L
138.602 443.922 L
143.398 448.238 L
149.641 449.441 L
150.840 449.441 L
154.680 448.238 L
157.078 446.078 L
159.480 444.879 L
165.719 444.879 L
169.320 444.879 L
179.160 444.879 L
184.199 446.078 L
191.641 446.078 L
195.238 443.922 L
196.441 442.719 L
199.078 441.520 L
201.480 441.520 L
208.922 446.078 L
214.922 449.441 L
217.559 449.441 L
223.559 450.641 L
228.602 450.641 L
236.039 448.238 L
237.238 447.281 L
238.441 447.281 L
245.879 447.281 L
253.320 447.281 L
255.719 448.238 L
258.121 448.238 L
259.559 448.238 L
261.961 448.238 L
265.559 448.238 L
271.801 446.078 L
281.641 443.922 L
286.680 443.922 L
294.121 444.879 L
295.320 447.281 L
296.520 449.441 L
297.719 449.441 L
298.922 449.441 L
300.121 449.441 L
301.320 448.238 L
311.160 448.238 L
316.199 448.238 L
321.238 448.238 L
323.641 447.281 L
323.641 446.078 L
326.039 444.879 L
331.078 446.078 L
334.680 447.281 L
344.520 447.281 L
348.359 447.281 L
350.762 447.281 L
351.961 447.281 L
353.160 447.281 L
354.359 447.281 L
357 446.078 L
365.641 446.078 L
377.879 448.238 L
387.719 451.840 L
393.961 451.840 L
396.359 451.840 L
399 450.641 L
400.199 450.641 L
401.398 449.441 L
417.480 449.441 L
429.719 449.441 L
438.359 450.641 L
440.762 451.840 L
441.961 451.840 L
447 447.281 L
449.398 444.879 L
454.441 443.922 L
458.039 448.238 L
459.238 451.840 L
466.680 454 L
469.320 454 L
474.121 452.801 L
479.160 449.441 L
480.359 448.238 L
487.801 447.281 L
517.320 446.078 L
529.559 446.078 L
537 447.281 L
539.641 447.281 L
543.238 447.281 L
549.480 441.520 L
551.879 440.559 L
554.281 440.559 L
555.480 443.922 L
559.320 450.641 L
565.559 452.801 L
567.961 452.801 L
569.160 452.801 L
570.359 451.840 L
576.602 449.441 L
580.199 449.441 L
585.238 449.441 L
587.641 449.441 L
588.840 448.238 L
591.480 444.879 L
592.680 446.078 L
595.078 447.281 L
602.520 448.238 L
603.719 448.238 L
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%%Trailer
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John Williams
is an argument to apply copyright laws to hardware, rather than patent laws
to software. Think about it.
John WIlliams
Joe Buck
> PATENT EQUIVALENCE OF SOFTWARE AND HARDWARE
> Comments for the upcoming hearing
> [ see the parent article ]
My view only, not that of Synopsys management, who may agree or disagree.
While your article demonstrates that a legal distinction between hardware
and software may become increasingly problematic, it still seems that you
aren't making a distinction between the ideal hardware that is represented
exactly by a VHDL description and actual, physical hardware. It would be
wonderful if the two really were the same, it would certainly make the job
of the EDA industry far simpler. They aren't the same, or the testing
problem would go away. Software is mathematically ideal; hardware isn't,
even if produced by HDL synthesis. Just the same, that isn't the most
important point. I'm not interested in a legal debate in any case.
The primary issue with software patents is their potential to bring the
software industry to a screeching halt -- that is, an economic issue, not
a legal one. The primary question is whether the existing state of the
law, together with the existing practices of the USPTO, are fulfilling the
mandate implied by the US Constitution, in which Congress is given power
to grant for limited times monopolies to inventors as a mechanism to cause
progress in science and useful arts. A patent is not a fundamental human
right. Patents were originally a mechanism for kings to award their
cronies with licenses to print money, and they should be problematic to
anyone who believes in the free market or in limited government. Patents
are justified only if their existence leads to a greater good for society
as a whole.
In the drug industry, it seems clear to me that patents are a benefit.
The drug manufacturer must pay for years of expensive research and tests
to win approval for the drug: without a patent, no one would put up
capital for this expensive process.
In the chip production industry, patents have been around long enough so
that the patents on fundamental structures have long since expired;
for those that remain, patent licensing fees tend to be a fraction of
manufacturing cost in many cases. Manufacturers can generally live with
this.
In the software industry, on the other hand, the problem is not a shortage
of new ideas: we have new ideas by the ton. The expense of software
development is in the engineering: combining thousands of ideas, each
potentially patentable with the current USPTO, to produce a well-designed
product. Also, since up until 1985 or so very few software patents were
applied for and the USPTO seems unable to understand "prior art" in this
field, patents are being granted for very fundamental structures even now.
If only pre-existing patents and papers in journals are looked at, then
inventions too trivial to be worth a paper (e.g. using exclusive-OR to
implement a cursor on a visual display) may be awarded years after their
original invention to the first party with the chutzpah to file a patent.
There are substantial economic differences between software and hardware
production: manufacturing cost, for one. If every new idea has a patent
on it, free software is dead or contraband (there go all those CAD
companies who got their start by commercializing university software,
since the university software isn't going to be any good if universities
can't afford to license the needed patents), and small software companies
are dead (you can't compete without a large portfolio of patents to
cross-license, and you still have to pay off the patent litigation
companies). Even IBM, the company with the most software patents, has
stated they believe the main benefit of their patent portfolio is that it
gives them leverage to license the patents of other companies.
I suspect that many in the CAD industry think of themselves as very
inventive, and think that they can win by getting lots of juicy patents.
But the big winners in the patent area tend to be those overly broad
patents for old ideas that everyone has to infringe: things any
undergraduate student comes up with on his own, like using Quicksort
on linked lists (this is patented). Worst case is if you're up against a
company that does not, or no longer, produces software.
Perhaps you can come up with a different criterion to clean up the
software patent problem, since as you point out, "no patents on software"
will become increasingly fuzzy. Or do you deny that there's a problem?
--
-- Joe Buck jb...@synopsys.com
Posting from but not speaking for Synopsys, Inc.
Formerly jbuck@<various-hosts>.eecs.berkeley.edu
John Lazzaro
Joe Buck <jb...@synopsys.com> wrote:
>
>While your article demonstrates that a legal distinction between hardware
Another distinction, also problematic for CAD, is the distinction
between mathematics and algorithms. Does IBM get royalties off of
simulated annealing? Should they? Should Harvard get royalties on all
uses of backpropagation learning (Werbos has priority from 74 on the
basic formulation)? Both of these algorithms are in their essence
mathematical derivations of optimality, owing more to statistical
physics (SA) or differential equation theory (Backprop) than to what
you find in Sedgewick or Knuth ...
John Williams
of having a bigger slice of the pie, as long as the pie doesn't shrink too
quickly. Of course, there's always paranoia, the existential buckle in the
catastrophe curve. The US has been traditionally savvy in playing the
prisoner's dilemma in the software industry. One can only hope that the
fear of losing hardware patents due to the above argument will forestall
the feeding frenzy.
John Williams