> How does one create equalients to the 74xxx chips in Xilinx ISE such that
> it later appears to be an atomic unit. Just like any other gate ..?
The Quartus schematic editor has such symbols
built-in. ISE probable does too.
But consider learning an HDL to describe
exactly what *your* design should do without
any 74xxx abstraction layer.
-- Mike Treseler
I'm working on a translation tool. Thus the need for this.
When constructing new I would ofcourse use hdl.
Btw, this is for the schematic entry (.sch).
[ ... ]
> The Quartus schematic editor has such symbols
> built-in. ISE probable does too.
> But consider learning an HDL to describe
> exactly what *your* design should do without
> any 74xxx abstraction layer.
I believe the correct term for that would be a
"distraction layer."
--
Later,
Jerry.
The universe is a figment of its own imagination.
> I believe the correct term for that would be a
> "distraction layer."
Well said.
TTL has at least a 30 year head start.
Simulation using the
synchronous process/always block
is having a difficult time catching up.
For the algorithmic, it's not exactly C.
For the solder sect, it's not exactly 7400.
-- Mike Treseler
[ ... ]
> For the algorithmic, it's not exactly C.
> For the solder sect, it's not exactly 7400.
Or, as the old saying goes, it's neither fish nor fowl.
If you'll forgive more word play, "neither fish nor
foul" might be more questionable.
check this site.
http://www.freemodelfoundry.com/fmf_models.html