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Tool: Generate doc/graphics from vhdl text

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Michiel Huiskes

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Jul 2, 1999, 3:00:00 AM7/2/99
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Hi,

I'm looking for a tool which will read in my vhdl sources and convert
them into documentation. This may be either html or another standard.
I'd love to see it generate graphic representations of FSM's. Does such
a tool exist? Is it any good? Any experiences?

Cheers,

Michiel

Renaud Pacalet

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Jul 2, 1999, 3:00:00 AM7/2/99
to
Michiel Huiskes wrote:
>
> Hi,
>
> I'm looking for a tool which will read in my vhdl sources and convert
> them into documentation. This may be either html or another standard.

http://rassp.scra.org/ is a good start point. You'll find there a
vhdl2html converter.

> I'd love to see it generate graphic representations of FSM's.

I'd love too. But I'd prefer a mind reader that writes the VHDL
for me (bug free if possible). So, I could concentrate on my nice
bubble diagrams ;-)

> Does such
> a tool exist? Is it any good? Any experiences?

I'm afraid this kind of tool would be very very difficult to design.
And not so useful (graphic representations of FSM are unreadable
when you reach 50-100 states). But people are so fond of graphical
interfaces that it could exist somewhere after all.

Regards,
--
Renaud Pacalet, ENST / COMELEC, 46 rue Barrault 75634 Paris Cedex 13
Tel. : 01 45 81 78 08 | Fax : 01 45 80 40 36 | Mel : pac...@enst.fr

RoLm

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Jul 2, 1999, 3:00:00 AM7/2/99
to
In article <377CCBA...@natlab.research.philips.com>,

Michiel Huiskes <mhui...@natlab.research.philips.com> wrote:
> Hi,
>
> I'm looking for a tool which will read in my vhdl sources and convert
> them into documentation. This may be either html or another standard.
> I'd love to see it generate graphic representations of FSM's. Does

> such a tool exist? Is it any good? Any experiences?

you might be interested in Mentor Graphics' Renoir (www.renoir.com).
the tools primary features are:

- let's you draw block diagrams, flow charts, truth tables, and state
diagrams and generates the corresponding vhdl/verilog

- reads in vhdl/verilog and generates the corresponding block diagram,
flow chart, or state diagram.

i've been using Renoir for about three years now and it's only gotten
better with time. the latest versions include interfaces to simulation
and synthesis tools. one of the coolest features is the ModelSim
interface (i beleive it works with others as well) that lets you observe
your FSM while the code executes. makes finding unreached states, etc.
a breeze.

For documentation purposes, the most recent Win32 version of Renoir
allows you to embed any graphical item into a Word document just like a
spreadsheet or other object.

licensing is an issue but not a big one. for instance, you can have one
license that you use to create and modify designs. if someone else
would like to view the design database, they simply need a trial version
of the tool which can read the data. if i recall correctly the demo is
fairly capable with only the "generate hdl" function stripped.

the only draw back is viewing a large diagram. in the tool you can zoom
in but on paper it will be almost illegible unless you print it to a
very large sheet of paper or multiple sheets and tape them together.

i have heard of similar tools but have not tried them. two others are
Aldec's Active VHDL (www.aldec.com) and Visual Software Solution's
StateCAD (www.statecad.com).

Ciao,

RoLm

Sent via Deja.com http://www.deja.com/
Share what you know. Learn what you don't.

John Janusson

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Jul 2, 1999, 3:00:00 AM7/2/99
to
You can use Renoir from Mentor Graphics. It's touted as a design entry
tool, but it does a pretty good job of converting HDL to Graphics. It'll do
state machines, truth tables, flow diagrams, the whole deal. It doesn't
really generate a standard document (that I could find, anyways), but you
can cut and paste. You can download a free trial from
http://www.mentor.com/renoir/index.htm.

JJ

Renaud Pacalet wrote in message <377CED2B...@enst.fr>...


>Michiel Huiskes wrote:
>>
>> Hi,
>>
>> I'm looking for a tool which will read in my vhdl sources and convert
>> them into documentation. This may be either html or another standard.
>

>http://rassp.scra.org/ is a good start point. You'll find there a
>vhdl2html converter.
>

>> I'd love to see it generate graphic representations of FSM's.
>

>I'd love too. But I'd prefer a mind reader that writes the VHDL
>for me (bug free if possible). So, I could concentrate on my nice
>bubble diagrams ;-)
>

>> Does such
>> a tool exist? Is it any good? Any experiences?
>

Stuart Clubb

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Jul 3, 1999, 3:00:00 AM7/3/99
to
Renoir, from Mentor Graphics.

Lots of fun. Block Diagrams, State machines, and Flow charts.

Machine generated schematics are never fantastic, but as long as your
FSM does not have too many states as to fill the page with hundreds of
bubbles and transition, you may be OK. Renoir users can draw
hierarchical FSMs so documentation can be clean even for very complex
machines. Being an OLE capable application means that you can pull
graphics right out of Renoir and into a Word Document. :-)

Of course ideally you would have done your design using Renoir.....

Cheers
Stuart
An employee of Saros Technology:
Model Technology, Exemplar Logic, TransEDA, Renoir.
www.saros.co.uk

Stuart Clubb

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Jul 3, 1999, 3:00:00 AM7/3/99
to
On Fri, 02 Jul 1999 18:47:39 +0200, Renaud Pacalet <pac...@enst.fr>
wrote:

>> I'd love to see it generate graphic representations of FSM's.
>
>I'd love too. But I'd prefer a mind reader that writes the VHDL
>for me (bug free if possible). So, I could concentrate on my nice
>bubble diagrams ;-)

No mind reader, but if you want to draw bubble diagrams: Renoir.

>I'm afraid this kind of tool would be very very difficult to design.
>And not so useful (graphic representations of FSM are unreadable
>when you reach 50-100 states). But people are so fond of graphical
>interfaces that it could exist somewhere after all.

Not with hierarchical states.

Try Renoir, you might just like it :-)

ming

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Jul 5, 1999, 3:00:00 AM7/5/99
to

Michiel Huiskes wrote:
>Hi,
>
>I'm looking for a tool which will read in my vhdl sources and convert
>them into documentation. This may be either html or another standard.

>I'd love to see it generate graphic representations of FSM's. Does such


>a tool exist? Is it any good? Any experiences?

You can try Novas's product - Debussy
(http://www.novas.com/products/index.htm). It can do nice transfer from
HDL text to graphic. It has schematic view (nSchema) and automaticlly FSM
extractor (nState).

>
>Cheers,
>
>Michiel

Ilia Oussorov

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Jul 5, 1999, 3:00:00 AM7/5/99
to Michiel Huiskes
Try www.summit-design.com
Visual HDL can convert VHDL to graphic realy fine.
Best regards.

Michiel Huiskes wrote:

> Hi,
>
> I'm looking for a tool which will read in my vhdl sources and convert
> them into documentation. This may be either html or another standard.
> I'd love to see it generate graphic representations of FSM's. Does such
> a tool exist? Is it any good? Any experiences?
>

> Cheers,
>
> Michiel


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