diff -Naur bcm2835-1.52/src/bcm2835.c bcm2835-1.53/src/bcm2835.c
--- bcm2835-1.52/src/bcm2835.c 2017-02-05 03:08:08.000000000 +0100
+++ bcm2835-1.53/src/bcm2835.c 2018-01-14 17:48:02.116579077 +0100
@@ -55,6 +55,8 @@
volatile uint32_t *bcm2835_bsc0 = (uint32_t *)MAP_FAILED;
volatile uint32_t *bcm2835_bsc1 = (uint32_t *)MAP_FAILED;
volatile uint32_t *bcm2835_st = (uint32_t *)MAP_FAILED;
+volatile uint32_t *bcm2835_aux = (uint32_t *)MAP_FAILED;
+volatile uint32_t *bcm2835_spi1 = (uint32_t *)MAP_FAILED;
/* This variable allows us to test on hardware other than RPi.
@@ -92,6 +94,11 @@
return (uint32_t *)bcm2835_bsc0;
case BCM2835_REGBASE_BSC1:
return (uint32_t *)bcm2835_st;
+ case BCM2835_REGBASE_AUX:
+ return (uint32_t *)bcm2835_aux;
+ case BCM2835_REGBASE_SPI1:
+ return (uint32_t *)bcm2835_spi1;
+
}
return (uint32_t *)MAP_FAILED;
}
@@ -114,8 +121,8 @@
uint32_t ret;
if (debug)
{
- printf("bcm2835_peri_read paddr %08X\n", (unsigned) paddr);
- return 0;
+ printf("bcm2835_peri_read paddr %p\n", (void *) paddr);
+ return 0;
}
else
{
@@ -136,7 +143,7 @@
{
if (debug)
{
- printf("bcm2835_peri_read_nb paddr %08X\n", (unsigned) paddr);
+ printf("bcm2835_peri_read_nb paddr %p\n", paddr);
return 0;
}
else
@@ -152,7 +159,7 @@
{
if (debug)
{
- printf("bcm2835_peri_write paddr %08X, value %08X\n", (unsigned) paddr, value);
+ printf("bcm2835_peri_write paddr %p, value %08X\n", paddr, value);
}
else
{
@@ -167,8 +174,8 @@
{
if (debug)
{
- printf("bcm2835_peri_write_nb paddr %08X, value %08X\n",
- (unsigned) paddr, value);
+ printf("bcm2835_peri_write_nb paddr %p, value %08X\n",
+ paddr, value);
}
else
{
@@ -447,7 +454,7 @@
if (debug)
{
/* Cant access sytem timers in debug mode */
- printf("bcm2835_delayMicroseconds %lld\n", micros);
+ printf("bcm2835_delayMicroseconds %lld\n", (long long int) micros);
return;
}
@@ -670,7 +677,7 @@
}
/* Writes an number of bytes to SPI */
-void bcm2835_spi_writenb(char* tbuf, uint32_t len)
+void bcm2835_spi_writenb(const char* tbuf, uint32_t len)
{
volatile uint32_t* paddr = bcm2835_spi0 + BCM2835_SPI0_CS/4;
volatile uint32_t* fifo = bcm2835_spi0 + BCM2835_SPI0_FIFO/4;
@@ -735,6 +742,269 @@
bcm2835_peri_set_bits(paddr, active << shift, 1 << shift);
}
+void bcm2835_spi_write(uint16_t data) {
+#if 0
+ char buf[2];
+
+ buf[0] = data >> 8;
+ buf[1] = data & 0xFF;
+
+ bcm2835_spi_transfern(buf, 2);
+#else
+ volatile uint32_t* paddr = bcm2835_spi0 + BCM2835_SPI0_CS/4;
+ volatile uint32_t* fifo = bcm2835_spi0 + BCM2835_SPI0_FIFO/4;
+
+ /* Clear TX and RX fifos */
+ bcm2835_peri_set_bits(paddr, BCM2835_SPI0_CS_CLEAR, BCM2835_SPI0_CS_CLEAR);
+
+ /* Set TA = 1 */
+ bcm2835_peri_set_bits(paddr, BCM2835_SPI0_CS_TA, BCM2835_SPI0_CS_TA);
+
+ /* Maybe wait for TXD */
+ while (!(bcm2835_peri_read(paddr) & BCM2835_SPI0_CS_TXD))
+ ;
+
+ /* Write to FIFO */
+ bcm2835_peri_write_nb(fifo, (uint32_t) data >> 8);
+ bcm2835_peri_write_nb(fifo, data & 0xFF);
+
+
+ /* Wait for DONE to be set */
+ while (!(bcm2835_peri_read_nb(paddr) & BCM2835_SPI0_CS_DONE))
+ ;
+
+ /* Set TA = 0, and also set the barrier */
+ bcm2835_peri_set_bits(paddr, 0, BCM2835_SPI0_CS_TA);
+#endif
+}
+
+int bcm2835_aux_spi_begin(void) {
+ volatile uint32_t* enable = bcm2835_aux + BCM2835_AUX_ENABLE/4;
+ volatile uint32_t* cntl0 = bcm2835_spi1 + BCM2835_AUX_SPI_CNTL0/4;
+ volatile uint32_t* cntl1 = bcm2835_spi1 + BCM2835_AUX_SPI_CNTL1/4;
+
+ if (bcm2835_spi1 == MAP_FAILED)
+ return 0; /* bcm2835_init() failed, or not root */
+
+ /* Set the SPI pins to the Alt 4 function to enable SPI1 access on them */
+ bcm2835_gpio_fsel(RPI_V2_GPIO_P1_36, BCM2835_GPIO_FSEL_ALT4); /* SPI1_CE2_N */
+ bcm2835_gpio_fsel(RPI_V2_GPIO_P1_35, BCM2835_GPIO_FSEL_ALT4); /* SPI1_MISO */
+ bcm2835_gpio_fsel(RPI_V2_GPIO_P1_38, BCM2835_GPIO_FSEL_ALT4); /* SPI1_MOSI */
+ bcm2835_gpio_fsel(RPI_V2_GPIO_P1_40, BCM2835_GPIO_FSEL_ALT4); /* SPI1_SCLK */
+
+ bcm2835_aux_spi_setClockDivider(bcm2835_aux_spi_CalcClockDivider(1000000)); // Default 1MHz SPI
+
+ bcm2835_peri_write(enable, BCM2835_AUX_ENABLE_SPI0);
+ bcm2835_peri_write(cntl1, 0);
+ bcm2835_peri_write(cntl0, BCM2835_AUX_SPI_CNTL0_CLEARFIFO);
+
+ return 1; /* OK */
+}
+
+void bcm2835_aux_spi_end(void) {
+ /* Set all the SPI1 pins back to input */
+ bcm2835_gpio_fsel(RPI_V2_GPIO_P1_36, BCM2835_GPIO_FSEL_INPT); /* SPI1_CE2_N */
+ bcm2835_gpio_fsel(RPI_V2_GPIO_P1_35, BCM2835_GPIO_FSEL_INPT); /* SPI1_MISO */
+ bcm2835_gpio_fsel(RPI_V2_GPIO_P1_38, BCM2835_GPIO_FSEL_INPT); /* SPI1_MOSI */
+ bcm2835_gpio_fsel(RPI_V2_GPIO_P1_40, BCM2835_GPIO_FSEL_INPT); /* SPI1_SCLK */
+}
+
+#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
+
+uint16_t bcm2835_aux_spi_CalcClockDivider(uint32_t speed_hz) {
+ uint16_t divider;
+
+ if (speed_hz < (uint32_t) BCM2835_AUX_SPI_CLOCK_MIN) {
+ speed_hz = (uint32_t) BCM2835_AUX_SPI_CLOCK_MIN;
+ } else if (speed_hz > (uint32_t) BCM2835_AUX_SPI_CLOCK_MAX) {
+ speed_hz = (uint32_t) BCM2835_AUX_SPI_CLOCK_MAX;
+ }
+
+ divider = (uint16_t) DIV_ROUND_UP(BCM2835_CORE_CLK_HZ, 2 * speed_hz) - 1;
+
+ if (divider > (uint16_t) BCM2835_AUX_SPI_CNTL0_SPEED_MAX) {
+ return (uint16_t) BCM2835_AUX_SPI_CNTL0_SPEED_MAX;
+ }
+
+ return divider;
+}
+
+static uint32_t spi1_speed;
+
+void bcm2835_aux_spi_setClockDivider(uint16_t divider) {
+ spi1_speed = (uint32_t) divider;
+}
+
+void bcm2835_aux_spi_write(uint16_t data) {
+ volatile uint32_t* cntl0 = bcm2835_spi1 + BCM2835_AUX_SPI_CNTL0/4;
+ volatile uint32_t* cntl1 = bcm2835_spi1 + BCM2835_AUX_SPI_CNTL1/4;
+ volatile uint32_t* stat = bcm2835_spi1 + BCM2835_AUX_SPI_STAT/4;
+ volatile uint32_t* io = bcm2835_spi1 + BCM2835_AUX_SPI_IO/4;
+
+ uint32_t _cntl0 = (spi1_speed << BCM2835_AUX_SPI_CNTL0_SPEED_SHIFT);
+ _cntl0 |= BCM2835_AUX_SPI_CNTL0_CS2_N;
+ _cntl0 |= BCM2835_AUX_SPI_CNTL0_ENABLE;
+ _cntl0 |= BCM2835_AUX_SPI_CNTL0_MSBF_OUT;
+ _cntl0 |= 16; // Shift length
+
+ bcm2835_peri_write(cntl0, _cntl0);
+ bcm2835_peri_write(cntl1, BCM2835_AUX_SPI_CNTL1_MSBF_IN);
+
+ while (bcm2835_peri_read(stat) & BCM2835_AUX_SPI_STAT_TX_FULL)
+ ;
+
+ bcm2835_peri_write(io, (uint32_t) data << 16);
+}
+
+void bcm2835_aux_spi_writenb(const char *tbuf, uint32_t len) {
+ volatile uint32_t* cntl0 = bcm2835_spi1 + BCM2835_AUX_SPI_CNTL0/4;
+ volatile uint32_t* cntl1 = bcm2835_spi1 + BCM2835_AUX_SPI_CNTL1/4;
+ volatile uint32_t* stat = bcm2835_spi1 + BCM2835_AUX_SPI_STAT/4;
+ volatile uint32_t* txhold = bcm2835_spi1 + BCM2835_AUX_SPI_TXHOLD/4;
+ volatile uint32_t* io = bcm2835_spi1 + BCM2835_AUX_SPI_IO/4;
+
+ char *tx = (char *) tbuf;
+ uint32_t tx_len = len;
+ uint32_t count;
+ uint32_t data;
+ uint32_t i;
+ uint8_t byte;
+
+ uint32_t _cntl0 = (spi1_speed << BCM2835_AUX_SPI_CNTL0_SPEED_SHIFT);
+ _cntl0 |= BCM2835_AUX_SPI_CNTL0_CS2_N;
+ _cntl0 |= BCM2835_AUX_SPI_CNTL0_ENABLE;
+ _cntl0 |= BCM2835_AUX_SPI_CNTL0_MSBF_OUT;
+ _cntl0 |= BCM2835_AUX_SPI_CNTL0_VAR_WIDTH;
+
+ bcm2835_peri_write(cntl0, _cntl0);
+ bcm2835_peri_write(cntl1, BCM2835_AUX_SPI_CNTL1_MSBF_IN);
+
+ while (tx_len > 0) {
+
+ while (bcm2835_peri_read(stat) & BCM2835_AUX_SPI_STAT_TX_FULL)
+ ;
+
+ count = MIN(tx_len, 3);
+ data = 0;
+
+ for (i = 0; i < count; i++) {
+ byte = (tx != NULL) ? (uint8_t) *tx++ : (uint8_t) 0;
+ data |= byte << (8 * (2 - i));
+ }
+
+ data |= (count * 8) << 24;
+ tx_len -= count;
+
+ if (tx_len != 0) {
+ bcm2835_peri_write(txhold, data);
+ } else {
+ bcm2835_peri_write(io, data);
+ }
+
+ while (bcm2835_peri_read(stat) & BCM2835_AUX_SPI_STAT_BUSY)
+ ;
+
+ (void) bcm2835_peri_read(io);
+ }
+}
+
+void bcm2835_aux_spi_transfernb(const char *tbuf, char *rbuf, uint32_t len) {
+ volatile uint32_t* cntl0 = bcm2835_spi1 + BCM2835_AUX_SPI_CNTL0/4;
+ volatile uint32_t* cntl1 = bcm2835_spi1 + BCM2835_AUX_SPI_CNTL1/4;
+ volatile uint32_t* stat = bcm2835_spi1 + BCM2835_AUX_SPI_STAT/4;
+ volatile uint32_t* txhold = bcm2835_spi1 + BCM2835_AUX_SPI_TXHOLD/4;
+ volatile uint32_t* io = bcm2835_spi1 + BCM2835_AUX_SPI_IO/4;
+
+ char *tx = (char *)tbuf;
+ char *rx = (char *)rbuf;
+ uint32_t tx_len = len;
+ uint32_t rx_len = len;
+ uint32_t count;
+ uint32_t data;
+ uint32_t i;
+ uint8_t byte;
+
+ uint32_t _cntl0 = (spi1_speed << BCM2835_AUX_SPI_CNTL0_SPEED_SHIFT);
+ _cntl0 |= BCM2835_AUX_SPI_CNTL0_CS2_N;
+ _cntl0 |= BCM2835_AUX_SPI_CNTL0_ENABLE;
+ _cntl0 |= BCM2835_AUX_SPI_CNTL0_MSBF_OUT;
+ _cntl0 |= BCM2835_AUX_SPI_CNTL0_VAR_WIDTH;
+
+ bcm2835_peri_write(cntl0, _cntl0);
+ bcm2835_peri_write(cntl1, BCM2835_AUX_SPI_CNTL1_MSBF_IN);
+
+ while ((tx_len > 0) || (rx_len > 0)) {
+
+ while (!(bcm2835_peri_read(stat) & BCM2835_AUX_SPI_STAT_TX_FULL) && (tx_len > 0)) {
+ count = MIN(tx_len, 3);
+ data = 0;
+
+ for (i = 0; i < count; i++) {
+ byte = (tx != NULL) ? (uint8_t) *tx++ : (uint8_t) 0;
+ data |= byte << (8 * (2 - i));
+ }
+
+ data |= (count * 8) << 24;
+ tx_len -= count;
+
+ if (tx_len != 0) {
+ bcm2835_peri_write(txhold, data);
+ } else {
+ bcm2835_peri_write(io, data);
+ }
+
+ }
+
+ while (!(bcm2835_peri_read(stat) & BCM2835_AUX_SPI_STAT_RX_EMPTY) && (rx_len > 0)) {
+ count = MIN(rx_len, 3);
+ data = bcm2835_peri_read(io);
+
+ if (rbuf != NULL) {
+ switch (count) {
+ case 3:
+ *rx++ = (char)((data >> 16) & 0xFF);
+ /*@fallthrough@*/
+ /* no break */
+ case 2:
+ *rx++ = (char)((data >> 8) & 0xFF);
+ /*@fallthrough@*/
+ /* no break */
+ case 1:
+ *rx++ = (char)((data >> 0) & 0xFF);
+ }
+ }
+
+ rx_len -= count;
+ }
+
+ while (!(bcm2835_peri_read(stat) & BCM2835_AUX_SPI_STAT_BUSY) && (rx_len > 0)) {
+ count = MIN(rx_len, 3);
+ data = bcm2835_peri_read(io);
+
+ if (rbuf != NULL) {
+ switch (count) {
+ case 3:
+ *rx++ = (char)((data >> 16) & 0xFF);
+ /*@fallthrough@*/
+ /* no break */
+ case 2:
+ *rx++ = (char)((data >> 8) & 0xFF);
+ /*@fallthrough@*/
+ /* no break */
+ case 1:
+ *rx++ = (char)((data >> 0) & 0xFF);
+ }
+ }
+
+ rx_len -= count;
+ }
+ }
+}
+
+void bcm2835_aux_spi_transfern(char *buf, uint32_t len) {
+ bcm2835_aux_spi_transfernb(buf, buf, len);
+}
+
int bcm2835_i2c_begin(void)
{
uint16_t cdiv;
@@ -1328,6 +1598,9 @@
bcm2835_bsc0 = bcm2835_peripherals + BCM2835_BSC0_BASE/4;
bcm2835_bsc1 = bcm2835_peripherals + BCM2835_BSC1_BASE/4;
bcm2835_st = bcm2835_peripherals + BCM2835_ST_BASE/4;
+ bcm2835_aux = bcm2835_peripherals + BCM2835_AUX_BASE/4;
+ bcm2835_spi1 = bcm2835_peripherals + BCM2835_SPI1_BASE/4;
+
return 1; /* Success */
}
@@ -1380,7 +1653,9 @@
bcm2835_bsc0 = bcm2835_peripherals + BCM2835_BSC0_BASE/4; /* I2C */
bcm2835_bsc1 = bcm2835_peripherals + BCM2835_BSC1_BASE/4; /* I2C */
bcm2835_st = bcm2835_peripherals + BCM2835_ST_BASE/4;
-
+ bcm2835_aux = bcm2835_peripherals + BCM2835_AUX_BASE/4;
+ bcm2835_spi1 = bcm2835_peripherals + BCM2835_SPI1_BASE/4;
+
ok = 1;
}
else
@@ -1427,6 +1702,8 @@
bcm2835_bsc0 = MAP_FAILED;
bcm2835_bsc1 = MAP_FAILED;
bcm2835_st = MAP_FAILED;
+ bcm2835_aux = MAP_FAILED;
+ bcm2835_spi1 = MAP_FAILED;
return 1; /* Success */
}
@@ -1510,6 +1787,3 @@
return 0;
}
#endif
-
-
-
diff -Naur bcm2835-1.52/src/bcm2835.h bcm2835-1.53/src/bcm2835.h
--- bcm2835-1.52/src/bcm2835.h 2017-03-02 02:17:16.000000000 +0100
+++ bcm2835-1.53/src/bcm2835.h 2018-01-14 17:48:08.372677858 +0100
@@ -109,6 +109,8 @@
bcm2835_st
bcm2835_bsc0
bcm2835_bsc1
+ bcm2835_aux
+ bcm2835_spi1
\par Raspberry Pi 2 (RPI2)
@@ -163,12 +165,22 @@
- P1-24 (CE0)
- P1-26 (CE1)
- Although it is possible to select high speeds for the SPI interface, up to 125MHz (see bcm2835_spi_setClockDivider())
- you should not expect to actually achieve those sorts of speeds with the RPi wiring. Our tests on RPi 2 show that the
- SPI CLK line when unloaded has a resonant frequency of about 40MHz, and when loaded, the MOSI and MISO lines
+ Although it is possible to select high speeds for the SPI interface, up to 125MHz (see bcm2835_spi_setClockDivider())
+ you should not expect to actually achieve those sorts of speeds with the RPi wiring. Our tests on RPi 2 show that the
+ SPI CLK line when unloaded has a resonant frequency of about 40MHz, and when loaded, the MOSI and MISO lines
ring at an even lower frequency. Measurements show that SPI waveforms are very poor and unusable at 62 and 125MHz.
Dont expect any speed faster than 31MHz to work reliably.
-
+
+ The bcm2835_aux_spi_* functions allow you to control the BCM 2835 SPI1 interface,
+ allowing you to send and received data by SPI (Serial Peripheral Interface).
+
+ The Raspberry Pi GPIO pins used for AUX SPI (SPI1) are:
+
+ - P1-38 (MOSI)
+ - P1-35 (MISO)
+ - P1-40 (CLK)
+ - P1-36 (CE2)
+
\par I2C Pins
The bcm2835_i2c_* functions allow you to control the BCM 2835 BSC interface,
@@ -446,7 +458,7 @@
and bcm2835_gpio_pad() working correctly with non-0 pad groups. Reported by Guido.
\version 1.46 2015-09-18
- Added symbolic definitions for remaining pins on 40 pin GPIO header on RPi 2.
+ Added symbolic definitions for remaining pins on 40 pin GPIO header on RPi 2.
\version 1.47 2015-11-18
Fixed possibly incorrect reads in bcm2835_i2c_read_register_rs, patch from Eckhardt Ulrich.
@@ -471,6 +483,10 @@
\version 1.52 2017-02-03
Added link to commercial license purchasing.
+ \version 1.53 2018-01-14
+ Added support for AUX SPI (SPI1)
+ Contributed by Arjan van Vught (http://www.raspberrypi-dmx.org/)
+
\author Mike McCauley (mikem@airspayce.com) DO NOT CONTACT THE AUTHOR DIRECTLY: USE THE LISTS
*/
@@ -526,7 +542,7 @@
/*! Offsets for the bases of various peripherals within the peripherals block
/ Base Address of the System Timer registers
*/
-#define BCM2835_ST_BASE 0x3000
+#define BCM2835_ST_BASE 0x3000
/*! Base Address of the Pads registers */
#define BCM2835_GPIO_PADS 0x100000
/*! Base Address of the Clock/timer registers */
@@ -536,11 +552,18 @@
/*! Base Address of the SPI0 registers */
#define BCM2835_SPI0_BASE 0x204000
/*! Base Address of the BSC0 registers */
-#define BCM2835_BSC0_BASE 0x205000
+#define BCM2835_BSC0_BASE 0x205000
/*! Base Address of the PWM registers */
#define BCM2835_GPIO_PWM 0x20C000
+/*! Base Address of the AUX registers */
+#define BCM2835_AUX_BASE 0x215000
+/*! Base Address of the AUX_SPI1 registers */
+#define BCM2835_SPI1_BASE 0x215080
+/*! Base Address of the AUX_SPI2 registers */
+#define BCM2835_SPI2_BASE 0x2150C0
/*! Base Address of the BSC1 registers */
-#define BCM2835_BSC1_BASE 0x804000
+#define BCM2835_BSC1_BASE 0x804000
+
/*! Physical address and size of the peripherals block
May be overridden on RPi2
@@ -592,6 +615,17 @@
*/
extern volatile uint32_t *bcm2835_bsc1;
+/*! Base of the AUX registers.
+ Available after bcm2835_init has been called (as root)
+*/
+extern volatile uint32_t *bcm2835_aux;
+
+/*! Base of the SPI1 registers.
+ Available after bcm2835_init has been called (as root)
+*/
+extern volatile uint32_t *bcm2835_spi1;
+
+
/*! \brief bcm2835RegisterBase
Register bases for bcm2835_regbase()
*/
@@ -604,7 +638,9 @@
BCM2835_REGBASE_PADS = 5, /*!< Base of the PADS registers. */
BCM2835_REGBASE_SPI0 = 6, /*!< Base of the SPI0 registers. */
BCM2835_REGBASE_BSC0 = 7, /*!< Base of the BSC0 registers. */
- BCM2835_REGBASE_BSC1 = 8 /*!< Base of the BSC1 registers. */
+ BCM2835_REGBASE_BSC1 = 8, /*!< Base of the BSC1 registers. */
+ BCM2835_REGBASE_AUX = 9, /*!< Base of the AUX registers. */
+ BCM2835_REGBASE_SPI1 = 10 /*!< Base of the SPI1 registers. */
} bcm2835RegisterBase;
/*! Size of memory page on RPi */
@@ -801,6 +837,62 @@
RPI_BPLUS_GPIO_J8_40 = 21 /*!< B+, Pin J8-40, */
} RPiGPIOPin;
+/* Defines for AUX
+ GPIO register offsets from BCM2835_AUX_BASE.
+*/
+#define BCM2835_AUX_IRQ 0x0000
+#define BCM2835_AUX_ENABLE 0x0004
+
+#define BCM2835_AUX_ENABLE_UART1 0x01
+#define BCM2835_AUX_ENABLE_SPI0 0x02 /*!< SPI0 (SPI1 in the device) */
+#define BCM2835_AUX_ENABLE_SPI1 0x04 /*!< SPI1 (SPI2 in the device) */
+
+
+#define BCM2835_AUX_SPI_CNTL0 0x0000
+#define BCM2835_AUX_SPI_CNTL1 0x0004
+#define BCM2835_AUX_SPI_STAT 0x0008
+#define BCM2835_AUX_SPI_PEEK 0x000C /*!< Read but do not take from FF */
+#define BCM2835_AUX_SPI_IO 0x0020 /*!< Write = TX, read=RX */
+#define BCM2835_AUX_SPI_TXHOLD 0x0030 /*!< Write = TX keep CS, read=RX */
+
+#define BCM2835_AUX_SPI_CLOCK_MIN 30500 /*!< 30,5kHz */
+#define BCM2835_AUX_SPI_CLOCK_MAX 125000000 /*!< 125Mhz */
+
+#define BCM2835_AUX_SPI_CNTL0_SPEED 0xFFF00000
+ #define BCM2835_AUX_SPI_CNTL0_SPEED_MAX 0xFFF
+ #define BCM2835_AUX_SPI_CNTL0_SPEED_SHIFT 20
+
+#define BCM2835_AUX_SPI_CNTL0_CS0_N 0x000C0000 /*!< CS 0 low */
+#define BCM2835_AUX_SPI_CNTL0_CS1_N 0x000A0000 /*!< CS 1 low */
+#define BCM2835_AUX_SPI_CNTL0_CS2_N 0x00060000 /*!< CS 2 low */
+
+#define BCM2835_AUX_SPI_CNTL0_POSTINPUT 0x00010000
+#define BCM2835_AUX_SPI_CNTL0_VAR_CS 0x00008000
+#define BCM2835_AUX_SPI_CNTL0_VAR_WIDTH 0x00004000
+#define BCM2835_AUX_SPI_CNTL0_DOUTHOLD 0x00003000
+#define BCM2835_AUX_SPI_CNTL0_ENABLE 0x00000800
+#define BCM2835_AUX_SPI_CNTL0_CPHA_IN 0x00000400
+#define BCM2835_AUX_SPI_CNTL0_CLEARFIFO 0x00000200
+#define BCM2835_AUX_SPI_CNTL0_CPHA_OUT 0x00000100
+#define BCM2835_AUX_SPI_CNTL0_CPOL 0x00000080
+#define BCM2835_AUX_SPI_CNTL0_MSBF_OUT 0x00000040
+#define BCM2835_AUX_SPI_CNTL0_SHIFTLEN 0x0000003F
+
+#define BCM2835_AUX_SPI_CNTL1_CSHIGH 0x00000700
+#define BCM2835_AUX_SPI_CNTL1_IDLE 0x00000080
+#define BCM2835_AUX_SPI_CNTL1_TXEMPTY 0x00000040
+#define BCM2835_AUX_SPI_CNTL1_MSBF_IN 0x00000002
+#define BCM2835_AUX_SPI_CNTL1_KEEP_IN 0x00000001
+
+#define BCM2835_AUX_SPI_STAT_TX_LVL 0xFF000000
+#define BCM2835_AUX_SPI_STAT_RX_LVL 0x00FF0000
+#define BCM2835_AUX_SPI_STAT_TX_FULL 0x00000400
+#define BCM2835_AUX_SPI_STAT_TX_EMPTY 0x00000200
+#define BCM2835_AUX_SPI_STAT_RX_FULL 0x00000100
+#define BCM2835_AUX_SPI_STAT_RX_EMPTY 0x00000080
+#define BCM2835_AUX_SPI_STAT_BUSY 0x00000040
+#define BCM2835_AUX_SPI_STAT_BITCOUNT 0x0000003F
+
/* Defines for SPI
GPIO register offsets from BCM2835_SPI0_BASE.
Offsets into the SPI Peripheral block in bytes per 10.5 SPI Register Map
@@ -906,6 +998,8 @@
BCM2835_SPI_CLOCK_DIVIDER_1 = 1 /*!< 1 = 3.814697260kHz on Rpi2, 6.1035156kHz on RPI3, same as 0/65536 */
} bcm2835SPIClockDivider;
+
+
/* Defines for I2C
GPIO register offsets from BCM2835_BSC*_BASE.
Offsets into the BSC Peripheral block in bytes per 3.1 BSC Register Map
@@ -1512,9 +1606,79 @@
Asserts the currently selected CS pins (as previously set by bcm2835_spi_chipSelect)
during the transfer.
\param[in] buf Buffer of bytes to send.
+ \param[in] len Number of bytes in the buf buffer, and the number of bytes to send
+ */
+ extern void bcm2835_spi_writenb(const char* buf, uint32_t len);
+
+ /*! Transfers half-word to and from the currently selected SPI slave.
+ Asserts the currently selected CS pins (as previously set by bcm2835_spi_chipSelect)
+ during the transfer.
+ Clocks the 8 bit value out on MOSI, and simultaneously clocks in data from MISO.
+ Returns the read data byte from the slave.
+ Uses polled transfer as per section 10.6.1 of the BCM 2835 ARM Peripherls manual
+ \param[in] value The 8 bit data byte to write to MOSI
+ \sa bcm2835_spi_writenb()
+ */
+ extern void bcm2835_spi_write(uint16_t data);
+
+ /*! Start AUX SPI operations.
+ Forces RPi AUX SPI pins P1-36 (MOSI), P1-38 (MISO), P1-40 (CLK) and P1-36 (CE2)
+ to alternate function ALT4, which enables those pins for SPI interface.
+ \return 1 if successful, 0 otherwise (perhaps because you are not running as root)
+ */
+ extern int bcm2835_aux_spi_begin(void);
+
+ /*! End AUX SPI operations.
+ SPI1 pins P1-36 (MOSI), P1-38 (MISO), P1-40 (CLK) and P1-36 (CE2)
+ are returned to their default INPUT behaviour.
+ */
+ extern void bcm2835_aux_spi_end(void);
+
+ /*! Sets the AUX SPI clock divider and therefore the AUX SPI clock speed.
+ \param[in] divider The desired AUX SPI clock divider.
+ */
+ extern void bcm2835_aux_spi_setClockDivider(uint16_t);
+
+ /*!
+ * Calculates the input for \sa bcm2835_aux_spi_setClockDivider
+ * @param speed_hz A value between \sa BCM2835_AUX_SPI_CLOCK_MIN and \sa BCM2835_AUX_SPI_CLOCK_MAX
+ * @return Input for \sa bcm2835_aux_spi_setClockDivider
+ */
+ extern uint16_t bcm2835_aux_spi_CalcClockDivider(uint32_t speed_hz);
+
+ /*! Transfers half-word to and from the AUX SPI slave.
+ Asserts the currently selected CS pins during the transfer.
+ \param[in] value The 8 bit data byte to write to MOSI
+ \return The 8 bit byte simultaneously read from MISO
+ \sa bcm2835_spi_transfern()
+ */
+ extern void bcm2835_aux_spi_write(uint16_t);
+
+ /*! Transfers any number of bytes to the AUX SPI slave.
+ Asserts the CE2 pin during the transfer.
+ \param[in] buf Buffer of bytes to send.
\param[in] len Number of bytes in the tbuf buffer, and the number of bytes to send
*/
- extern void bcm2835_spi_writenb(char* buf, uint32_t len);
+ extern void bcm2835_aux_spi_writenb(const char *buf, uint32_t len);
+
+ /*! Transfers any number of bytes to and from the AUX SPI slave
+ using bcm2835_aux_spi_transfernb.
+ The returned data from the slave replaces the transmitted data in the buffer.
+ \param[in,out] buf Buffer of bytes to send. Received bytes will replace the contents
+ \param[in] len Number of bytes int eh buffer, and the number of bytes to send/received
+ \sa bcm2835_aux_spi_transfer()
+ */
+ extern void bcm2835_aux_spi_transfern(char *, uint32_t);
+
+ /*! Transfers any number of bytes to and from the AUX SPI slave.
+ Asserts the CE2 pin during the transfer.
+ Clocks the len 8 bit bytes out on MOSI, and simultaneously clocks in data from MISO.
+ The data read read from the slave is placed into rbuf. rbuf must be at least len bytes long
+ \param[in] tbuf Buffer of bytes to send.
+ \param[out] rbuf Received bytes will by put in this buffer
+ \param[in] len Number of bytes in the tbuf buffer, and the number of bytes to send/received
+ */
+ extern void bcm2835_aux_spi_transfernb(const char *, char *, uint32_t);
/*! @} */
diff -Naur bcm2835-1.52/src/Makefile.am bcm2835-1.53/src/Makefile.am
--- bcm2835-1.52/src/Makefile.am 2015-03-08 23:09:53.000000000 +0100
+++ bcm2835-1.53/src/Makefile.am 1970-01-01 01:00:00.000000000 +0100
@@ -1,9 +0,0 @@
-lib_LIBRARIES = libbcm2835.a
-libbcm2835_a_SOURCES = bcm2835.c
-include_HEADERS = bcm2835.h
-check_PROGRAMS = test
-test_SOURCES = test.c
-test_LDADD = ./libbcm2835.a
-TESTS = $(check_PROGRAMS)
-CLEANFILES = *~
-
diff -Naur bcm2835-1.52/src/Makefile.in bcm2835-1.53/src/Makefile.in
--- bcm2835-1.52/src/Makefile.in 2017-03-02 02:18:32.000000000 +0100
+++ bcm2835-1.53/src/Makefile.in 1970-01-01 01:00:00.000000000 +0100
@@ -1,975 +0,0 @@
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-
-install-html: install-html-am
-
-install-html-am:
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-install-info: install-info-am
-
-install-info-am:
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-install-man:
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-install-pdf: install-pdf-am
-
-install-pdf-am:
-
-install-ps: install-ps-am
-
-install-ps-am:
-
-installcheck-am:
-
-maintainer-clean: maintainer-clean-am
- -rm -rf ./$(DEPDIR)
- -rm -f Makefile
-maintainer-clean-am: distclean-am maintainer-clean-generic
-
-mostlyclean: mostlyclean-am
-
-mostlyclean-am: mostlyclean-compile mostlyclean-generic
-
-pdf: pdf-am
-
-pdf-am:
-
-ps: ps-am
-
-ps-am:
-
-uninstall-am: uninstall-includeHEADERS uninstall-libLIBRARIES
-
-.MAKE: check-am install-am install-strip
-
-.PHONY: CTAGS GTAGS TAGS all all-am check check-TESTS check-am clean \
- clean-checkPROGRAMS clean-generic clean-libLIBRARIES \
- cscopelist-am ctags ctags-am distclean distclean-compile \
- distclean-generic distclean-tags distdir dvi dvi-am html \
- html-am info info-am install install-am install-data \
- install-data-am install-dvi install-dvi-am install-exec \
- install-exec-am install-html install-html-am \
- install-includeHEADERS install-info install-info-am \
- install-libLIBRARIES install-man install-pdf install-pdf-am \
- install-ps install-ps-am install-strip installcheck \
- installcheck-am installdirs maintainer-clean \
- maintainer-clean-generic mostlyclean mostlyclean-compile \
- mostlyclean-generic pdf pdf-am ps ps-am recheck tags tags-am \
- uninstall uninstall-am uninstall-includeHEADERS \
- uninstall-libLIBRARIES
-
-.PRECIOUS: Makefile
-
-
-# Tell versions [3.59,3.63) of GNU make to not export all variables.
-# Otherwise a system limit (for SysV at least) may be exceeded.
-.NOEXPORT:
diff -Naur bcm2835-1.52/src/test.c bcm2835-1.53/src/test.c
--- bcm2835-1.52/src/test.c 2017-02-05 03:08:09.000000000 +0100
+++ bcm2835-1.53/src/test.c 1970-01-01 01:00:00.000000000 +0100
@@ -1,29 +0,0 @@
-// Test program for bcm2835 library
-// You can only expect this to run correctly
-// as root on Raspberry Pi hardware, but it will compile and run with little effect
-// on other hardware
-//
-// Author: Mike McCauley
-// Copyright (C) 2011-2013 Mike McCauley
-// $Id: test.c,v 1.5 2015/03/28 05:27:32 mikem Exp $
-
-#include
-#include
-#include
-
-int main(int argc, char **argv)
-{
- if (geteuid() == 0 && !getenv("FAKEROOTKEY"))
- {
- if (!bcm2835_init())
- return 1;
- if (!bcm2835_close())
- return 1;
- }
- else
- {
- fprintf(stderr, "****You need to be root to properly run this test program\n");
- return 1;
- }
- return 0;
-}