I bought a spare JTAG programmer and UART interface, have it packed up and ready to ship it around.
Updating the FPGA firmware is recommended to improve image quality.
If you want the new features, you can update the DP2LVDS boards, but you don't have to. No benefit if you don't want the new features.
There is no dependence between these firmwares.
How will this work?
Comment in this thread. I'll pick the closest person and contact for their details.
Each next person will pick the closest response in the thread, contact them (cc me!) and repeat the process. When the list is done, send it back to me.
Each person pays the shipping to the next out-of-pocket, no payments involved.
Let's go with an honor system to keep this simple. If someone breaks or loses it, they should purchase another or pay the ~$60 cost.
Box contents:
1x Digilent HS3 USB->JTAG
1x adapter board for JTAG
2x JTAG cables
1x UART with micro-usb connection
1x micro-usb cable
You will want to update FPGA firmware and maybe DP2LVDS.
Substantial changes to FPGA firmware:
Anyone with a round1 kit will have a noticeable gray level accuracy improvement.
Other notable historical improvements:
FPGA firmware V054 has digital gamma correction for much smoother and more accurate gray levels.
FPGA firmware V054 has improved panel voltage configurations (slightly better contrast)
FGPA firmware V050? added a boot logo
FPGA FW ~V036 added automatic reclocking to keep panel clock minimized, improved arbitrary resolution support.
FPGA FW ~V028 added limited arbitrary resolution support.
Minor changes to microcontroller (DP2LVDS arduino) firmware:
Crosshair is now an option.
Minimum-blanking preset for unlucky panels (lowers panel clock a bit)
Dynamically generated EDIDs for easy customization -> just add a modeline and the FW will do the rest.
Dynamically
generated EDIDs also support tiled display id blocks, makes
maximum-linerate dual input modes more easily used (3840*1440@165Hz,
3840*1080@240Hz, 3840*540@480Hz).
Default behavior combines the 4k60 and 4k120 EDIDs into a single EDID.