Should the "Number of Nonlinear convergence failures in transient step " be considered a problem or can be ignored?

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Roshni Uppala

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Jun 19, 2014, 12:00:35 PM6/19/14
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After running a simulation, I see that there are 3 places where STEP STATUS= Fail.
I have attached a copy of the log file.

Should this be a worry? or can I ignore it?

My circuit gives the result I am looking for and runs properly. But I just want to make sure everything works the way it is supposed to be.

Thank you !
binary_logic_cb_5by8pulsed_Xyce_EDIT.log

xyce-users

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Jun 19, 2014, 12:22:55 PM6/19/14
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On Thursday, June 19, 2014 10:00:35 AM UTC-6, Roshni Uppala wrote:
After running a simulation, I see that there are 3 places where STEP STATUS= Fail.
I have attached a copy of the log file.

Should this be a worry? or can I ignore it?

This should not be a problem. 

When a step fails, Xyce scales back the time step and  tries to retake the step.  During the course of transient simulation it will sometimes be the case that the code is trying to take too large a time step and needs to shorten it.  It is generally nothing to be concerned about.

When the number of failed steps starts to be very large compared to the number of successful steps, then you might consider that something is fishy.

Generally, you can just look at the summary that's printed at the end to get enough info without needing to the verbose output.  Your older circuit was so pathological, though, that more information was required just to see what was happening.

My circuit gives the result I am looking for and runs properly. But I just want to make sure everything works the way it is supposed to be.

It appears to be working normally.

Roshni Uppala

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Jun 19, 2014, 12:24:50 PM6/19/14
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Thanks !


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