I ran into this issue where I am trying to test two nmos in parallel and their gate thresholds and the output doesnt write to the file.

[pablo_sole...@brown.edu]

When I run the net it has no errors, but says it took no steps to solve. Why does this happen? 

* NMOS Model 180nm

.INCLUDE "MOSlib.lib" ;includes 180nm NMOS (NMOS180) and very basic NMOS mod

*********Analysis Commands**************

.DC Vg1 5 -5 0.1

.print DC FILE=foobar.txt PRECISION=11 WIDTH=7 V(3) V(5) I(Rs1) I(Rs2) I(Rs3)

****************************************

*Power Source

Vd 1 0 1.8V

Id 1 6 0.5u

*NMOS device    M<name> <drain node> <gate node> <source node> + <bulk/substrate node> <model name>

M1 2 3 4   0 NMOS180 W=0.5u L=0.18u ;

M2 2 5 7   0 NMOS180 W=0.5u L=0.18u ;

* resistor for current sensing

Rs1 6 2 0

Rs2 4 0 0

Rs3 7 0 0

[xyce-users]

When I run this circuit I get an error.  I first had to make up an NMOS model card to be able to run it, as your example doesn't include the MOSlib.lib file.  But, that hack was easy enough.

Once I did that, Xyce did emit an error.    However, it should have emitted the error and exited prior to printing the solution summary, which was understandably confusing.

The error I got was this:

Netlist error: Function or variable Vg1 is not defined

This error happened because you are specifying a DC sweep on the Vg1 source, but that source is not present in the circuit.

thanks,

the Xyce team

[pablo_sole...@brown.edu]

My bad, it seems to have not pasted all I meant to paste. Vg1 is actually defined in the circuit, it just wasnt included in the code. Here is the complete snippet. I also added a sweep to Vg2.

Now this code is giving me the same issue I was talking about with the two nmos in parallel. It does not save to a file

* NMOS Model 180nm

.INCLUDE "MOSlib.lib" ;includes 180nm NMOS (NMOS180) and very basic NMOS mod

*********Analysis Commands**************

.DC Vg1 0 5 0.1 Vg2 5 0 0.1

.print DC format=csv file=foobar.txt PRECISION=11 WIDTH=7 V(3) V(5) ;I(Rs1) I(Rs2) I(Rs3)

*From this analysis we conclude that current flows from drain to source at a Vds of about -0.86V to .05V

****************************************

*Power Source

Vd 1 0 1.8V

Id 1 6 0.5u

*NMOS device    M<name> <drain node> <gate node> <source node> + <bulk/substrate node> <model name>

M1 2 3 4   0 NMOS180 W=0.5u L=0.18u ;

M2 2 5 7   0 NMOS180 W=0.5u L=0.18u ;

* resistor for current sensing

Rs1 6 2 0

Rs2 4 0 0

Rs3 7 0 0

*Gate voltage

Vg1 3 0 0V

Vg2 5 0 0V

.END

[xyce-users]

OK, I just verified that it is doing this with your full circuit.

That is really weird.  I'll have to dig into it a little more before I can explain this.  You may have found a (disturbing) bug. 

[xyce-users]

Please check your .DC syntax, as both the first and last versions of your circuits have the same problem.

Your first circuit has:

.DC Vg1 5 -5 0.1

which is saying "start at 5V and sweep in steps of +0.1 down to -5" which is impossible.  So no steps are taken and no output produced.

In your second you have corrected the sweep over Vg1 so it goes from 0 to 5 rather than from 5 to -5, but you added a second sweep that goes from 5 down to 0 in steps of +0.1 (again, not possible).

Correct your .dc line, and you'll get your output.