Random distribution and generation functions for verilog models

[Bhanprakash Goswami]

I have the function `$rdist_normal ` in my memristor model. When I try to compile it using Xyce/ADMS  (Xyce-7.4), I get an error: "analog function '$rdist_normal' is undefined". I think Xyce/ADMS does not support this type of Verilog function, can you please suggest any ideas about how I  get this working on my Verilog-A model?

[xyce-users]

At this time, the only way to create devices in Xyce that use random numbers is to write them in C++.  There are no current plans to support random distribution functions in Verilog-A under Xyce/ADMS. 

Another user had this same issue years ago and wrote a blog article about his approach: https://knowm.org/native-memristor-device-development-in-xyce/

[Kevin Cameron]

FYI: I have a whole Verilog-AMS parser up on GitHub, along with some dynamic PWL stuff for Xyce - https://github.com/kev-cam

Since there are no plans to support Verilog-AMS fully in Xyce, I would recommend doing as much as possible as separate plug-ins. Anything that's signal-flow can probably be done with the PWL interface.

Verilog-AMS is currently a moribund standard, if anyone wants to revive it as an IEEE standard, we can try to get a PAR approved. NB: there is absolutely no effort going into handling AMS in SystemVerilog, and no indication that Xyce team have any interest in supporting digital.

BTW, is there a preferred Xyce repo on GitHub?

Kev.

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