Hello,
I am trying to simulate a circuit containing a certain memristor model, the “Joglekar memristor model”. I have tried including it in my circuit (1) as a subcircuit and (2) as a Verilog model; however, transient analysis fails using both approaches.
(1) When used as a subcircuit
I am able to simulate the memristor without errors when used in the file “joglekar.cir”. However, when I use the memristor in a larger circuit (“m2x2_jog_subckt.cir”) and perform a transient analysis, the simulation halts at 4% and I get the following error:
“Time step too small near step number: 387 Exiting transient loop.”
The complete error message is attached (“m2x2_jog_subckt_error.txt”). I have taken the code for the subcircuit from this website.
(2) When used as a Verilog model
I have compiled the Verilog model (“joglekar.va”) using the `buildxyceplugin` tool. I am able to simulate it without errors when used in the file “memristor_sim.cir”. However, when I use the memristor in a larger circuit (“m2x2_jog_subckt.cir”) and perform a transient analysis, I get the following error:
function OneStep::rejectStep:
Maximum number of local error test failures.
*** Xyce Abort ***
function OneStep::rejectStep:
Maximum number of local error test failures.
The complete error message is attached (“m2x2_error.txt”). I have taken the code for the model from this website.
I have uploaded all the relevant files here. Any guidance on how to resolve this error, such that I can use the Joglekar model in my circuit “m2x2”, would be greatly appreciated.
Thank you for your time.
Regards,
Abitha Thyagarajan