ADMS replacement

[Kevin Cameron]

Just FYI, I'm working on a copy of Xyce with Claude Code - https://github.com/kev-cam/xyce 

Claude claims our GiNaC based Verilog-A compiler (PyMS) is 8x smaller and up to 2x faster than ADMS.

This is part of a larger project on my part to mash SystemVerilog (iVerilog), VHDL (NVC) and Xyce into a fully working mixed-signal simulator, addressing a lot of issues that were fixable long ago, but nobody wanted to help with.

Let me know if it works for you (or not). Also if you are interested in modeling RF systems.

Regards,

Kev.