New user...xyce error Directory node not found

[BridgehamptonRacer]

Good Evening, 

I now have xyce instantiated in our design flow and am running some initial designs through xyce to get familiar with it. These are largely based on hspice compatible transistor and behavioral level schematics and netlists that have been run on other simulators.

Things have been going fairly well except now I get this error,

==> Directory node not found: Data

Data is a node name in the schematic.

What is odd is that this error popped  up only after I added additional circuitry to the schematic. The new circuitry is not connected to node Data. 

Can someone  tell me what this message means?

Many thanks from a new xyce user.

Kevin

[xyce-users]

Unfortunately, this message means "you have found a bug."

The message was never intended as a user error, and exists only to make Xyce exit cleanly (instead of crashing) when it hits a condition that should never happen.  Somewhere in the course of processing the netlist, some bit of code tried to look up "Data" and didn't find it.

It is impossible to tell you why this is happening without access to the exact netlist that trips the error.  If you can cook your netlist down to the smallest example that makes the error show up and send it to us, we may be able to pin down where things are going wrong.

[BridgehamptonRacer]

Thanks very much for your reply. 

I will try and come up with the simplest netlist that still shows the error as you suggest. Also, I'd like to take another close examination of the behaviorals I am feeding into xyce to make sure I am not violating any xyce ground rules. Even though they run on other simulators there may be specification or syntax differences I am not yet aware of.

Thanks again,

Kevin

[xyce-users]

Even if you are "violating any Xyce ground rules," the "Directory node not found" error is a clear indication that Xyce has a bug, so we will appreciate any example netlist you can provide to help us quash it.

When you violate a Xyce netlisting rule then Xyce should tell you what you've done wrong, not crap out with an obscure, cryptic error message intended only for developers.  It may take some time to fix what's wrong, but we don't like to leave things this way.

[BridgehamptonRacer]

Ok, I was able to find the source of the problem leading to "Directory node not found"  error 

It turned out that a behavioral XOR subcircuit within a behavioral library was found to have a mislabeled node.  

.SUBCKT TS_XNOR  A  B  Y
* 2-INPUT XOR  IN IN OUT

.

. switch circuits removed 

r1  risefall y 0.1 ;  <=== this resistor had node labeled yn instead of y causing there to be no connection to node Y as defined on .subckt line

.ENDS TS_XNOR

Once I fixed this, the "Directory node not found"  error when away and xyce simulated just fine.

We use different digital behavioral netlist libraries depending on the simulator we are targeting. This is due to differences in simulators and the type of simulations we are doing.

For instance, we cannot use our normal digital behavioral libraries when performing harmonic balance or PSS simulations as they do not converge reliably. So we have come up

with an approach that works around this problem for HB and PSS. The error in node labeling came about when preparing a digital behavioral lib specifically for xyce... my error!

The test sheet used for trouble-shooting is as follows. The  symbols containing label "sch:" point to underlying schematics. The symbols with "net:" point to netlists in text based library files.

It was the XOR gate that had the problem. The schematic symbols are the same no matter what spice/xyce simulator we target.

Again, I am just getting started with xyce. I am hoping to have the mixed-behavioral rf transceiver test case (below) running soon. 

Also some synthesizers and RF/MW PA's test cases, etc. It will take me some time to get transistor level libraries going but my intention is to run benchmarks on full transistor level circuits as well.

As an aside, I was able to use the topspice waveform viewer to open xyce results using the raw format. I found it fairly straight forward to make the hooks to xyce from within our design flow. We will need to added some new menu's to support the xyce specific commands.  And it will be interesting to try the HB simulator. 

I  can email you a netlist if still needed but need to pull out blocks from our library. my email is kgfa...@msn.com if you would like to tell me where to send it.

Thanks again for your help.

Kevin

[xyce-users]

Kevin:  I'm glad you found the netlisting error that sent Xyce down this path and were able to fix it so easily.

Yet it is still wrong for Xyce to have thrown that error instead of something more meaningful, and it would definitely help us out to have the netlist that trips the problem --- especially since you have clearly identified the one issue that makes it go from "cryptic message" to "works".

You can send your netlist to xy...@sandia.gov and someone on the Xyce team will try to hunt down what is going on.

[BridgehamptonRacer]

Sounds good. I will get it to the xyce team in the next day or two... Kevin

[BridgehamptonRacer]

FYI, I was able to get the netlist illustrating the previous issue off to the xyce team yesterday. 

And a minor hiccup occurred as I continued on the path to simulating the behavioral RF transceiver test case. 

I had Xyce give a singular matrix error on a behavioral gain block whose input was terminated by an independent current source with dc value set to zero. Adding a 1G resistor in parallel made the error go away. This is something we routinely do in behaviorals for spice in order to eliminate "no dc path" errors (works even though dc is set to 0).

After that it when very smoothly. The compatibility of xyce with hspice netlists is greatly appreciated as it allows us to target simulators according to availability and purpose.

Because of this, the test system was able to run on xyce and another spice based simulator without modification. The I/Q plot below is from the spice based simulator. The plot showing the bits out of the receiver vs time is from Xyce. 

The next step for us will be testing with circuits and systems using foundry supplied process libraries, most likely in hspice format. 

Thank you for making this simulator available.

-Kevin