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Transient fails on a circuit with only R, C, V

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zhengqi gao

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Aug 29, 2024, 6:13:58 PM8/29/24
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Hi,

I am working on a project and somehow arrive at a circuit netlist (after some simplifications) containing only R,C, and V. I have attached the netlist in this post.

Basically, the file defines two `subckt` named `x1` and `x2`. And my circuit is made up of two independent circuit blocks. However, when I simulate it, I get an error 'function OneStep::rejectStep: Maximum number of failures at time 4e-13', and I checked the output tmp.sp.prn only contains results up to time=4e-13.

I know this might be my circuit netlist, not Xyce's problem. I stared at my netlist for a long time, but still cannot figure out why this transient simulation fails... So I think I should put it here and ask for experts' help.

Thanks so much for your time.

-Zhengqi
param.txt
tmp.sp

xyce-users

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Aug 29, 2024, 6:18:55 PM8/29/24
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The error you describe usually occurs when Xyce can get a DC operating point but can’t make the first step into transient simulation.  This can occur if there is some sort of discontinuity between time = zero and time > zero.  Look for voltage sources that are zero at time zero and got to something non-zero right after that.  

 

You’re looking for anything that can cause a discontinuity between time time = 0 and time > 0.  That’s why the time step where it failed was so small.

 

Good luck,

Rich

zhengqi gao

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Aug 29, 2024, 6:19:46 PM8/29/24
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I did a bit more testing. It seems this problem is associated with the PWL source. I commented out Lines 24-27, leaving only the Vin1 + Vin2 + x1 + x3, and the transient still fails at 4e-13 (i.e., 0.4 ps). And 0.4 ps is the place where my PWL source begins changing from 0volts to 0.0125 volts. So I am guessing this is the problem?

How should I resolve this problem?
  

xyce-users

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Aug 29, 2024, 6:37:30 PM8/29/24
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I didn't notice that the file "tmp.sp" was the netlist you wanted to simulate.  Looking at the netlist it seems that the current source in the sub-circuit is conflicting with the applied voltage outside of the sub circuit.  

So the current source can't supply current to the attached nodes while the voltage source holds the voltage at the level set by the PWL function and there still be a solution to the circuit.  You may need more capacitance in the system to take up the excess charge or more of a load between the current source and the voltage source.

Good luck,
Rich

zhengqi gao

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Aug 29, 2024, 6:47:59 PM8/29/24
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Hi Rich,

Thanks for your help! However, I don't think it is the problem of the current sources. If  I commented out Lines 24-27, leaving only the Vin1 + Vin2 + x1 + x3, i.e., no current sources, then I still have the same error, transient fails at time 4e-13.

I am guessing it is because Vin1 and Vin2 PWL change from 0volts to 0.0125 volts at 0.4ps. But this change is not too large, why transient fails?

-Zhengqi

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